Abstract: Various techniques for reducing power consumption of a computing device are described herein. In one example, a method includes detecting that the computing device is to execute a first operation for a first hardware component. The method can also include determining that the computing device is not to execute a second operation for a second hardware component during a period of time. Furthermore, the method can include loading operation data corresponding to the first operation into a processor cache from a non-volatile storage device and detecting that the first operation is not to request memory data from a volatile storage device. The method can also include removing power from at least one storage device.

Abstract: Improved power control techniques for integrated peripheral component interconnect express (PCIe) controllers are described. In one embodiment, for example, a processor circuit may comprise an integrated PCIe controller and logic to detect a power reduction trigger, disable the integrated PCIe controller, and remove power from the integrated PCIe controller based on a power removal setting for the integrated PCIe controller. Other embodiments are described and claimed.

Abstract: A method and system for managing one or more thermal policies of a portable computing device (PCD) includes monitoring temperature of the portable computing device with internal thermal sensors and external thermal sensors. If a change in temperature has been detected by at least one thermal sensor, then a thermal policy manager may increase a frequency in which temperature readings are detected by the thermal sensors. The thermal policy manager may also determine if a current temperature of the portable computing device as detected by one or more of the thermal sensors falls within one or more predetermined thermal states. Each thermal state may be assigned a unique set of thermal mitigation techniques. Each set of thermal mitigation techniques may be different from one another. The sets of thermal mitigation techniques may differ according to quantity of techniques and impacts on performance of the PCD.

Abstract: An example method includes communicating a first signal to a remote computer element, the first signal can be used to establish a link between the remote computer element and a local computer element. The method also includes evaluating whether the remote computer element is configured to support a low-power protocol in which low-power IDLE signals are exchanged between the local computer element and the remote computer element, the evaluating occurs using a link layer protocol. In detailed embodiments, the method includes negotiating a wake-up time for the remote computer element to shift from a low-power mode to an active mode. The method can also include evaluating buffer parameters to confirm the wake-up time for the remote computer element to shift to the active mode. In still other embodiments, the method can include delaying a data transmission on the link for at least the wake-up time that was negotiated.

Abstract: An electronic device and a method of booting the electronic device is provided. The electronic device and method include a power supply unit, a volatile memory, a non-volatile memory, and a controller which, in response to power being supplied by the power supply unit, performs booting in a first booting mode that uses a suspend image stored in the volatile memory; and, in response to an error occurring in the first booting mode, performs a next booting in a second booting mode that uses a suspend image stored in the non-volatile memory. In response to power being supplied by the power supply unit, performing booting in a first booting mode that uses a suspend image stored in the volatile memory; and in response to an error occurring in the first booting mode, performing a next booting in a second booting mode using a suspend image stored in the non-volatile memory.

Abstract: A peripheral device includes a host interface, a power interface, a switch, a control module, and a regulator. The host interface transfers data between the peripheral device and a host. The power interface receives power from a power source. The power source is separate from the peripheral device and the host. The control module monitors the host interface and generates a control signal to transition the switch from a first state to a second state when the host interface does not receive an expected signal from the host. The regulator powers the control module and a circuit of the peripheral device based on the power received from the power source. The control module is separate from the circuit. The switch activates the control module, the regulator and the circuit when in the first state and deactivates the control module, the regulator and the circuit when in the second state.

Abstract: The present invention discloses a server and a booting method thereof. The booting method includes the following steps. A motherboard and a hard disk driver backplane coupled to multiple hard disk drivers are provided, and a working voltage is provided for the hard disk driver backplane, wherein a power-up normal signal is generated when the hard disk driver backplane is powered up normally, and the motherboard includes a booting control circuit and a controller. In response to the power-up condition of the hard disk driver backplane, the hooting control circuit receives the power-up normal signal and outputs a power-up control signal to the controller. When receiving the power-up control signal, the controller controls the motherboard to be booted or maintained as off by determining the condition of the power-up control signal, for the data exchange between the motherboard and the hard disk driver.

Abstract: An electronic device, such as an e-book, for displaying information includes a power source; a display having a high power mode and a low power mode, said display being powered by said power source; and a power control arrangement for switching the display to a low power mode when no changes to selected regions of the display are required for at least a predetermined time. The power control arrangement switches said display from said low power mode to said high power mode when changes of said display are required in display portions other than said selected portions. A method for operating the electronic device. A computer readable medium having computer readable instructions thereon for implementing the method.

Abstract: An apparatus and method for reducing power consumption in a portable terminal are provided. The apparatus includes a display unit for displaying at least one indicator that indicates status information measured by a slave processor, a master processor for controlling one of ON and OFF of the display unit and for providing image data to the display unit, and the slave processor for transmitting to the master processor indicator update information for updating the at least one indicator, wherein transmission to the master processor of the indicator update information is discontinued if the status of the display unit is OFF.

Abstract: A computing device includes a display, a universal serial bus (USB) power source having a voltage output port to output a voltage to power input/output (I/O) devices connected to USB interfaces of the computing device, and a switch circuit connected between the display and the USB power source. The switch circuit can synchronously turn off the display and control the USB power source to stop outputting the voltage, and can synchronously turn on the display and control the USB power source to output the voltage.

Abstract: A memory control device that is capable of making a nonvolatile memory of an information device exhibit the performance thereof certainly. A detection unit detects whether a data writable semiconductor memory is a nonvolatile memory or a volatile memory. A setting unit performs a setting to a volatile memory and performs a different setting to a nonvolatile memory that is detected with the detection unit.

Abstract: A method and apparatus for disabling ways of a cache memory in response to history based usage patterns is herein described. Way predicting logic is to keep track of cache accesses to the ways and determine if an access to some ways are to be disabled to save power, based upon way power signals having a logical state representing a predicted miss to the way. One or more counters associated with the ways count accesses, wherein a power signal is set to the logical state representing a predicted miss when one of said one or more counters reaches a saturation value. Control logic adjusts said one or more counters associated with the ways according to the accesses.

Abstract: In one embodiment, the present invention includes a processor having a core with decode logic to decode an instruction prescribing an identification of a location to be monitored and a timer value, and a timer coupled to the decode logic to perform a count with respect to the timer value. The processor may further include a power management unit coupled to the core to determine a type of a low power state based at least in part on the timer value and cause the processor to enter the low power state responsive to the determination. Other embodiments are described and claimed.

Abstract: An image forming apparatus includes a receiving unit configured to receive an input regarding a print process from a user; a setting unit configured to set the apparatus to normal or energy saving mode based on the input from the user, the normal mode causing the apparatus to be operated by the power supplied from a power supply unit, the energy saving mode causing the apparatus to be operated by the power supplied from the power supply unit or a secondary battery so that power consumption of the apparatus is less than that in the normal mode; a calculation unit configured to calculate a charging amount of the battery based on an energy saving time for which the apparatus has been in the energy saving mode; and a charging unit configured to charge the battery with the power from the power supply unit by the charging amount.

Abstract: An apparatus and method is described herein for providing an early wake scheme before spawning a new thread. An early wake indication is provided an amount of time, which may include an amount of time to perform a demotion from a current power state to a lower power state that is closer to an active power state, before a new thread is to be spawned and executed on a processing element (core or thread). Upon encountering the spawn of the new thread, such as a helper thread, the processing element is further transition from the lower power state to an active power state. And the new thread is executed on the processing element without incurring the latency associated with execution of the new thread waiting for the demotion from the current power state to an active power state after the spawn of the new thread.

Abstract: According to an embodiment, an information processing device that includes a first storage unit and a second storage unit having power consumption different from that of the first storage unit. The information processing device also includes a control unit configured to make a control to determine a priority of information that is to be stored in the first storage unit or the second storage unit. The control unit is configured to store the information into the first storage unit or into the second storage unit based on the determined priority.

Abstract: According to an embodiment, an information processing apparatus includes a first storage unit, a second storage unit, a power supply state control unit, a cryptographic key movement unit, a communications unit, an information input determination unit, a communications state determination unit, and a cryptographic key control unit. The cryptographic key movement unit is configured to move at least part of the cryptographic key data stored in the first storage unit to the second storage unit before a shift from a power-on state to another power supply state. In the other power supply state, the cryptographic key control unit returns the cryptographic key data from the second storage unit to the first storage unit if it is determined that there is an input of information which matches the information stored in the second storage unit and it is determined that communications are enabled between the communications unit and a base-station apparatus.

Abstract: In some embodiments, the invention provides a higher efficiency, real-time platform power management architecture for computing platforms. A more direct power management architecture may be provided using integrated voltage regulators and in some embodiments, a direct power management interface (DPMI) as well. Integrated voltage regulators, such as in-silicon voltage regulators (ISVR) can be used to implement quicker, more highly responsive power state transitions.

Abstract: A mechanism is provided for an integrated circuit with power gating. A power switch is configured to connect and disconnect circuits to a common voltage source. A capacitor tank is configured to supply wakeup charge to a given circuit. A controllable element is connected to the given circuit and to the capacitor tank. The controllable element is configured to controllably connect and disconnect the capacitor tank to the given circuit in order to supply the wakeup charge to the given circuit. The controllable element is configured to, responsive to the power switch disconnecting the given circuit from the common voltage source and to the given circuit being turned on to wakeup, supply the wakeup charge to the given circuit being turned on by transferring the wakeup charge from the capacitor tank to the given circuit. This reduces the electrical charge transferred from the circuits connected to the common voltage source.

Abstract: A mechanism is provided for an integrated circuit with power gating. A power header switch is configured to connect and disconnect any one of multiple circuits to a common voltage source, where a powered off circuit is disconnected from the common voltage source. A power-up sequencer includes an initial stages power-up component and a final stages power-up component. The final stages power-up component is configured to execute final stages of a power-up process for the powered off circuit, and the initial stages power-up component is configured to execute initial stages of the power-up process for the powered off circuit. The initial stages power-up component is activated in response to a predictive power-up request.

Abstract: A first battery 102 is removably housed in a first battery housing unit 108, and a second battery 103 is removably housed in a second battery housing unit 110. When it is detected that a lid 107 or 109 that is used when the first battery 102 or the second battery 103 is replaced is in an open state, system control sections 113 and 114 start a restriction mode for restricting an operation of an information processing device 100 such that power consumption by the information processing device 100 is curtailed.

Abstract: A technique to change a thermal design power (TDP) value. In one embodiment, one or more environmental or user-driven changes may cause a processor's TDP value to be changed. Furthermore, in some embodiments a change in TDP may alter a turbo mode target frequency.

Abstract: Apparatuses, systems, and methods are disclosed for managing lifetime for a data storage device. A target module determines a write bandwidth target for a data storage device. An audit module monitors write bandwidth of the data storage device relative to the write bandwidth target. A throttle module adjusts execution of one or more write operations on the data storage device in response to the write bandwidth of the data storage device failing to satisfy the write bandwidth target.

Abstract: The invention relates to a method for operating an electronic system, wherein the energy consumption of at least parts of the system is regulated such that on the basis of at least a time-related curve of the current (IFE1, . . . , IFEn) detected within the system, a gradient value (diFE1, . . . , diFEn) of the current value generated at least partially from circuitry is formed. On the basis of the gradient value, a circuit-related manipulation of at least one physical variable of the system is carried out. The invention further relates to an arrangement for carrying out the method.

Abstract: Aspects of a method and system for physical layer control of low latency state transitions for energy efficiency. In this regard, a determination may be made to reconfigure a network device from an energy saving mode of operation to a higher performance mode of operation. A first portion of the network device may be reconfigured prior to sending an indication of the reconfiguration to a link partner, and a remaining portion of the network device may be reconfigured after sending the indication. The link partner may begin reconfiguration from an energy saving mode of operation to higher performance mode of operation upon receiving the indication. The energy saving mode may comprise a low power idle (LPI) or a subset PHY mode. The reconfiguration may comprise allocating memory to, and/or de-allocating memory from, buffering received and/or to-be-transmitted data.

Abstract: An image forming apparatus includes: an image forming unit; a power supply controller controls the image forming apparatus to operate in a normal mode and a power saving mode, in which supply of power to the image forming unit is cut off; and a plurality of interfaces that receives a transition command for transitioning from the power saving mode to the normal mode. The power supply controller performs an interface-power supply process of supplying power to at least one interface; a first change process of changing power supply destinations in the interface-power supply process so as to reduce an amount of power supply in the interface-power supply process; and a second change process of changing the power supply destinations in the interface-power supply process after the first change process so as to further reduce the amount of power supply.

Abstract: Methods and apparatuses for reducing power consumption of a system cache within a memory controller. The system cache includes multiple ways, and each way is powered independently of the other ways. A target active way count is maintained and the system cache attempts to keep the number of currently active ways equal to the target active way count. The bandwidth and allocation intention of the system cache is monitored. Based on these characteristics, the system cache adjusts the target active way count up or down, which then causes the number of currently active ways to rise or fall in response to the adjustment to the target active way count.

Abstract: Method and scheduler in an operating system, for scheduling processing resources on a multi-core chip. The multi-core chip comprises a plurality of processor cores. The operating system is configured to schedule processing resources to an application to be executed on the multi-core chip. The method comprises allocating a plurality of processor cores to the application. Also, the method comprises switching off another processor core allocated to the application, not executing the sequential portion of the application, when a sequential portion of the application is executing on only one processor core. In addition, the method comprises increasing the frequency of the one processor core executing the application to the second frequency, such that the processing speed is increased more than predicted by Amdahl's law.

Abstract: In one embodiment, the present invention includes a method for receiving an incoming packet in a packet buffer and associating it with a flow identifier. Based on the flow identifier, a core to which the incoming packet is to be directed may be determined, and a power management hint can be transmitted to cause the core to be powered up. Other embodiments are described and claimed.

Abstract: Methods and apparatus relating to link power savings with state retention are described. In one embodiment, one or more components of two agents coupled via a serial link are turned off during idle periods while retaining link state in each agent. Other embodiments are also disclosed.

Abstract: A multi-core processor system, a dynamic power management method thereof and a control apparatus thereof are provided. In the method, a workload of a multi-core processor during a runtime stage is obtained. Next, a hot-plug operation is respectively performed on a plurality of slave cores according to the workload and a working state of each slave core. Then, a bus master status and the working state of a boot core are monitored to determine whether to power off the boot core, in which the bus master status is generated by combining a plurality of device statuses reflected by a plurality of peripheral devices. Finally, when the bus master status is determined as idle, the boot core is powered off.

Abstract: Methods and apparatuses for reducing leakage power in a system cache within a memory controller. The system cache is divided into multiple small sections, and each section is supplied with power from a separately controllable power supply. When a section is not being accessed, the voltage supplied to the section is reduced to a voltage sufficient for retention of data but not for access. Incoming requests are grouped together based on which section of the system cache they target. When enough requests that target a given section have accumulated, the voltage supplied to the given section is increased to a voltage sufficient for access. Then, once the given section has enough time to ramp-up and stabilize at the higher voltage, the waiting requests may access the given section in a burst of operations.

Abstract: A printing apparatus having a printing engine, a first control unit, and a second control unit, in which a normal operation is performed by at least the printing engine and the first control unit, a first power saving operation is performed by at least the first control unit while the printing engine is stopped, and a second power saving operation is performed by only the second control unit, the printing apparatus including: a first storage unit of the first control unit that stores a setting value reflecting a setting change performed while the printing apparatus is operated and an operation value not reflecting the setting change performed while the printing apparatus is operated; a second storage unit of the second control unit that stores the setting value and the operation value.

Abstract: An electronic device, a control method of the electronic device, and an image forming apparatus to cut off unnecessary power after recognizing connection/disconnection statuses of Universal Serial Bus (USB) hosts/devices connected to a USB hub are provided. The electronic device includes a USB hub connected to a USB host/device, a first switch configured to switch power supply to the USB hub for reducing power consumption, a controller configured to turn the first switch off to cut off power supply to the USB hub when no USB host/device is connected to the USB hub or only a USB host/device not requiring constant power supply is connected to the USB hub.

Abstract: An information processing system includes a receiving unit that receives user operation; a setting unit that holds association information in which pieces of necessity information each indicating necessity of a shutdown process indicating a process required for stopping power supply to a corresponding device are associated with a plurality of devices, respectively; a first instruction unit that instructs a target device for which the power supply is to be stopped to perform the shutdown process when the receiving unit receives operation to stop the power supply and the target device requires the shutdown process based on the association information; and a second instruction unit that instructs a power supply control device that controls execution or stop of the power supply to the target device to stop the power supply to the target device when the shutdown process of the target device is completed.

Abstract: A processor may determine the actual residency time of a non-core domain residing in a power saving state and based on the actual residency time the processor may determine an optimal power saving state (P-state) for the processor. In response to the non-core domain entering a power saving state, an interrupt generator (IG) may generate a first interrupt and the device drivers or an operating system may use the first interrupt to start a timer (first value). In response to the non-core domain exiting the power saving state, the IG may generate a second interrupt and the device drivers or an operating system may use the second interrupt to stop the timer (final value). The power management unit may use the final and the first value to determine the actual residency time.

Abstract: Computing devices and methods for resetting an inactivity timer of each of a first and second computing device are described. In one embodiment, the method comprises establishing a communication channel between the first computing device and the second computing device, receiving activity input responsive to a user interaction at the first computing device, resetting the inactivity timer of the first computing device, and transmitting a notification via the communication channel to the second computing device that the activity input was received at the first computing device, the inactivity timer of the second computing device being reset in response to receipt of the notification.

Abstract: A novel information processing apparatus maintains file system information in a secondary storage device during power saving mode. The information processing apparatus keeps storing file information and mounting information in the secondary storage device without releasing it in shutdown process 303 when it transitions to power saving mode, and uses the saved file information 401 and mounting information 402 in reinitializing process 304 when it returns from power saving mode. User program 201 does not need to execute file initializing process. Also, since mounting information 402 is kept, the information processing apparatus can access the file system in the secondary storage device immediately if the power of the secondary storage device is on and the secondary storage device is available.

Abstract: Dynamically reconfigurable multi-core microprocessors and associated methods are provided. A multi-core microprocessor is provided that supports the ability of system software to disable, or kill, selected cores in such a way that they do not cause drag on the processor bus shared with the other cores. Another multi-core microprocessor is provided that supports reconfiguration of an inter-core coordination system of the microprocessor, wherein cores may be selectively designated as masters for purposes of driving signals onto an inter-core communication wire.

Abstract: A method for saving a battery power of a terminal includes receiving a touch input on a touch screen, detecting an input stop event where the touch input is stopped, switching the touch screen to a turned-off state or a dim state, in response to the input stop event, and detecting an input resume event where the touch input is resumed during the turned-off state or the dim state, and switching the touch screen to be a turned-on state in response to the input resume event. Other embodiments including an apparatus for saving a battery power are also disclosed.

Abstract: In an embodiment, a processor includes a plurality of cores each to independently execute instructions, a power delivery logic coupled to the plurality of cores, and a power controller including a first logic to cause a first core to enter into a first low power state of an operating system power management scheme independently of the OS, during execution of at least one thread on the first core. Other embodiments are described and claimed.

Abstract: An information processing apparatus includes a receiver configured to receive a packet via a communication line, an operating processor configured to suspend an operation thereof when the information processing apparatus is in an energy saving mode, a first storage configured to store the packet received by the receiver, a determining unit including a table in which different operations of the operating processor are recorded in association with different patterns of packets and configured to determine whether to restart the operating processor when the information processing apparatus is in the energy saving mode based on a pattern of the packet stored in the first storage and the patterns of the packets in association with the operations of the operating processor recorded in the table, and a power manager configured to supply power to the operating processor based on a result determined by the determining unit to restart the operating processor.

Abstract: An incoming call answering and rejecting method, an electronic device, and a digital data storage media are provided. The method is applied to an electronic device having a touch screen and has the following steps. A request of an incoming call is received. A dragging signal is generated on the touch screen. When the dragging signal is an answering signal, the incoming call is answered. When the dragging signal is a rejecting signal, the incoming call is rejected.

Abstract: Various features are provided to improve communication performance and power conservation in a client terminal by relying on the assistance of a proxy device. For instance, rather than reporting channel measurements via a primary communication channel to a network, the client terminal may be adapted to perform (a) channel measurement feedback using out-of-band signaling via the proxy device and/or (b) active synchronization with assistance of a proxy device. In this manner, the client terminal may be able to disable or reduce power consumption over a primary communication interface for the primary communication channel while utilizing a secondary communication interface to communicate with the proxy device.

Abstract: A system and method for operating an electronic device having a High-Definition Multimedia Interface port that is shared between an HDMI source function and an HDMI sink function of the electronic device utilizes detecting whether an external HDMI device that is attached to the HDMI port is one of an HDMI source and an HDMI sink. If the external HDMI device is detected as being an HDMI source, the HDMI sink function of the electronic device is enabled. If the external HDMI device is detected as being an HDMI sink, the HDMI source function of the electronic device is enabled.

Abstract: A method and apparatus to monitor architecture events is disclosed. The architecture events are linked together via a push bus mechanism with each architectural event having a designated time slot. There is at least one branch of the push bus in each core. Each branch of the push bus may monitor one core with all the architectural events. All the data collected from the events by the push bus is then sent to a power control unit.

Abstract: Provided are systems and methods for execution by a core of a peripheral component to provide power management for a data bus in a electronic device, such as a mobile electronic device. One method comprises determining whether a device in the peripheral component is inactive, transmitting a request for deactivation of at least one data channel to the device, receiving a command to deactivate the at least one data channel, determining whether any remaining devices in the peripheral component are active, and placing the peripheral component in a first low power mode wherein the core remains active in order to monitor a data bus clock.

Abstract: An image forming apparatus includes: an image forming unit; a power supply controller controls the image forming apparatus to operate in a power saving mode, in which supply of power to the image forming unit is cut off, and a normal mode; and a plurality of interfaces that receives a transition command for transitioning from the power saving mode to the normal mode. The power supply controller is configured to perform: an interface-power supply process of supplying power to at least one interface; a determining process of determining whether availability is high or low for an operating interface receiving power supply in the interface-power supply process; and a changing process of changing a power supply target from the operating interface to an idle interface when the availability of the operating interface is determined to be low.

Abstract: A method for saving power in transmission of data across buses. By knowing the power characteristics of a bus and characteristics of data to be transmitted across the bus, the data can be encoded in such a fashion as to conserve system power over transmitting the same data in an unencoded format across the bus. The encoding method may be selected before transmission of the data across the bus, and may change depending on the data to be transmitted across the bus.

Abstract: Embodiments of the invention relate to a method and apparatus for a zero voltage processor sleep state. A processor may include a dedicated cache memory. A voltage regulator may be coupled to the processor to provide an operating voltage to the processor. During a transition to a zero voltage power management state for the processor, the operational voltage applied to the processor by the voltage regulator may be reduced to approximately zero and the state variables associated with the processor may be saved to the dedicated cache memory.