Counting, Scheduling, Or Event Timing Patents (Class 713/502)
  • Patent number: 10430210
    Abstract: A device, includes an instruction buffer. The instruction buffer is configured to store instructions related to at least a portion of a data stream to be analyzed by a state machine engine as the device. The state machine engine includes configurable elements configured to analyze the at least a portion of a data stream and to selectively output the result of the analysis. Additionally, the instruction buffer is configured to receive the indications as part of a direct memory access (DMA) transfer.
    Type: Grant
    Filed: December 29, 2015
    Date of Patent: October 1, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Harold B Noyes, David R. Brown, Paul Glendenning
  • Patent number: 10429798
    Abstract: For generating timer data, a processor identifies a timer command from a command signal from an input device. The processor further identifies a timer interval and timer characteristics from the timer command. In addition, the processor generates timer data comprising a timer tag from the timer characteristics and the timer interval.
    Type: Grant
    Filed: May 9, 2017
    Date of Patent: October 1, 2019
    Assignee: Lenovo (Singapore) PTE. LTD.
    Inventors: John Weldon Nicholson, Ming Qian, Jonathan Jen-Wei Yu
  • Patent number: 10423795
    Abstract: The disclosure provides a method, a checking device and a system for determining security of a processor. The method comprises: setting an initial running state of the checking device according to initial running state information of the processor during the target running process, and taking input information of the processor during the target running process as input information of the checking device; causing the checking device to execute a task of the target running process in a manner conforming to predefined behavior to obtain at least one of output information and final running state information of the checking device, wherein the predefined behavior is a standard of hardware behavior of the processor; and determining whether the processor is secure during the target running process according to at least one of the output information and the final running state information of the checking device when the checking device completes the task of the target running process.
    Type: Grant
    Filed: November 6, 2017
    Date of Patent: September 24, 2019
    Assignee: Tsinghua University
    Inventors: Leibo Liu, Ao Luo, Shaojun Wei
  • Patent number: 10416995
    Abstract: A technique for providing environmental impact information associated with code includes determining, based on execution of the code on a computer system, an environmental impact of a code execution sequence included in the code. A section of the code that is associated with the code execution sequence is then annotated with environmental impact information associated with the environmental impact of the code execution sequence.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: September 17, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Rick Allen Hamilton, II, James R. Kozloski, Brian Marshall O'Connell, Clifford Alan Pickover, Keith Raymond Walker
  • Patent number: 10361933
    Abstract: An apparatus and method for a power-efficient framework to maintain data synchronization of a mobile personal computer (MPC) are described. In one embodiment, the method includes the detection of a data synchronization wakeup event while the MPC is operating according to a sleep state. Subsequent to wakeup event, at least one system resource is disabled to provide a minimum number of system resources required to re-establish a network connection. In one embodiment, user data from a network server is synchronized on the MPC without user intervention; the mobile platform system resumes operation according to the sleep state. In one embodiment, a wakeup alarm is programmed according to a user history profile regarding received e-mails. In a further embodiment, data synchronizing involves disabling a display, and throttling the system processor to operate at a reduced frequency. Other embodiments are described and claimed.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: July 23, 2019
    Assignee: Intel Corporation
    Inventors: Shobhit Varshney, Prashant Gandhi, Mandar S. Joshi, Uttam K. Sengupta, Shreekant S. Thakkar
  • Patent number: 10324797
    Abstract: A fault-tolerant distributed real-time computer system for controlling a physical system, in particular a machine or a motor vehicle, wherein the components of the computer system have access to a global time of known precision, and wherein the node computers and intelligent sensors and the intelligent actuators exchange time-triggered messages and event-triggered messages periodically via the distributor units, and wherein the functions of the user software are contained in real-time software components—RTSC—and the periodic time-triggered data transfer between the RTSC is specified by a time-triggered data flow diagram, and wherein the assignment of the RTSC to a TTVM of a node computer and specific parameters of the TTVM are contained in active local allocation plans for each RTSC, and wherein the time plans for the time-triggered communication in this distributor unit are contained in active local allocation plans for each distributor unit, and wherein a global allocation plan consists of the totality of
    Type: Grant
    Filed: February 23, 2017
    Date of Patent: June 18, 2019
    Assignee: TTTech Auto AG
    Inventor: Hermann Kopetz
  • Patent number: 10248595
    Abstract: An interrupt interface of a central processing unit (CPU) comprises a bus with a plurality of interfaces to various components of the CPU. These components can include a memory that includes instructions to execute operations of a processor component, a plurality of virtual machines (VMs) and a virtual machine monitor (VMM)/hypervisor configured to execute the plurality of VMs. The processor can receive interrupt requests (interrupt) as service requests in parallel, which can be executed by the VMM or any one or more of the plurality of VMs to execute VM applications on a dedicated instance of a guest operating system for a task. The processor can further determine whether to grant an interrupt request to the VMM and the VMs based on predetermined criteria, including a current task priority, a pending interrupt priority, or an interrupt enable, associated with the current status of each of the component.
    Type: Grant
    Filed: August 10, 2017
    Date of Patent: April 2, 2019
    Assignee: Infineon Technologies AG
    Inventors: Frank Hellwig, Gerhard Wirrer, Glenn Farrall, Neil Hastie
  • Patent number: 10228958
    Abstract: In one embodiment, a method includes continuously receiving time-series data for end-user transactions occurring on one or more monitored systems. The method further includes continuously processing and storing the time-series data in a plurality of virtual machines. In addition, the method includes, responsive to a determined time-series-data burst, spawning one or more temporary virtual machines. Moreover, the method includes, during the determined time-series-data burst, continuously processing and storing the time-series data in the plurality of virtual machines and in the one or more temporary virtual machines. The method also includes, responsive to a determined conclusion of the determined time-series-data burst, causing the one or more temporary virtual machines to transition to a passive state in which the one or more temporary virtual machines cease processing and storing new time-series data but make previously-stored time-series data available for access.
    Type: Grant
    Filed: December 5, 2014
    Date of Patent: March 12, 2019
    Assignee: Quest Software Inc.
    Inventors: Joseph Rustad, Robert A. Dickinson
  • Patent number: 10229275
    Abstract: A system and method for securely recording voice communications, comprising an authentication server, further comprising at least a software components operating on a network-capable computing device, and a database, wherein an authentication server verifies the validity of voice communications and a database stores voice communication recordings.
    Type: Grant
    Filed: December 12, 2017
    Date of Patent: March 12, 2019
    Assignee: NewVoiceMedia, Ltd.
    Inventor: Ashley Unitt
  • Patent number: 10230670
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for a watermark-based message queue. One of the methods includes receiving a first connection request for messages associated with a user device. A first connection session is established with the user device. A message queue of messages associated with the user device is identified, each message in the message queue is associated with a respective timestamp, and the message queue is associated with a current watermark that identifies a first timestamp. An oldest message in the message queue at the time the first connection session was established is identified. An updated watermark that identifies a second timestamp associated with the oldest message is associated with the message queue. One or more messages that have a timestamp newer than or equal to the first timestamp identified by the current watermark is provided to the user device.
    Type: Grant
    Filed: November 10, 2014
    Date of Patent: March 12, 2019
    Assignee: Google LLC
    Inventors: Yi Cui, Subir Jhanb, Thomas R. Kennedy, III
  • Patent number: 10172041
    Abstract: A more efficient mobile device can be achieved via an optimization process based on display screen dormancy. Application data transmissions can be throttled based on a screen-on or screen-off status of a mobile device. Furthermore, an application management platform can be used to prioritize application data transmissions based on data associated with each application's packet transmissions.
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: January 1, 2019
    Assignee: AT&T INTELLECTUAL PROPERTY I, L.P.
    Inventors: Subhabrata Sen, Oliver Spatscheck, Junxian Huang, Zhuoqing Morley Mao, Feng Qian
  • Patent number: 10133654
    Abstract: A method for firmware debug trace capture includes creating a hand-off block (“HOB”), capturing first debug trace statements during a boot sequence of a computer and writing the first debug trace statements to the HOB. A trace memory buffer can be created and the first debug trace statements can be copied from the HOB to the trace memory buffer. Second debug trace statements are captured during the boot sequence and appended to the trace memory buffer. In some configurations, the first debug trace statements can be written to the HOB during the pre-Extensible Firmware Interface initialization (“PEI”) phase of the boot sequence and the second debug trace statements can be written to the trace memory buffer during the driver execution (“DXE”) phase of the boot sequence.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: November 20, 2018
    Assignee: American Megatrends, Inc.
    Inventors: Michael Harry Deiderich, III, Matthew Hoffmann, Thomas Gilreath
  • Patent number: 10133873
    Abstract: The present invention addresses the deficiencies of the art in respect to data security control and provides a method, system and computer program product for securing confidential data through transient on-demand data security control. In one embodiment of the invention, a method of securing confidential data can be provided. The method can include decrypting confidential data in a document, determining a subset of the confidential data specified by an author of the document, rendering a view of the confidential data including the subset, and, in response to detecting when an authorized viewer of the document no longer views the document, concealing the subset of the confidential data while maintaining a view of the confidential data not included in the subset.
    Type: Grant
    Filed: September 9, 2007
    Date of Patent: November 20, 2018
    Assignee: International Business Machines Corporation
    Inventors: Barry A. Kritt, Thomas S. Mazzeo, Rodney E. Shepard, II
  • Patent number: 10075352
    Abstract: An application analysis computer receives reports from user terminals which contain application performance metrics and dimensions having values characterizing the applications and the user terminals. Statistics for each different one of the performance metrics across the reports are generated for repeating time intervals. One of the statistics that has changed between two of the time intervals by an amount that satisfies a defined rule is identified, and the associated performance metric is selected for analysis. For each combination of a different one of the dimensions and a different one of the values occurring for the dimension, a statistic is generated for the selected performance metric associated with the combination, and a counter is incremented that tracks a number of occurrences of the combination among the reports. Sets of the statistic and the counter for particular ones of the combinations that satisfy an action rule are identified.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: September 11, 2018
    Assignee: CA, INC.
    Inventor: Sreenivas Gukal
  • Patent number: 10007320
    Abstract: Serializers and deserializers for odd ratio parallel data buses are disclosed. In one embodiment, serializers and deserializers operating with an odd number of parallel data bits work with a half-rate clock to provide a serial data stream at a full clock rate. By providing a half-rate clock, power and area are conserved on the integrated circuit incorporating the serializer. Additionally, by providing a 7:1 serializer, the bus is now compatible with the MIPI C-PHY standard.
    Type: Grant
    Filed: May 21, 2014
    Date of Patent: June 26, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Le Zhang, Wenjun Su, Chulkyu Lee
  • Patent number: 9971392
    Abstract: Serializers and deserializers for odd ratio parallel data buses are disclosed. In one embodiment, serializers and deserializers operating with an odd number of parallel data bits work with a half-rate clock to provide a serial data stream at a full clock rate. By providing a half-rate clock, power and area are conserved on the integrated circuit incorporating the serializer. Additionally, by providing a 7:1 serializer, the bus is now compatible with the MIPI C-PHY standard.
    Type: Grant
    Filed: May 21, 2014
    Date of Patent: May 15, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Le Zhang, Wenjun Su, Chulkyu Lee
  • Patent number: 9956430
    Abstract: A remote control system is configured to support communication between a first environment having a first neutron radiation level and a second environment having a second neutron radiation level includes a first computing device and a second computing device. The first computing device is configured to control a treatment system in the first environment. The second computing device is configured to issue commands in the second environment for the treatment system. The first computing device is further configured to determine whether to enable or disable a function supported by the treatment system, determine whether there is pending time-sensitive data to transmit, and periodically transmit a first radiation therapy data collected in the first environment and a first interrupt to the second computing device in a servo loop.
    Type: Grant
    Filed: January 25, 2013
    Date of Patent: May 1, 2018
    Assignee: VARIAN MEDICAL SYSTEMS, INC.
    Inventors: Paolo Dalla Ricca, Kevin Greenberg
  • Patent number: 9960870
    Abstract: A method and a correspondingly designed device for data transfer in a computer network, the method including transmitting a first message addressed by a first node of the computer network to a second node of the computer network for requesting information regarding the synchronicity of the second node with an element of the computer network, receiving a second message addressed by the second node of the computer network to the first node of the computer network with information regarding the synchronicity of the second node with the element, and ascertaining a status of the synchronization of the second node with the element with the aid of the received information.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: May 1, 2018
    Assignee: ROBERT BOSCH GMBH
    Inventor: Helge Zinner
  • Patent number: 9952932
    Abstract: A computer implemented method for providing fault tolerance to a plurality of instances in a system including a plurality of surviving instances includes: determining, for each of the surviving instances, an aggregate load by: retrieving a job load of each job assigned to the respective surviving instance; and summing the job loads of all of the jobs assigned to the respective surviving instance; and selecting to recover and perform, by one of the surviving instances, an orphaned job based upon the aggregate loads of the surviving instances.
    Type: Grant
    Filed: November 2, 2015
    Date of Patent: April 24, 2018
    Assignee: Chicago Mercantile Exchange Inc.
    Inventor: Erik Helleren
  • Patent number: 9910703
    Abstract: A method is provided for efficiently scheduling timer events within an operating system by allocating a plurality of timers, each of which has an expiry time, to a set of available timer slots. The method defines a timer spread value that denotes the allowed variance of the expiry times of each of the timers, calculates a set of available timer slots for each of the timers based on the timer spread value, and adjusts the expiry times of the timers so as to insert and evenly spread the timers across the set of available timer slots. In one implementation, the set of available timer slots is located in a timer wheel existing within the operating system, and the timer wheel uses a plurality of timer vectors arranged into successively increasing levels, beginning with level zero.
    Type: Grant
    Filed: May 17, 2016
    Date of Patent: March 6, 2018
    Assignee: Accedian Networks Inc.
    Inventors: Andre Dupont, Thierry DeCorte
  • Patent number: 9858169
    Abstract: A data processing apparatus is disclosed that comprises monitoring circuitry for monitoring accesses to a plurality of addressable locations within said data processing apparatus that occur between start and end events said monitoring circuitry comprising: an address location store for storing data identifying said plurality of addressable locations to be monitored and a monitoring data store; said monitoring circuitry being responsive to detection of said start event to detect accesses to said plurality of addressable locations and to store monitoring data relating to a summary of said detected accesses in said monitoring data store; and said monitoring circuitry being responsive to detection of said end event to stop collecting said monitoring data; said monitoring circuit being responsive to detection of a flush event to output said stored monitoring data and to flush said monitoring data store.
    Type: Grant
    Filed: July 7, 2009
    Date of Patent: January 2, 2018
    Assignee: ARM Limited
    Inventors: Alastair David Reid, Katherine Elizabeth Kneebone, Jan Guffens, Lee Douglas Smith
  • Patent number: 9842216
    Abstract: A system and method for securely recording voice communications, comprising an authentication server, further comprising at least a software components operating on a network-capable computing device, and a database, wherein an authentication server verifies the validity of voice communications and a database stores voice communication recordings.
    Type: Grant
    Filed: January 24, 2017
    Date of Patent: December 12, 2017
    Assignee: NewVoiceMedia, Ltd.
    Inventor: Ashley Unitt
  • Patent number: 9836294
    Abstract: Exemplary method embodiments for deploying code in a computing sysplex environment are provided. In one embodiment, by way of example only, a system-wide trending mechanism is applied. At least one of an idle time and a low Central Processing Unit (CPU) utilization time of one system in the sysplex environment is matched with an estimated deployment time obtained from at least one of a latest measured period of time and a calculated time trend. A system-wide coordinating mechanism is applied. A staggered code deployment operation is recommended for at least one node of the system at an optimum system time generated from the matching.
    Type: Grant
    Filed: March 5, 2015
    Date of Patent: December 5, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Joseph W. Dain
  • Patent number: 9824130
    Abstract: Optimizing synchronization of enterprise content management systems is described. A system identifies multiple synchronization intervals corresponding to multiple synchronization tasks. The system estimates multiple execution times corresponding to the multiple synchronization tasks. The system calculates multiple remaining times corresponding to the multiple synchronization tasks, wherein the multiple remaining times are based on the multiple synchronization intervals corresponding to the multiple synchronization tasks minus the multiple execution times corresponding to the multiple synchronization tasks. The system orders the multiple synchronization tasks for execution based on corresponding multiple remaining times, from a lowest remaining time to a highest remaining time.
    Type: Grant
    Filed: December 13, 2013
    Date of Patent: November 21, 2017
    Assignee: Open Text Corporation
    Inventors: Dmitry Y. Korshunov, Dmitry Volchegursky, Shu-Shang Sam Wei, Linda J. Wong, Dmitry Limonov, Boris Shpilyuck
  • Patent number: 9766611
    Abstract: An automation interface is provided for interacting with industrial controllers. The automation interface provides for programming, editing, monitoring and maintenance of industrial controllers programmatically from a local or remote location. The automation interface component is adapted to communicate with industrial controllers by integrating a computer process interface library into the automation interface component. The computer process interface library exposes the automation interface component to client application processes, so that the client application processes can communicate with the at least one industrial controller programmatically. The automation interface is provided with functionality for downloading, uploading and programming of control programs to the processors of the industrial controllers.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: September 19, 2017
    Assignee: ROCKWELL AUTOMATION, INC.
    Inventors: Jeffrey A. McKelvey, Mike D'Amico
  • Patent number: 9703544
    Abstract: Managing updates to executable programming code on a computer system in a computer network. A maintenance service utility is configured to launch a maintenance procedure at a specified time during operation of the computer system. Operation of a maintenance timer utility is activated during startup of the computer system to track and monitor the amount of time the computer system has been operating since startup. The maintenance service utility determines if there any updates to the executable programming code that require installation. The maintenance procedure is launched after a specified time if there are updates to the executable programming code. The computer system is automatically rebooted to install the updates to the executable programming code. A maintenance service editor utility enables the maintenance service utility to be configured to launch the maintenance procedure after a specified time if there are updates to the executable programming code.
    Type: Grant
    Filed: September 22, 2015
    Date of Patent: July 11, 2017
    Assignee: Open Invention Network, LLC
    Inventor: Colin Feeser
  • Patent number: 9693313
    Abstract: A method of coordinating tasks of a mobile computing device may include initializing a timer associated with one or more tasks and a state condition. The state condition may depend on a device state of the mobile computing device and/or a component state of a mobile computing device component. An expiration of the timer is detected. Upon detecting the expiration, a determination is made whether the state condition is satisfied based on whether the mobile computing device is in the device state and/or the mobile computing device component is in the component state. Based at least in part on the determination that the state condition is satisfied, performance of the one or more tasks associated with the timer can be initiated.
    Type: Grant
    Filed: November 19, 2014
    Date of Patent: June 27, 2017
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Sudeesh R. Pingili, Bharath Siravara, Martin Regen, Ray Brown, Justin Mann, Stephane Karoubi, Li Xu
  • Patent number: 9678531
    Abstract: A timer distribution module supports multiple timers and comprises: a command decoder arranged to determine expiration times of a plurality of timers; and a timer link list distribution adapter, LLDA, operably coupled to the command decoder. The LLDA is arranged to: receive a time reference from a master clock; receive timer data from the command decoder wherein the timer data comprises at least one timer expiration link list; construct a plurality of timer link lists based on at least one of: the timer expiration link list, at least one configurable timing barrier; dynamically split the link list timer data into a plurality of granularities based on the timer expiration link list; and output the dynamically split link list timer data.
    Type: Grant
    Filed: February 14, 2014
    Date of Patent: June 13, 2017
    Assignee: NXP USA, INC.
    Inventors: Ron Bar, Evgeni Ginzburg, Eran Glickman
  • Patent number: 9659042
    Abstract: A data lineage tracking system may include a memory storing a module comprising machine readable instructions to obtain trace log entries representing an interaction with, a manipulation of, and/or a creation of a data value. The data lineage tracking system may further include machine readable instructions to select the trace log entries that are associated with commands performed by an application, cluster similar trace log entries from the selected trace log entries, and analyze mappings between the clustered trace log entries to determine data lineage flow associated with the data value.
    Type: Grant
    Filed: June 12, 2012
    Date of Patent: May 23, 2017
    Assignee: ACCENTURE GLOBAL SERVICES LIMITED
    Inventors: Colin A. Puri, Doo Soon Kim, Peter Z. Yeh, Kunal Verma
  • Patent number: 9600358
    Abstract: Example embodiments of the present invention provide a method, an apparatus, and a computer program product for scalable monitoring and error handling in multi-latency systems. The method includes gathering events from a multi-latency logical data store comprising a first data store having a first data latency and a second related data store having a second data latency substantially different than the first data latency. Processing then may be performed on the gathered events, with notification of the processed events provided toward downstream queues for consumption. In certain embodiments, consumption comprises holistic error handling; according, in those embodiments holistic error handling of the multi-latency logical data store may be performed according to the notification of the processed gathered events asynchronously from gathering events from the multi-latency logical data store.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: March 21, 2017
    Assignee: EMC IP Holding Company LLC
    Inventors: David Stephen Reiner, Nihar K. Nanda, John D. Hushon, Jr.
  • Patent number: 9553982
    Abstract: A system and method for securely recording voice communications, comprising an authentication server, further comprising at least a software components operating on a network-capable computing device, and a database, wherein an authentication server verifies the validity of voice communications and a database stores voice communication recordings.
    Type: Grant
    Filed: December 16, 2015
    Date of Patent: January 24, 2017
    Assignee: NewVoiceMedia, Ltd.
    Inventor: Ashley Unitt
  • Patent number: 9507643
    Abstract: A virtualized application delivery controller (ADC) device operable in a communication network comprises a hardware infrastructure including at least a memory, a plurality of core processors, and a network interface; a plurality of instances of virtual ADCs (vADCs), the plurality of vADCs are executed over the hardware infrastructure, each of the plurality of vADCs utilizes a portion of hardware resources of the hardware infrastructure, the portion of hardware resources are determined by at least one ADC capacity unit allocated for each of the plurality of the vADCs; a management module for at least creating the plurality of instances of the vADCs; and a traffic distributor for distributing incoming traffic to one of the plurality of vADCs and scheduling execution of the plurality of vADCs on the plurality of core processors, wherein each of the plurality of vADCs is independently executed on at least one of the plurality of core processors.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: November 29, 2016
    Assignee: Radware, Ltd.
    Inventors: Ilia Ferdman, Amir Peles, Uri Bechar, Gil Shulman, Giora Tenne
  • Patent number: 9483306
    Abstract: A calculation device is provided that executes calculations within real-time restrictions. The calculation device implements a step of predicting a processing time of a calculation related to the amount and property of input data based on a prediction model; a step of adjusting the processing time by decreasing the amount of data used for the calculation or decreasing the number of iterative calculations when the processing time exceeds a time slice allocated to the calculation; a step of executes the calculation using the adjusted processing time; a step of updating, as required, the prediction model used for predicting the processing time according to the result of the calculation which is executed in a period where the calculation is not performed while implementing a change of the amount of data or the number of iterative calculations or change to an approximation.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: November 1, 2016
    Assignee: Hitachi, Ltd.
    Inventors: Yoshiyuki Tajima, Koichiro Iijima, Tohru Watanabe, Takaharu Ishida
  • Patent number: 9430313
    Abstract: Methods, non-transitory storage medium, and systems for generating an aggregated list of problem conditions associated with blade servers to facilitate efficient debugging thereof. In a blade server environment, each chassis is equipped with a chassis management module and each blade in each chassis is associated with a blade management controller. A data map representing the relationships between the blade servers and the shared resources is utilized by a chassis management module to aggregate and link problem conditions sensed by any of the blade management controllers.
    Type: Grant
    Filed: September 10, 2013
    Date of Patent: August 30, 2016
    Assignee: International Business Machines Corporation
    Inventors: Ajay Kumar Mahajan, Venkatesh Sainath
  • Patent number: 9418093
    Abstract: A method for high-speed scheduling and arbitration of events for computing and networking is disclosed. The method includes the software and hardware implementation of a unique data structure, known as a pile, for scheduling and arbitration of events. According to the method, events are stored in loosely sorted order in piles, with the next event to be processed residing in the root node of the pile. The pipelining of the insertion and removal of events from the piles allows for simultaneous event removal and next event calculation. The method's inherent parallelisms thus allow for the automatic rescheduling of removed events for re-execution at a future time, also known as event swapping. The method executes in O(1) time.
    Type: Grant
    Filed: September 12, 2011
    Date of Patent: August 16, 2016
    Assignee: Altera Corporation
    Inventors: Paul Nadj, David Walter Carr, Edward D. Funnekotter
  • Patent number: 9385691
    Abstract: Provided is a timing control device including: a storage unit that stores multiple pieces of timing control information including identification information and expected value data; a first selector that selectively outputs any of the multiple pieces of timing control information; a second selector that selectively outputs any of data items output from data output devices based on the identification information; a reference data generation unit that generates reference data based on expected value data and a data item output from the second selector in synchronization with a switching of the timing control information; a comparator that compares the reference data with the data item output from the second selector and outputs a coincidence signal when the reference data and the data item coincide with each other; and an output control unit that outputs a timing signal according to the coincidence signal.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: July 5, 2016
    Assignee: Renesas Electronics Corporation
    Inventor: Atsushi Takahashi
  • Patent number: 9378784
    Abstract: A security device includes a controller configured to determine a flow identifier and an event counter associated with a received data packet and a counter memory including multiple memory banks where each memory bank stores a partial counter value for one or more event counters. The counter memory is indexed by a counter identifier associated with the event counter. A memory controller selects a memory bank in the counter memory that was not the memory bank last selected and the partial counter value associated with the counter identifier in the selected memory bank is updated, the updated partial counter value being written back to the selected memory bank. In one embodiment, the partial counter value is updated and written back within the latency window of the memory bank last selected.
    Type: Grant
    Filed: January 23, 2013
    Date of Patent: June 28, 2016
    Assignee: Palo Alto Networks, Inc.
    Inventors: De Bao Vu, Gyanesh Saharia
  • Patent number: 9367352
    Abstract: A method is provided for efficiently scheduling timer events within an operating system by allocating a plurality of timers, each of which has an expiry time, to a set of available timer slots. The method defines a timer spread value that denotes the allowed variance of the expiry times of each of the timers, calculates a set of available timer slots for each of the timers based on the timer spread value, and adjusts the expiry times of the timers so as to insert and evenly spread the timers across the set of available timer slots. In one implementation, the set of available timer slots is located in a timer wheel existing within the operating system, and the timer wheel uses a plurality of timer vectors arranged into successively increasing levels, beginning with level zero.
    Type: Grant
    Filed: April 21, 2015
    Date of Patent: June 14, 2016
    Assignee: Accedian Networks Inc.
    Inventors: Andre Dupont, Thierry DeCorte
  • Patent number: 9367335
    Abstract: A method and computer program product for implementing the method, where the method comprises obtaining boot dependencies among a plurality of systems, wherein a boot dependency identifies a dependent system, a service system that provides a service to the dependent system, a provide state of the service system, and a need state of the dependent system that requires the service system to have reached the provide state. The method further comprises obtaining historical measurements of the time periods between states for each of the systems. Then, during a process of booting the plurality of systems, the method initiates boot of each dependent system at a time that is determined, based on the historical measurements, to allow the dependent system to reach the need state no earlier than the time at which the service system is determined, based on the historical measurements, to reach the provide state.
    Type: Grant
    Filed: July 12, 2013
    Date of Patent: June 14, 2016
    Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
    Inventors: Thomas J. Alandt, Shareef F. Alshinnawi, Gary D. Cudak, Edward S. Suffern, J. Mark Weber
  • Patent number: 9331838
    Abstract: A method for synchronizing clocks in nodes of a vehicle network of a motor vehicle corrects a time difference between a master clock and a slave clock, taking into account transmission delay for a message between a master node and a slave node. At least for a first synchronization of the master clock to a slave clock after the nodes of the vehicle network are started up, a default transmission delay in the slave node is used to correct the time difference, and/or the slave node sending out a Delay Request message, and recording in the master node the time at which Delay Request message is received and the master node sending the time, as a Delay Response message, back to the slave node. In the slave node, the transmission delay for a message between the master node and the slave node is determined.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: May 3, 2016
    Assignee: Continental Automotive GmbH
    Inventors: Josef Nöbauer, Helge Zinner
  • Patent number: 9323475
    Abstract: A control method for an information processing system including a first computer, a second computer, and a plurality of storage devices coupled to the first computer and the second computer through a switch, a processing performance of the second computer being higher than a processing performance of the first computer, the control method includes setting, by the switch, the first computer as a target for connection of the plurality of storage devices; transmitting, by the first computer, data to be processed from the first computer to the plurality of storage devices and thereby storing the data in the plurality of storage devices; switching, by the switch, the target from the first computer to the second computer when the storing is completed; and executing, by the second computer, processing of the data stored in the plurality of storage devices.
    Type: Grant
    Filed: September 5, 2014
    Date of Patent: April 26, 2016
    Assignee: FUJITSU LIMITED
    Inventor: Takatsugu Ono
  • Patent number: 9323228
    Abstract: The present invention provides a method and an apparatus for wake-up control of an intelligent terminal. At least two alarm set indications are sent by one or more applications of the intelligent terminal. The alarm set indication is used to indicate a first alarm wake-up time determined by the application for waking up the intelligent terminal. At least two of the at least two first alarm wake-up times corresponding to the at least two alarm set indications are delayed until a second alarm wake-up time. The second alarm wake-up time is determined according to preset adjustment control information. The intelligent terminal is welcome at the second alarm wake-up time.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: April 26, 2016
    Assignee: HUAWEI DEVICE CO., LTD.
    Inventors: Xiaoping Zhu, Yonghong Qiao, Bingtian Han
  • Patent number: 9311262
    Abstract: A transmission control device in the present invention includes: a data storage memory in which data are written; a plurality of data copy memories into which the data written in the data storage memory are copied; an unread copy-memory selection unit that selects one of the data copy memories for which reading of data is not performed from among the data copy memories; a memory copy unit that copies the data written in the data storage memory into a data copy memory selected by the unread copy-memory selection unit; a read copy-memory selection unit that selects a data copy memory into which the memory copy unit copies data from among the data copy memories; and a data output unit that reads data from a data copy memory selected by the read copy-memory selection unit and outputs the read data to a transmission unit.
    Type: Grant
    Filed: February 9, 2010
    Date of Patent: April 12, 2016
    Assignee: Mitsubishi Electric Corporation
    Inventor: Eitarou Hioki
  • Patent number: 9304809
    Abstract: Disclosed are systems and methods for processing events in an event stream using a map-update application. The events may be embodied as a key-attribute pair. An event is processed by one or more instances implementing either a map or an update function. A map function receives an input event from the event stream and publishes one or more events to the event stream. An update function receives an event and updates a corresponding slate and publishes zero or more events. Systems and methods are also disclosed herein for implementing a map-update application in a multithreaded architecture and for handling overloading of a particular thread or node. Systems and methods for providing access to slates updated according to update operations are also disclosed.
    Type: Grant
    Filed: July 19, 2012
    Date of Patent: April 5, 2016
    Assignee: Wal-Mart Stores, Inc.
    Inventors: Wang Chee Lam, Lu Liu, Taraka Subrahmanya Prasad Siripurapu, Anand Rajaraman, Zoheb Vacheri, AnHai Doan
  • Patent number: 9244732
    Abstract: A thread (or other resource consumer) is compensated for contention for system resources in a computer system having at least one processor core, a last level cache (LLC), and a main memory. In one embodiment, at each descheduling event of the thread following an execution interval, an effective CPU time is determined. The execution interval is a period of time during which the thread is being executed on the central processing unit (CPU) between scheduling events. The effective CPU time is a portion of the execution interval that excludes delays caused by contention for microarchitectural resources, such as time spent repopulating lines from the LLC that were evicted by other threads. The thread may be compensated for microarchitectural contention by increasing its scheduling priority based on the effective CPU time.
    Type: Grant
    Filed: August 28, 2009
    Date of Patent: January 26, 2016
    Assignee: VMware, Inc.
    Inventors: Richard West, Puneet Zaroo, Carl A. Waldspurger, Xiao Zhang
  • Patent number: 9223515
    Abstract: The present invention discloses devices and methods for a connectivity hub, for connecting a plurality of storage devices to a host system, including: a plurality of ports, each port operative to electrically engage with a storage device; electrical paths joining the plurality of ports to a common point operationally connected to the host system; and a controller operative to associate a relative physical location with a logical identity for each port. Preferably, the controller is configured to perform the association by correlating an insertion time of the storage device in a respective port with a detection time of the logical identity. A connectivity hub, for connecting a plurality of storage devices to a host system, including: at least 23 ports, each port operative to electrically engage with a corresponding storage device; and electrical paths joining at least 23 ports to a common point operationally connected to the host system.
    Type: Grant
    Filed: September 25, 2007
    Date of Patent: December 29, 2015
    Assignee: SANDISK IL LTD.
    Inventors: Idan Alrod, Itzhak Pomerantz, Nitzan Achsaf, Mordechai Teicher
  • Patent number: 9225544
    Abstract: To provide a communication system and a communication method that are capable of determining with a simple configuration the validity of a message that is communicated with the communication system, a plurality of ECUs is connected in the communication system to a communication bus, allowing communication of messages. A communication interval, which is defined for each message being communicated, is set for each ECU. The ECU that transmits the message transmits the message on the basis of the defined communication interval. The ECU that receives the transmitted message detects the communication interval of the received message, and determines the validity of the received message on the basis of a comparison between the detected communication interval and the defined communication interval.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: December 29, 2015
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Mitsuhiro Mabuchi, Kazuhiro Okude
  • Patent number: 9218201
    Abstract: A multicore system includes multiple processor cores; a scheduler in each of the processor cores and allocating a process to the processor cores when having a master authority that is an authority to assign processes; and a master controller performing control to repeat until a process to be executed no longer exists, a cycle in which the schedulers transfer the master authority to another processor core after receiving the master authority and before assigning a process to the processor cores, discards the master authority after assigning the process to the processor cores, and enters a state of waiting to receive the master authority.
    Type: Grant
    Filed: September 19, 2012
    Date of Patent: December 22, 2015
    Assignee: FUJITSU LIMITED
    Inventors: Koichiro Yamashita, Hiromasa Yamauchi
  • Patent number: 9210284
    Abstract: An image forming apparatus communicates with a plurality of data processing apparatuses via a plurality of interfaces. The image forming apparatus includes a determination unit configured to determine a communication state with the plurality of interfaces, and a control unit configured to perform control to switch between a first sleep mode in which power supplied to any one of the plurality of interfaces is turned off and a second sleep mode in which power supplied to the plurality of interfaces is repeatedly turned on and off at predetermined time intervals according to the communication state determined by the determination unit.
    Type: Grant
    Filed: May 3, 2012
    Date of Patent: December 8, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hiroshi Yamano
  • Patent number: 9210659
    Abstract: A method and an apparatus for controlling a dormancy mode of the portable terminal by minimizing the dormancy mode entry delay of the display in power-off state are provided. The method includes starting, when the application processor and the communication processor stop data communication in display power-off state, a dormancy mode timer, checking, when the dormancy mode timer expires, a dormancy mode flag indicating communication channel state, and entering, when the dormancy mode flag indicates a communication channel connection release state, the dormancy mode, wherein the dormancy mode timer counts a number of segments constituting a maximum standby time for entering the dormancy mode.
    Type: Grant
    Filed: May 24, 2013
    Date of Patent: December 8, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Taehwan Kim