Of Processor Patents (Class 714/10)
-
Patent number: 10002056Abstract: An integrated circuit (IC) chip can include a given core at a position in the IC chip that defines a given orientation, wherein the given core is designed to perform a particular function. The IC chip can include another core designed to perform the particular function. The other core can be flipped and rotated by 180 degrees relative to the given core such that the other core is asymmetrically oriented with respect to the given core. The IC chip can also include a compare unit configured to compare outputs of the given core and the other core to detect a fault in the IC chip.Type: GrantFiled: September 15, 2015Date of Patent: June 19, 2018Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Jasbir Singh Nayyar, Shashank Srinivasa Nuthakki, Rahul Gulati, Arun Shrimali
-
Patent number: 9992058Abstract: Method and apparatus for switching between a first server and a second server, each located within a virtual private cloud and the first server being located within a first zone and the second server being located within a second zone that is physically separate from the first zone. The method and apparatus further configured to determine that the first server has experienced a failure to send or receive data. The method and apparatus further configured to enable a second port on the second server. The method and apparatus further configured to create a new route table by the second server and flush the previous route table. The method and apparatus further configured to transmit, via the second port, a request to a virtual private cloud controller to update an elastic internet protocol address with the second port information and receive data from the virtual private cloud controller.Type: GrantFiled: November 17, 2017Date of Patent: June 5, 2018Assignee: SoftNAS Operating Inc.Inventor: Eric Olson
-
Patent number: 9959201Abstract: Embodiments for automated testing of a virtualization management system are described. According to one aspect, a method includes generating a test case including a plurality of instances of commands and sending the test case to a plurality of interfaces supported by the virtualization management system. The method also includes generating a response file corresponding to each command in the test case. The method also includes comparing results from each interface to an instance of a command and in response to the results from each interface being identical, storing, the results in the response file corresponding to the command. The method also includes reporting an error in response to the results from each interface of the virtualization management system not being identical. The present document further describes examples of other aspects such as systems, computer products.Type: GrantFiled: March 14, 2016Date of Patent: May 1, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Mohammad Abdirashid, Ali Y. Duale, Tariq Hanif
-
Patent number: 9940276Abstract: Disclosed is a PLC system having a plurality of CPU modules and a control method thereof, wherein the method includes ascertaining a clock signal when a count is a count corresponding to a time slot allocated by a master CPU module, generating a clock signal by accessing to a backplane, and ending generation of clock signal at a time when the access to the backplane ends.Type: GrantFiled: April 8, 2015Date of Patent: April 10, 2018Assignee: LSIS CO., LTD.Inventors: Soo Gang Lee, Dae Hyun Kwon
-
Patent number: 9940226Abstract: A system and method synchronizes heterogeneous agents in a computer system with a software synchronization mechanism. Agents of the computer system connected to a common memory, including agents lacking a hardware synchronization system, can be synchronized with the software synchronization mechanism. The synchronized agents can cause collisions on the same cache line in order to stress test the memory of the system. Each agent updates a first array to indicate it has arrived at the synchronization. After all the agents have arrived, each agent then updates a second array to announce its exit.Type: GrantFiled: May 26, 2016Date of Patent: April 10, 2018Assignee: International Business Machines CorporationInventors: Manoj Dusanapudi, Shakti Kapoor
-
Patent number: 9928132Abstract: Embodiments of the invention relate to dynamically routing instructions to execution units based on detected errors in the execution units. An aspect of the invention includes a computer system including a processor having an instruction issue unit and a plurality of execution units. The processor is configured to detect an error in a first execution unit among the plurality of execution units and adjust instruction dispatch rules of the instruction issue unit based on detecting the error in the first execution unit to restrict access to the first execution unit while leaving un-restricted access to the remaining execution units of the plurality of execution units.Type: GrantFiled: September 30, 2014Date of Patent: March 27, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Fadi Y. Busaba, Steven R. Carlough, Christopher A. Krygowski, Brian R. Prasky, Chung-Lung K. Shum
-
Patent number: 9910740Abstract: The present disclosure relates to managing concurrent recovery operations. Operation state may be stored in a repository managed by a service. The service may query the repository as requests come in, and take appropriate actions based on an identified state.Type: GrantFiled: June 30, 2014Date of Patent: March 6, 2018Assignee: EMC IP HOLDING COMPANY LLCInventors: Mohammed A. Akanda, Scott C. Teerink, Michael D. Hartway, Jerzy Gruszka
-
Patent number: 9891652Abstract: Aspects of the disclosure provide an integrated circuit and method for varying a frequency of a clock signal to accommodate critical paths in the integrated circuit. The integrated circuit can include a clock generator configured to generate a clock signal having a clock frequency that is variable, circuitry that includes a plurality of critical modules that can be selectively activated to operate under control of the clock signal, each critical module including one or more critical paths that a default clock frequency cannot accommodate, and a controller that causes the clock generator to vary the clock frequency of the clock signal based on propagation delays of those critical paths in activated critical modules.Type: GrantFiled: May 11, 2016Date of Patent: February 13, 2018Assignee: MARVELL ISRAEL (M.I.S.L) LTD.Inventors: Lev Epstein, Eitan Rosen
-
Patent number: 9893950Abstract: A network system includes a plurality of sub-network planes and global switches. The sub-network planes have a same network topology as each other. Each of the sub-network planes includes edge switches. Each of the edge switches has N ports. Each of the global switches is configured to connect a group of edge switches at a same location in the sub-network planes. In each of the sub-network planes, some of the N ports of each of the edge switches are connected to end nodes, and others of the N ports are connected to other edge switches in the same sub-network plane, other of the N ports are connected to at least one of the global switches.Type: GrantFiled: January 27, 2016Date of Patent: February 13, 2018Assignee: International Business Machines CorporationInventors: Dong Chen, Philip Heidelberger
-
Patent number: 9864603Abstract: A processor includes a front end including a decoder to decode an instruction, a scheduler to assign execution of the instruction to a core, and a core to execute the instruction. The instruction specifies that interrupts such as corrected machine check interrupts are to be selectively suppressed. The processor further includes an error handling unit including logic to determine that an interrupt caused by an error is to be created and that an error consumer has requested interrupt notification. The error handling unit further includes logic to, based on the instruction specifying that interrupts are to be selectively suppressed, send the interrupt to a producer that issued the instruction rather than the error consumer.Type: GrantFiled: September 26, 2014Date of Patent: January 9, 2018Assignee: Intel CorporationInventors: Ashok Raj, Mohan J. Kumar
-
Patent number: 9858177Abstract: Embodiments for automated testing of a virtualization management system are described. According to one aspect, a method includes generating a test case including a plurality of instances of commands and sending the test case to a plurality of interfaces supported by the virtualization management system. The method also includes generating a response file corresponding to each command in the test case. The method also includes comparing results from each interface to an instance of a command and in response to the results from each interface being identical, storing, the results in the response file corresponding to the command. The method also includes reporting an error in response to the results from each interface of the virtualization management system not being identical. The present document further describes examples of other aspects such as systems, computer products.Type: GrantFiled: October 30, 2015Date of Patent: January 2, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Mohammad Abdirashid, Ali Y. Duale, Tariq Hanif
-
Patent number: 9846633Abstract: A multi-staged method is disclosed in which a computing device generates tests to execute on an application program. The tests that are generated do not supplant or replace other types of testing typically executed on an application program, but rather, are generated based on the results of those tests and are intended to complement those tests. The multi-stage method particularly captures and stores information related to the tests as those tests are executed on the application program, verifies the data and parameters associated with the tests, and then generates a set of supplementary tests to test the application program responsive to receiving a notification message indicating that the program code of the application program has been changed.Type: GrantFiled: October 6, 2015Date of Patent: December 19, 2017Assignee: CA, Inc.Inventors: Saugata Chakraborty, Sudip Mitra, Swapnel Shrivastava
-
Patent number: 9836353Abstract: A determination is made as to whether one of a system definition file data set and a catalog data set is unavailable for orderly restart of an information system. The system definition file data set provides resource definition information for the information system and the catalog data set provides resource state information for the information system. A determination is made that the other of the system definition file data set and the catalog data set is available. The unavailable one of the system definition file data set and the catalog data set is reconstructed by rebuilding the system resource definition and state information used by the unavailable one of the system definition file data set and the catalog data set using system resource information within the other available one of the system definition file data set and the catalog data set.Type: GrantFiled: September 12, 2012Date of Patent: December 5, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Johnson, Mark W. T. Todd, Andrew Wright
-
Patent number: 9830237Abstract: One or more techniques and/or computing devices are provided for implementing resynchronization operations. For example, a disaster recovery relationship may be established between a source storage volume, hosted by a source storage node, and a destination storage volume hosted by a destination storage node, such that data is replicated from the source storage volume to the destination storage volume for disaster recovery purposes. If the disaster recovery relationship breaks, then new compliance data, locked down into a write once read many state, may be created at the destination storage volume. A resynchronization operation may be performed to reestablish the disaster recovery relationship, while preserving the new compliance data so that a compliance policy is not violated.Type: GrantFiled: September 25, 2015Date of Patent: November 28, 2017Assignee: NetApp, Inc.Inventors: Vaiapuri Ramasubramaniam, Balamurugan Ramajeyam, Aftab Ahman Ansari, Akshatha Gangadharaiah, Raman Madaan
-
Patent number: 9804917Abstract: Techniques are provided for recovering from non-correctable memory errors. A memory location may be accessed. It may be determined that the memory location contains a non-correctable error. A range of addresses associated with the memory location may be determined. Corrective action may be taken on the entire range of addresses to identify other addresses within the range of addresses that contain non-correctable memory errors.Type: GrantFiled: September 25, 2012Date of Patent: October 31, 2017Assignee: Hewlett Packard Enterprise Development LPInventor: Andrew Christopher Walton
-
Patent number: 9785480Abstract: Techniques for load balancing and fault tolerant service are described. An apparatus may comprise load balancing and fault tolerant component operative to execute a load balancing and fault tolerant service in a distributed data system. The load balancing and fault tolerant service distributes a load of a task to a first node in a cluster of nodes using a routing table. The load balancing and fault tolerant service stores information to indicate the first node from the cluster of nodes is assigned to perform the task. The load balancing and fault tolerant service detects a failure condition for the first node. The load balancing and fault tolerant service moves the task to a second node from the cluster of nodes to perform the task for the first node upon occurrence of the failure condition.Type: GrantFiled: February 12, 2015Date of Patent: October 10, 2017Assignee: NETAPP, INC.Inventors: Rakshit Kamawat, Veena TS, Ganesh Marappa
-
Patent number: 9785901Abstract: A process development and run time tool identifies dependent relationships between information sources and processes of an enterprise system at design time. The process development and run time tool determines a business value and business risk for each process and stores this information in an information source and process dependency table. The process development and run time tool determines if a particular information source is a critical business risk and if so adds redundancy for the critical risk information source and/or fault tolerance into the process design. An operating system assembles the dependent processes for run time evaluation. If a dependent information source fails at run time, the process development and run time tool identifies each process within the enterprise system that is dependent upon this failed information source.Type: GrantFiled: October 4, 2010Date of Patent: October 10, 2017Assignee: International Business Machines CorporationInventors: Asit Dan, Claus T. Jensen
-
Patent number: 9778625Abstract: A facility control system comprises a selection processing portion that selects, based on a manual operation and when an abnormal condition occurs in a second-layer computer that issues a task command to a first-layer program which issues an apparatus operating command to an apparatus controller, whether to cause a first-layer computer to execute a second-layer program that had been executed by the second-layer computer, and a substitute command output processing portion which outputs a substitute command in accordance with selection information selected by the selection processing portion. The first-layer computer executes the second-layer program that had been executed by the second-layer computer in which the abnormal condition occurred based on a substitute command outputted by the substitute command output processing portion.Type: GrantFiled: September 19, 2012Date of Patent: October 3, 2017Assignee: Daifuku Co., Ltd.Inventors: Kouichi Ikawa, Kazuto Mori
-
Patent number: 9780787Abstract: Provided is a fault self-repairing circuit sequentially converting an N-bit output value according to a pre-determined schedule and outputting the converted result. The fault self-repairing circuit includes different N logic modules configured to output each bit of the N bits. Here, each of the logic modules includes an internal logic. When the N-bit output value is identical to a pre-determined value, an output value of each of the logic modules is provided by the internal logic, and, when the N-bit output value is not identical to the pre-determined value, the output value of each of the logic modules is provided with a correct value provided outside each of the logic modules.Type: GrantFiled: March 28, 2014Date of Patent: October 3, 2017Assignee: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Kwang Hyun Cho, I Saak Yang, Sung Hoon Jung
-
Patent number: 9778637Abstract: A facility control system comprises a selection processing portion that selects, based on a manual operation and when an abnormal condition occurs in a first-layer computer that executes a first-layer program which issues an apparatus operating command to an apparatus controller, whether to cause a second-layer computer to execute the first-layer program that had been executed by the first-layer computer, and a substitute command output processing portion which outputs a substitute command in accordance with selection information selected by the selection processing portion. The second-layer computer executes the first-layer program that had been executed by the first-layer computer in which the abnormal condition occurred based on a substitute command outputted by the substitute command output processing portion.Type: GrantFiled: September 19, 2012Date of Patent: October 3, 2017Assignee: Daifuku Co., Ltd.Inventors: Kouichi Ikawa, Kazuto Mori
-
Patent number: 9773016Abstract: A map-reduce compatible distributed file system that consists of successive component layers that each provide the basis on which the next layer is built provides transactional read-write-update semantics with file chunk replication and huge file-create rates. Containers provide the fundamental basis for data replication, relocation, and transactional updates. A container location database allows containers to be found among all file servers, as well as defining precedence among replicas of containers to organize transactional updates of container contents. Volumes facilitate control of data placement, creation of snapshots and mirrors, and retention of a variety of control and policy information. Also addressed is the use of distributed transactions in a map-reduce system; the use of local and distributed snapshots; replication, including techniques for reconciling the divergence of replicated data after a crash; and mirroring.Type: GrantFiled: November 24, 2015Date of Patent: September 26, 2017Assignee: MapR Technologies, Inc.Inventors: Mandayam C. Srivas, Pindikura Ravindra, Uppaluri Vijaya Saradhi, Arvind Arun Pande, Chandra Guru Kiran Babu Sanapala, Lohit Vijaya Renu, Vivekanand Vellanki, Sathya Kavacheri, Amit Ashoke Hadke
-
Patent number: 9772914Abstract: A processing apparatus includes a precursor detection unit that detects a precursor event indicating a precursor that a target process cannot be executed by a process unit, and a control unit that sends a preparation request to a substitution processing apparatus when the precursor detection unit detects the precursor event in which the preparation request requests the substitution processing apparatus being a ready state for starting a substitution processing. The control unit sends a termination request to the substitution processing apparatus when a predetermined condition is satisfied after the control unit sends the preparation request, in which the termination request requests the substitution processing apparatus terminating the ready state.Type: GrantFiled: December 23, 2014Date of Patent: September 26, 2017Assignee: FUJITSU LIMITEDInventors: Tsuyoshi Honma, Kiyoshi Kouge, Hiroyuki Yamaguchi, Takahiro Inagaki
-
Patent number: 9760448Abstract: A method, computer program product, and computing system for hot recovery of virtual machines are described. The method may include initiating a recovery process to transfer data, from a backup archive of a virtual machine to be restored, to a virtual disk at the virtual machine host computer. The method may further include booting the virtual machine to be restored. The method may also include intercepting a read request from the virtual machine to the virtual disk at the virtual machine host computer. The method may additionally include determining if the read request from the virtual machine requested data from the virtual disk which has not yet been restored from the backup archive to the virtual disk by the recovery process. Moreover, the method may include, in response to determining that the requested data has not been restored from the backup archive to the virtual disk, returning the requested data.Type: GrantFiled: June 30, 2014Date of Patent: September 12, 2017Assignee: ACRONIS INTERNATIONAL GMBHInventors: Yuri Per, Maxim V. Lyadvinsky, Serguei M. Beloussov, Dmitry Egorov, Alexey Borodin, Vasily Semyonov
-
Patent number: 9753795Abstract: Dynamically adjust an error threshold in a data system based system status changes caused by either an external environment and/or an internal status.Type: GrantFiled: January 6, 2014Date of Patent: September 5, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Herve G. P. Andre, Larry Juarez, Brian A. Rinaldi, Todd C. Sorenson, Liang H. Wu
-
Patent number: 9720755Abstract: An information processing device includes: a virtual machine built in the information processing device and able to use a physical device included by the information processing device; and an information processing device failure managing unit for detecting a failure in the information processing device. The virtual machine includes: a virtual machine failure managing unit for detecting a failure in the physical device which the virtual machine can use; and a failure notifying unit for notifying occurrence of a failure in the physical device detected by the virtual machine failure managing unit to the information processing device failure managing unit.Type: GrantFiled: February 19, 2014Date of Patent: August 1, 2017Assignee: NEC CORPORATIONInventor: Ryota Yushina
-
Patent number: 9699652Abstract: A first partner connected to a channel collects samples of a physical variable on the basis of a time-variable property of the channel; stores a first array of at least bivalent elements; stores a second array of at least bivalent elements, each element in the second array corresponding to a remaining element in the first array and representing a first state if the sample, to which the remaining element in the first array corresponds, is outside a limit range and representing a second state if the sample is within the limit range; receives a parity check bit from the second partner; subjects elements in the first array to a parity check using the parity check bit; and, if the parity check fails, determines a checked element in the first array whose corresponding element in the second array represents the second state, and inverts the determined element in the first array.Type: GrantFiled: June 24, 2015Date of Patent: July 4, 2017Assignee: Robert Bosch GmbHInventors: Rene Guillaume, Bikramjeet Buragohain
-
Patent number: 9678824Abstract: Embodiments include evaluating durability and availability of a distributed storage system. Aspects include receiving a configuration of the distributed storage system, identifying a failure model for each component of the distributed storage system. Aspects also include generating a series of failure events for each component of the distributed storage system based on the failure model and calculating a recovery time for each failed component based on a network recovery bandwidth, a disk recovery bandwidth, a total capacity of simultaneous failed storage devices and a resiliency scheme used by the in the distributed storage system. Aspects further include collecting data regarding the series of failures and the recovery times, calculating an observed distribution of component failures from the collected data and calculating the availability and durability of the distributed storage system based on the observed distribution of component failures and using probabilistic durability and availability models.Type: GrantFiled: November 5, 2015Date of Patent: June 13, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Amir Epstein, Michael E. Factor, Elliot K. Kolodner, Dmitry Sotnikov
-
Patent number: 9658869Abstract: System, method, and computer program product to perform an operation comprising collecting performance metrics of a first virtual machine, and defining, based on the collected performance metrics, at least one rule to restrict collocation of the first virtual machine with other virtual machines on one or more host machines in a cloud computing environment.Type: GrantFiled: January 6, 2014Date of Patent: May 23, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Joseph W. Cropper
-
Patent number: 9659078Abstract: A system and method can support failover during synchronization between autonomous clusters in a distributed data grid. The system allows a cluster member in a source cluster to take over as an owner of a partition in a source cluster, when another cluster member in the source cluster becomes unavailable. Then, a cluster member in the destination cluster can receive one or more replication messages from said cluster member in the source cluster, wherein said one or more replication messages include one or more data changes. Furthermore, the cluster member in the destination cluster may ignore said one or more replication messages, if said one or more replication messages have already been received and successfully processed in the destination cluster.Type: GrantFiled: August 25, 2014Date of Patent: May 23, 2017Assignee: ORACLE INTERNATIONAL CORPORATIONInventors: Brian K. Oliver, Patrick Peralta, Paul F. Mackin, Noah Arliss
-
Patent number: 9652271Abstract: System, method, and computer program product to perform an operation comprising collecting performance metrics of a first virtual machine, and defining, based on the collected performance metrics, at least one rule to restrict collocation of the first virtual machine with other virtual machines on one or more host machines in a cloud computing environment.Type: GrantFiled: May 22, 2014Date of Patent: May 16, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Joseph W. Cropper
-
Patent number: 9632138Abstract: A method of functionality testing system circuitry on an integrated circuit chip, the system circuitry comprising a plurality of sub-circuits and the integrated circuit chip further comprising debugging circuitry, the debugging circuitry comprising variability circuitry. The method comprises: at the system circuitry, performing a function by the sub-circuits performing concurrent actions; at the variability circuitry, altering relative timing of the concurrent actions so as to increase the likelihood of one or more errors in the system circuitry's performance of the function; and at the debugging circuitry, recording one or more errors in the system circuitry's performance of the function.Type: GrantFiled: October 9, 2015Date of Patent: April 25, 2017Assignee: ULTRASOC TECHNOLOGIES LIMITEDInventors: Andrew Brian Thomas Hopkins, Iain Craig Robertson, Michael Jonathan Thyer
-
Patent number: 9612926Abstract: A host swap hypervisor provides a high availability hypervisor for virtual machines on a physical host computer during a failure of a primary hypervisor on the physical host computer. The host swap hypervisor resides on the physical host computer that runs the primary hypervisor, and monitors failure indicators of the primary hypervisor. When the failure indicators exceed a threshold, the host swap hypervisor is then autonomically swapped to become the primary hypervisor on the physical host computer. The original primary hypervisor may then be re-initialized as the new host swap hypervisor.Type: GrantFiled: May 15, 2014Date of Patent: April 4, 2017Assignee: International Business Machines CorporationInventors: Bin Cao, Jim C. Chen, Lauren A. Somers
-
Patent number: 9613122Abstract: A multi-shard database system receives a transaction including multiple actions directed to different shards of the database system. The database system creates a transaction record including a transaction identifier and a transaction status for the transaction in a transaction database. The database system then executes, in parallel, the multiple actions on the different shards by associating with each data item involved in the transaction a data structure that includes the transaction identifier and new data to be applied to the data item. The database system then updates the transaction status in the transaction record for the transaction from pending to completed when each of the multiple actions is successfully executed on the corresponding shard. Consistency is eventually implemented when the data structures associated with the data items involved in the transaction are evaluated. The evaluation of a data structure can be triggered by a read request or other events.Type: GrantFiled: May 2, 2014Date of Patent: April 4, 2017Assignee: Facebook, Inc.Inventors: Neil Earnest Chao, Daniel Nota Peek, Dmitri Perelman, Philippe Vincent Ajoux
-
Patent number: 9606878Abstract: A host swap hypervisor provides a high availability hypervisor for virtual machines on a physical host computer during a failure of a primary hypervisor on the physical host computer. The host swap hypervisor resides on the physical host computer that runs the primary hypervisor, and monitors failure indicators of the primary hypervisor. When the failure indicators exceed a threshold, the host swap hypervisor is then autonomically swapped to become the primary hypervisor on the physical host computer. The original primary hypervisor may then be re-initialized as the new host swap hypervisor.Type: GrantFiled: June 16, 2014Date of Patent: March 28, 2017Assignee: International Business Machines CorporationInventors: Bin Cao, Jim C. Chen, Lauren A. Somers
-
Patent number: 9604585Abstract: A system includes first and second failsafe devices. Each of the failsafe devices includes a processor and a memory. The memory stores instructions executable by the processor for performing at least one of detecting a fault and providing a communication concerning a fault. The system further includes an arbitration bus connecting the first and second failsafe devices. The communication concerning the fault may be provided from a first one of the first and second failsafe devices to a second one of the first and second failsafe devices.Type: GrantFiled: March 20, 2015Date of Patent: March 28, 2017Assignee: Ford Global Technologies, LLCInventors: John P. Joyce, Scott J. Lauffer
-
Patent number: 9606537Abstract: A system with a first computer unit and with a second computer unit, wherein the first computer unit comprises a first interface to enable connection to at least one sensor and to at least one actuator, wherein the second computer unit comprises a second interface to enable connection to at least one sensor and to at least one actuator, wherein the first and the second computer units can be connected to each other by means of a further interface, wherein the actuator comprises an interface, wherein depending on the first or on the second operating state the interface determines whether a control command for a driving function is adopted by the first or the second computer unit, so that in the first operating state only the first computer unit can activate the actuator and in a second operating state only the second computer unit can activate the actuator.Type: GrantFiled: October 12, 2015Date of Patent: March 28, 2017Assignee: Robert Bosch GmbHInventors: Thomas Hogenmueller, Thorsten Huck, Ulrich Kersken, Armin Ruehle, Heinz Tilsner, Carsten Gebauer, Tuelin Baysal, Bernd Mueller, Volker Blaschke, Wolfgang Niem
-
Patent number: 9596149Abstract: Server information handling system deployment and maintenance is enhanced with automated trouble ticket generation at a mobile telephone through an NFC transaction with a management controller. NFC transactions coordinate authorization for replacement component installation and server information handling system replacement. In one embodiment, a bezel includes an NFC device that interfaces with a management controller and stores configuration information to aid installation of replacement server information handling systems in the event of a system failure. A back-up battery provides power to an NFC support circuit that stores fault codes detected by the management controller so that fault codes are available during management controller failures.Type: GrantFiled: June 3, 2014Date of Patent: March 14, 2017Assignee: DELL PRODUCTS L.P.Inventors: Kevin D. Terwilliger, Travis E. Taylor, III, Syed S. Ahmed, John R. Palmer
-
Patent number: 9588855Abstract: Fault domains are defined which reflect, either physically or virtually, the topology of a networked computing environment. These defined fault domains are then used to control where cached data is replicated when running in a write back cache mode. Unlike known replication approaches, the present approach replicates such data according to a user's defined data policy and based on the defined fault domains thereby avoiding the user having to keep track of changes in computing system configurations or update their data policy when virtual machines migrate from one host computing system to another.Type: GrantFiled: April 22, 2015Date of Patent: March 7, 2017Assignee: PernixData, Inc.Inventors: Akhilesh Manohar Joshi, Deepak Dilip Muley, Bryan Crowe, Satyam B. Vaghani, Shankar Vilayannur Natarajan
-
Patent number: 9575850Abstract: A method for synchronously running an application in a high availability environment including a plurality of calculating modules interconnected by a very high-speed broad band network, includes: configuring the modules into partitions including a primary and a secondary partition and a monitoring partition; running the application on each running partition, inputs-outputs processed by the primary partition transmitted to the secondary running partition via the monitoring partition; synchronizing the runnings via exploiting microprocessor context changes; transmitting a catastrophic error signal to the monitoring partition; continuing the running by switching to a degraded mode, the running continuing on a single partition.Type: GrantFiled: July 1, 2015Date of Patent: February 21, 2017Assignee: BULL SASInventor: Georges Lecourtier
-
Patent number: 9571472Abstract: The embodiments described herein describe technologies for a device definition process to establish a unique identity and a root of trust of a cryptographic manager (CM) device, the CM device to be deployed in a CM system. The device definition process can take place in a device definition phase of a manufacturing lifecycle of the CM device. One implementation includes a non-transitory storage medium to store an initialization application that, when executed by a CM device, causes the CM device to perform a device definition process to generate a device definition request to establish the unique identity and the root of trust. In response to the device definition request, the initialization application obtains device identity and device credentials of the CM device and stores the device definition request in storage space of a removable storage device.Type: GrantFiled: November 6, 2014Date of Patent: February 14, 2017Assignee: CRYPTOGRAPHY RESEARCH, INC.Inventors: Denis Alexandrovich Pochuev, Yogesh Swami, Daniel O'Loughlin
-
Patent number: 9563458Abstract: Embodiments disclosed herein generally include a computer-implemented method, computer program product, and system to facilitate offloaded and parallelized direct memory access (DMA) translation table operations. The method includes a hypervisor requesting a lease on an auxiliary parallel processing element assigned to a first virtual machine hosted by the hypervisor. The method further includes receiving a grant of the lease, whereby ownership of the auxiliary parallel processing element is transferred from the first virtual machine to the hypervisor. The method further includes, during the lease, providing a predefined program to execute on the auxiliary parallel processing element in order to perform a desired operation on the hypervisor DMA translation table and with parallelism. The method further includes, upon completion of the predefined program, terminating the lease by the hypervisor, whereby ownership of the auxiliary parallel processing element is returned to the first virtual machine.Type: GrantFiled: December 12, 2014Date of Patent: February 7, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Justin K. King
-
Patent number: 9552303Abstract: A method and system for maintaining release consistency in shared memory programming on a computing device having multiple processing units includes, in response to a page fault, initiating a transfer, from one processing unit to another, of data associated with more than one but less than all of the pages of shared memory.Type: GrantFiled: July 25, 2016Date of Patent: January 24, 2017Assignee: Intel CorporationInventors: Ravindra Babu Ganapathi, Hu Chen
-
Patent number: 9529541Abstract: A nonvolatile storage device in accordance with the inventive concepts includes a nonvolatile memory device comprising a first memory area, a second memory area, and a memory controller. The memory controller includes a first register configured to store reliable mode information, and a second register configured to store operating system (OS) image information. The memory controller is configured to receive a command from a host based on the reliable mode information; determine whether the command is a write request for an OS image and whether OS image information accompanying the command matches the OS image information stored in the second register; write the OS image to the first memory area if the OS image information accompanying the command matches the OS image information stored in the second register, and block data migration of the OS image from the first memory area to the second memory area.Type: GrantFiled: February 10, 2016Date of Patent: December 27, 2016Assignee: Samsung Electronics Co., Ltd.Inventors: Sung-Hyun Cho, Dongin Kim, Junseok Park, Taemin Lee, Chaesuk Lim
-
Patent number: 9524082Abstract: An electronic apparatus connectable to another electronic apparatus includes an information acquisition unit that acquires operation screen information to display a shared operation screen shared between the electronic apparatus and the other electronic apparatus from the other electronic apparatus, a shared screen display unit that displays the shared operation screen based on the operation screen information that the information acquisition unit acquired, a job execution unit that executes a job based on input to the shared operation screen, an event detector that detects a predetermined event that occurs during the job execution, a display determination unit that determines whether or not a specific screen including information specific to the electronic apparatus model is displayed in response to the detected predetermined event, and a specific screen display unit that changes the displayed shared operation screen into the specific screen if the display determination unit determines that the specific screType: GrantFiled: September 12, 2013Date of Patent: December 20, 2016Assignee: Ricoh Company, Ltd.Inventor: Genki Umeizumi
-
Patent number: 9513903Abstract: A fault-tolerant system including a calculation unit and an output synthesizer is provided. The calculation unit receives a first environmental parameter and input data, wherein the calculation unit further includes a first and a second calculation circuits. The first calculation circuit is arranged to perform a calculation on the input data in response to the first environmental parameter to generate a first calculation result. The second calculation circuit is different from the first calculation circuit, and arranged to perform the calculation on the input data in response to the first environmental parameter to generate a second calculation result. The output synthesizer selects a first and a second set of bits from the first and the second calculation result according to a control signal, and synthesizes the first set of bits and the second set of bits in sequence to generate an adjusted calculation result.Type: GrantFiled: October 15, 2013Date of Patent: December 6, 2016Assignee: Industrial Technology Research InstituteInventors: Yung-Chang Chang, Hsing-Chuang Liu, Chih-Jen Yang
-
Patent number: 9507675Abstract: Systems, methods, and computer programs are disclosed for recovering from dynamic random access memory (DRAM) defects. One method comprises determining that an uncorrected bit error has occurred for a physical codeword address associated with a dynamic random access memory (DRAM) device coupled to a system on chip (SoC). A kernel page associated with a DRAM page comprising the physical codeword address is identified as a bad page. Recovery from the uncorrected bit error is provided by rebooting a system comprising the SoC and the DRAM device. In response to the rebooting, the identified kernel page is excluded from being allocated for DRAM operation.Type: GrantFiled: April 15, 2014Date of Patent: November 29, 2016Assignee: QUALCOMM INCORPORATEDInventors: Dexter Tamio Chun, Yanru Li, Jung Pill Kim, Deepti Vijayalakshmi Sriramagiri
-
Patent number: 9494933Abstract: A method, data processing system, and computer program product for processing packets in an aircraft network data processing system. A number of first packets of data are received from each redundant network in a plurality of redundant networks in the aircraft network data processing system. A number of second packets of data generated by a redundancy manager are received in communication with the plurality of redundant networks. Then, a configuration of the plurality of redundant networks is identified using the number of first packets and the number of second packets.Type: GrantFiled: June 19, 2009Date of Patent: November 15, 2016Assignee: THE BOEING COMPANYInventor: Timothy E. Jackson
-
Patent number: 9489273Abstract: Exemplary methods, apparatuses, and systems include receiving a command to perform a failover workflow for a plurality of logical storage devices from a protected site to a recovery site. A first logical storage device within the plurality of logical storage devices is determined to be a stretched storage device. In response to the failover command, a site preference for the first logical storage device is switched from the protected site to the recovery site. The failover includes a live migration of a virtual machine that resides on the first logical storage device. The live migration is performed without interruption to one or more services provided by the virtual machine. The site preference for the first logical storage device is switched prior to performing the live migration of the virtual machine.Type: GrantFiled: June 23, 2014Date of Patent: November 8, 2016Assignee: VMware, Inc.Inventors: Aleksey Pershin, Ilia Langouev
-
Patent number: 9485077Abstract: System and method for energy efficient Ethernet with asymmetric traffic profiles. A low power mode such as a low power idle mode is typically leveraged when both direction of a link do not have data traffic to transmit. Where only one direction of a link has data traffic to transmit, a physical layer device can transition from a full duplex mode to a simplex mode to produce energy savings (e.g., disabling cancellation circuitry).Type: GrantFiled: May 31, 2013Date of Patent: November 1, 2016Assignee: BROADCOM CORPORATIONInventors: Wael William Diab, Mehmet Vakif Tazebay
-
Patent number: 9483361Abstract: According to certain aspects, an information management cell with failover management capability can include secondary storage computing devices configured to conduct primary data from a primary storage device(s) to a secondary storage device(s) during secondary copy operations, at the direction of a remote storage manager, wherein a first secondary storage computing device implements a failover storage manager configured to, in the event of a loss of connectivity between the cell and the remote storage manager: access a stored storage policy; initiate a first secondary copy operation according to the storage policy in which the first secondary storage computing device is involved in the creation of a first secondary copy on the secondary storage device(s); and initiate a second secondary copy operation according to the storage policy in which a second secondary storage computing device is involved in the creation of a second secondary copy on the secondary storage device(s).Type: GrantFiled: May 7, 2014Date of Patent: November 1, 2016Inventors: Parag Gokhale, Rajiv Kottomtharayil, Amey Vijaykumar Karandikar, Manoj Kumar Vijayan