With Power Supply Status Monitoring Patents (Class 714/22)
  • Patent number: 6052793
    Abstract: A basic input output system (BIOS) or equivalently functional circuitry can determine when a power on reset in a computer system is due to an invalid event (e.g. power loss) and subsequently re-enable a computer system wakeup event. Additionally, the computer system is restored to its power state prior to the invalid event, thereby advantageously allowing a computer system configuration to be returned to the desired configuration after an invalid event and without unnecessary computer system activity.
    Type: Grant
    Filed: June 10, 1998
    Date of Patent: April 18, 2000
    Assignee: Dell USA, L.P.
    Inventor: Lois D. Mermelstein
  • Patent number: 6038618
    Abstract: A data processing system comprises a host computer connected for the transfer of data to and from a plurality of data storage devices arranged in a string, the host computer including communication means comprising first and second ports connecting to first and second communication links, the first and second communication links being connected respectively to first and second data storage devices of said string. A bypassing means is provided between the first and second ports of the host system and the first and second data storage devices, the bypassing means being comprised of an independent bypass circuit on each of the first and second communication links between each of the first and second ports and the first and second data storage devices, the bypassing means being operable to bypass the host computer by connecting the first and second devices only when both of said independent bypass circuits detect a lack of data transfer on their respective links.
    Type: Grant
    Filed: August 8, 1997
    Date of Patent: March 14, 2000
    Assignee: International Business Machines Corporation
    Inventors: Reginald Beer, Peter John Deacon, Ian David Judd, Neil Morris
  • Patent number: 6035347
    Abstract: A data storage system and method for securely storing data includes (a) a host CPU; (b) a non-volatile storage (NVS) memory for storing data; (c) a processor, the processor being coupled to the host CPU and the NVS memory and monitoring availability of space in the NVS memory and in a non-volatile buffer (NV-Buffer); and (d) the NV-Buffer, the NV-Buffer being coupled to the host CPU, the NVS memory, and the processor, upon receiving a request to write data into the NVS memory, the host CPU storing data to be transferred to the NVS memory into the NV-Buffer, and upon receiving a confirmation message that data of a write operation to the NV-Buffer is committed, the NV-Buffer transferring the data to the NVS memory. The NVS memory includes a fast dump space for storing data transferred from the NV-Buffer when a main power is down and for restoring back data from the NVS memory to the NV-Buffer when the power is up.
    Type: Grant
    Filed: December 19, 1997
    Date of Patent: March 7, 2000
    Assignee: International Business Machines Corporation
    Inventors: Brent Cameron Beardsley, Michael Thomas Benhase, Forrest Lee Wade
  • Patent number: 6035408
    Abstract: A laptop computer has a first relatively powerful and fast data processor and a second relatively slower data processor. The first data processor has a higher power consumption factor than the second. A switch mechanism controls which of the two processors is operatively connected to the computer system components. When external power is available, the faster more powerful processor is used. When external power is unavailable and the computer must be operated from the internal power source, the second processor is used to drive the system components in order to provide a longer total operating duty cycle before the internal power source is exhausted.
    Type: Grant
    Filed: January 6, 1998
    Date of Patent: March 7, 2000
    Assignee: Magnex Corp.
    Inventor: Su Shion Huang
  • Patent number: 6014750
    Abstract: Apparatus for adapting a personal computer unit having an internal power supply and a sidewall adapted for supplying associated external peripherals with DC power from the power supply. For each peripheral, the sidewall is provided with a removable power panel secured in the sidewall. The sidewall includes a metal strip provided with an electrical terminal. An electrical conductor is coupled between the terminal and the power supply for powering the peripheral connected to the terminal. Each peripheral has a peripheral terminal connected to the power supply by an EMI filter and an associated fuse.
    Type: Grant
    Filed: June 8, 1998
    Date of Patent: January 11, 2000
    Assignee: Unisys Corporation
    Inventor: Marshall Williams
  • Patent number: 5996086
    Abstract: In a redundant server network system, failover services for a failed server are provided by a survivor server belonging to a common failover group. At startup of a local server process running on the survivor server, a context is created for the local server and for each remote server belonging to the same failover group as the local server. At startup the context of the local server is also activated. The local server process is configured to operate on and make decisions based upon activated contexts. Each context includes server specific configuration and control information. When the survivor server must provide failover services for a failed server belonging to its same failover group, the context corresponding to the failed remote server is activated.
    Type: Grant
    Filed: October 14, 1997
    Date of Patent: November 30, 1999
    Assignee: LSI Logic Corporation
    Inventors: William P. Delaney, Gerald J. Fredin, Andrew J. Spry
  • Patent number: 5996079
    Abstract: A method and apparatus for improved indication of power-consumption status in a computer system is described. The computer system includes a light-emitting diode (LED) which produces an optical signal. The apparent intensity of the optical signal is controlled by a pulsed LED control signal having an adjustable duty cycle. By varying the duty cycle, the apparent intensity of the optical signal is varied. The rate at which the duty cycle is varied may be selected to produce an apparent intensity optical signal which varies continuously between a greatest and a least intensity. Also, the rate at which the duty cycle is varied may be selected from a plurality of rates, each corresponding with a one of a plurality of power-consumption states in which the computer system can operate.
    Type: Grant
    Filed: October 30, 1997
    Date of Patent: November 30, 1999
    Assignee: Micron Electronics, Inc.
    Inventor: Dean A. Klein
  • Patent number: 5958069
    Abstract: A system includes a host, first and second devices which operate as an acting device and a standby device, and a simplex unit controlled by the acting device. Each device is provided with a monitoring unit for monitoring the occurrence of failure, means for notifying the other device of a failure in its own device, and active/standby notification means. The active/standby notification means notifies the simplex unit that its own device is acting or standing by when the device becomes the acting device or standby device in response to a command from the host. Upon a failure in the other device when its own device is standing by, the active/standby notification means notifies the simplex unit that its own device is now an apparent acting device. Upon a failure in its own device when its own device is acting, the active/standby notification means notifies the simplex unit that its own device is now an apparent standby device.
    Type: Grant
    Filed: May 12, 1997
    Date of Patent: September 28, 1999
    Assignee: Fujitsu Limited
    Inventors: Hiroya Kawasaki, Masaki Kira, Shiro Uriu, Yukinaga Toyoda, Kazumasa Sonoda
  • Patent number: 5954833
    Abstract: For use in a module, a redundancy detection circuit for, and method of, determining whether a predetermined adequate redundancy exists when the module is present in a system. In one embodiment, the module includes: (1) a sensor, associated with the module, that receives a signal that is a function of a number of modules present in the system and (2) a calculation circuit, coupled to the sensor, that determines from the signal whether a surplus capacity of the module provides at least the predetermined adequate redundancy for the system.
    Type: Grant
    Filed: July 29, 1997
    Date of Patent: September 21, 1999
    Assignee: Lucent Technologies Inc.
    Inventors: Richard R. Garcia, Gabriel G. Suranyi
  • Patent number: 5948075
    Abstract: An interface in a data-processing system for identifying operating parameters of storage systems and enclosures is disclosed. The data-processing system communicates with the storage systems utilizing a serial bus. The storage systems are included within a storage system enclosure which includes a backplane. A backplane interface is included within the backplane and is utilized for coupling a storage system to the storage system enclosure. The storage system has a first and a second connector which are coupled together. The second connector is coupled to the backplane interface and is utilized to transmit data to be stored to and read from the storage system. A plurality of resistors are coupled to the first connector. A physical location is selected for a storage system by connecting selected ones of the resistors to a first potential, while all remaining resistors are connected to a second potential.
    Type: Grant
    Filed: June 4, 1997
    Date of Patent: September 7, 1999
    Assignee: International Business Machines Corporation
    Inventor: Thomas James Osten
  • Patent number: 5935259
    Abstract: A system and method for preventing damage to media files within a digital camera comprises a power manager for detecting power failures, an interrupt handler for responsively incrementing a counter device and a removable memory driver for performing memory access operations, evaluating the counter device to determine whether a power failure has occurred during the memory access operation and for repeating the memory access operation whenever a power failure has occurred during the memory access operation.
    Type: Grant
    Filed: September 24, 1996
    Date of Patent: August 10, 1999
    Assignee: Apple Computer, Inc.
    Inventor: Eric C. Anderson
  • Patent number: 5928368
    Abstract: Multiple processors are connected to form a multiprocessor system having interprocessor communicating capability. In the face of a power-fail signal, indicating that possible power loss is imminent, a processor will proceed through a shut-down procedure to save the present operating state so that when power is re-applied the processor can continue from the operating state it left when power was lost. The shut-down procedure concludes with the processor broadcasting messages to all other processors that it is undergoing a power-fail shut-down which is noted by the other processors to later cause them to enter a cautious mode of operation so as to not exclude the processor in any system configuration involving agreement of all processors by reason of the processor's loss of power.
    Type: Grant
    Filed: June 23, 1994
    Date of Patent: July 27, 1999
    Assignee: Tandem Computers Incorporated
    Inventors: Robert L Jardine, Richard M. Collins, Larry D. Reeves