Abstract: A power controller system is described herein, where a power-good signal (PWRGD) is asserted followed by a slightly delayed power-good signal (DLY_PWRGD) upon the system powering up. This PWRGD signal indicates that good power is being supplied to the card or other equipment, and the delayed signal tells a system processor that it is now ok to communicate with the card or other equipment. This delay allows the card or other equipment to reach a steady state condition before being declared operational by the power controller. When powering down the equipment, the DLY_PWRGD signal is first deasserted and power is decoupled from the card or other equipment. The PWRGD signal is then deasserted after a short delay. This short delay allows circuitry within the card to be properly shut down by, for example, carrying out a shutdown routine, using stored charge in the card to temporarily power the card. A state machine is used to carry out the four-state power up and power down sequence.

Abstract: A storage apparatus according to the present invention can store information related to a power supply abnormality after shutting down the principal functions of a data processing board when a power supply abnormality occurs in a data processing board. A power supply controller of a data processing board mounted in the storage apparatus monitors the operational status of DC/DC power supplies mounted to the data processing board, on the basis of detection signals from a voltage detection circuit. When a power supply abnormality is detected, the power supply controller immediately shuts down the operation of all the DC/DC power supplies. Shutting down the DC/DC power supplies also shuts down the principal functionality of the data processing board. Then, after storing information related to the power supply abnormality in memory, the power supply controller shuts down the auxiliary power supply.

Abstract: Adaptive thresholding technique for power supplies during margining events. A power supply may include a fault detection mechanism for monitoring an output voltage of the power supply to determine whether the output voltage is greater than a first over-voltage threshold or less than a first under-voltage threshold. If a margining event changes the power supply output voltage, the fault detection mechanism may dynamically change a first over-voltage threshold and a first under-voltage threshold based on the margining event to a second over-voltage threshold and a second under-voltage threshold. Then, during the margining event, the fault detection mechanism may monitor the output voltage of the power supply to determine whether the output voltage is greater than a second over-voltage threshold or less than a second under-voltage threshold. The fault detection mechanism may dynamically change a fault threshold in proportion to the change in the power supply output voltage.

Abstract: The present invention relates generally to an adapter unit for a personal digital assistant. More specifically, this invention relates to an adapter unit that provides additional functionality, and improved ergonomics and increased ruggedness to the personal digital assistant. The additional functionality includes the ability to automatically change the function of one or more of the application buttons on the personal digital assistant upon the attachment of the adapter unit.

Abstract: A test device that can improve test reliability is provided. In the test device, an error detecting unit detects an error of inputted test signals to generate an error flag, a normal test unit performs a test operation according to the test signals when the error flag is deactivated, and an error information providing unit indicates the error of the test signals when the error flag is activated.

Abstract: A power management method and associated apparatus allows a device to make maximum use of its battery before replacement or recharging. After a battery failure, the device may be shut down properly and disabled until the battery is replaced or recharged. An exemplary embodiment is described in the context of a digital camera.

Abstract: This storage apparatus has a plurality of units for transferring or storing data sent from an information processing device, and includes a failure notification unit for notifying a failed unit among the plurality of units, a power supply switching command unit for commanding the switching of off and on of the power supply of the failed unit notified from the failure notification unit, and a power supply switching unit for switching off and thereafter switching on the power supply of the failed unit according to the command of the power supply switching command unit.

Abstract: A system, apparatus and method for maintaining information related to a write operation is described. In one embodiment of the invention, a write journal is provided that contains a list of entries that store information related to active write operations so that a particular write may be restarted in order to correct an inconsistency. The journal may have a battery backed cache, in which data is stored prior to writing to a disk, which is provided power in the case of a power failure. The journal may be located in memory positioned at various locations within a system including on a controller card for a disk array system or on a motherboard of a host system.

Abstract: A heater unit includes power failure management to detect disruptions in the electrical power supply, such as the AC supply, for the unit. The heater unit emits an audible alarm in response to detection of such a disruption, and may shut down the heater(s) and visuals display(s). The heater unit advantageously includes a power storage device, such as a super-capacitor, to temporarily power the electronic circuitry of the heater unit. Operating parameters, such as of a processor of the electronic circuitry, may be stored in a non-volatile memory response to the disruption, and recalled if the disruption terminates before the level of power has gotten too low to sustain reliable operation of the processor.

Abstract: Memory storage apparatus include a non-volatile memory for storing data and a power management unit configured to sense a level of an external power supply and to predict a loss of the external power supply. A power-polling time control circuit is configured to control a time when a voltage level sourced from the external power supply is reduced below a predetermined level after loss of the external power supply. A control logic controls read and/or write operations of the non-volatile memory responsive to a prediction of loss of the external power supply from the power management unit.

Abstract: There is provided a power supply monitor circuit comprising a positive supply monitoring input, a negative supply monitoring input, and a voltage divider connected between the positive and negative supply monitoring inputs and having an intermediate node providing a potential intermediate those on the positive and negative supply monitoring inputs. A sampling circuit is connected to sample the potential at each of the positive supply input the negative supply input and the intermediate node. Also provided is a method of monitoring noise on a power supply whereby phase information from those samples is derived about the noise signals at the two said points.

Abstract: A processor embedded in a device includes instructions for procedures to be completed by a user. A display provides the instructions as steps for completion to the user. The processor monitors status of the device to determine completion of the steps before proceeding with the next step. Errors in performing steps are identified by the processor and steps to correct the errors are displayed for execution by the user.

Abstract: A dual power supply switching system for use in an electronic sign where independent suitably sized power supplies each capable of independently powering an entire plurality of LED display modules supply power on an alternating distributed basis to the plurality of LED display modules. A microcontroller having an odd or even address on each LED display module controls the connection of the respective LED display module to a particular power supply by controlling onboard solid state switches and, upon sensing an inadequate power source supply, switches to the other power supply to re-establish power to the LED display module.

Abstract: A processing system includes a direct current to direct current (DC-DC) converter for generating a supply voltage when coupled to a battery. A memory module stores a plurality of operational instructions. A processing module receives power from the DC-DC converter and executes the plurality of operational instructions. A power monitor circuit monitors the power source and powers down the power source when a first error condition is detected in the power source.

Abstract: An abnormal power interruption internal circuitry protection method and system is proposed for use with a computer platform, such as a blade server, which is characterized by the utilization of each server module's identification code (i.e., blade ID signal) and power-good signal to judge whether each server module is subjected to an abnormal power interruption, such that in the event of the abnormal power interruption, a small amount of remnant electrical power left in the internal circuitry of the blade server can be fetched as power source to shut down the server modules through a normal shutdown procedure. This feature can help protect the internal circuitry of the server modules of the blade server from being damaged due to abnormal shutdown in the event of abnormal power interruption.

Abstract: The present invention relates to a system and methodology to mitigate memory current requirements in an industrial controller and to facilitate efficient on-line editing, storage and retrieval of user programs and data. A segmented memory architecture is provided, wherein a first memory segment is loaded with programmed instructions and other data that is relatively static in nature. A second memory segment is provided for storage of dynamic information such as controller data table variables that change frequently and/or rapidly during program execution of the controller. An execution memory is concurrently loaded with the user program to facilitate high performance program execution and to enable on-line edits of the user program during operation of the controller.

Abstract: A method suitable for testing an integrated circuit device is disclosed, the device comprising at least one module, wherein the at least one module incorporates at least one associated module monitor suitable for monitoring a device parameter such as temperature, supply noise, cross-talk etc. within the module.

Abstract: Memory storage apparatus include a non-volatile memory for storing data and a power management unit configured to sense a level of an external power supply and to predict a loss of the external power supply. A power-polling time control circuit is configured to control a time when a voltage level sourced from the external power supply is reduced below a predetermined level after loss of the external power supply. A control logic controls read and/or write operations of the non-volatile memory responsive to a prediction of loss of the external power supply from the power management unit.

Abstract: A bufferless crossbar switch system and technique for synchronization and error recovery between switch line cards is provided. A network switches data through the bufferless data crossbar switch and distributes a high-speed frequency and time signal on a separate channel. The separate channel allows clock recovery, eliminating the need to encode the data in a way that allows clock recovery. The separate channel also gives a global picture of time so that a system can be globally scheduled by notifying ingress and egress line card adapters when to perform specific actions, such as transmitting or receiving data or retransmitting data for error recovery.

Abstract: A microcontroller comprising a central processing unit and a further fault processing unit suitable for performing validation of operations of said central processing unit. The further fault processing unit is external and different with respect to said central processing unit and said further fault processing unit comprises at least a module for performing validation of operations of said central processing unit and one or more modules suitable for performing validation of operations of other functional parts of said microcontroller. Validation of operations of said central processing unit is performed by using one or more of the following fault tolerance techniques: data shadowing; code&flow signature; data processing legality check; addressing legality check; ALU concurrent integrity checking; concurrent mode/interrupt check.

Abstract: A method and apparatus to write a file to a nonvolatile memory is provided. The method may include writing a file to a nonvolatile memory using at least two headers and at least two file fragments and using only information stored in one header of the at least two headers to determine if the writing of the file to the nonvolatile memory was interrupted by a loss of power. Other embodiments are described and claimed.

Abstract: A redundant power supply system with several individual power supplies, each connected to one of several power inlets. At least one power supply can be connected to a selectable one of the several power inlets by means of a steering network.

Abstract: A lock-out device is provided that determines whether to lock out a chip or not according to the result of operation voltage drop detected at a plurality of positions in a semiconductor integrated circuit device. As a result, unnecessary lock-out operations can be prevented and a program operation or an erase operation in a semiconductor memory device can be executed stably.

Abstract: A system, a testing apparatus, and a method for testing at least one device with a connection interface are provided. The system comprises a host, a testing apparatus, and a power supply. The testing apparatus further comprises a microprocessor and at least one current limit module. The host sending a test signal. The power supply provides a voltage to the testing apparatus. The at least one current limit module of the testing apparatus, which is electrically connected to the microprocessor, the at least one device, and the power supply, provides the voltage to the at least one device. When the current passing through the at least one device is greater than the predetermined value, the at least one current limit module of the testing apparatus stops providing the voltage to the at least one device and sends an over current signal to the host via the microprocessor.

Abstract: An information processing apparatus operating on a finite energy source comprises a remaining power detection unit detecting a remaining electric power of the finite energy source; a determination unit determining a value of electric power of the finite energy source required for completing a renewal replacing a first software with a second software based on the capacity of the aforementioned second software; a judgment unit judging an achievability of renewing the first software by comparing the value of electric power with the remaining electric power; and a deterrent unit deterring a communication of the information processing apparatus with the outside while renewing the first software by replacing it with the second software.

Abstract: According to the present invention, in cases where a CHA function and a DKA function are mounted within a single package, a battery power supply that is used during the occurrence of power supply trouble is effectively utilized so that the supply of power can be separately controlled for each function. A CHA part and DKA part are disposed in a single control package. When trouble such as a power outage is detected, the CHA part blocks access requests from the host, and initiates end processing. When the end processing of the CHA part is completed, the package internal power supply control part stops the clock supply to the CHA part. Then, when the DKA part completes destage processing, the package internal power supply control part stops the supply of power to the DKA part. The power consumption of the package is lowered in stages in accordance with the progress of the end processing.

Abstract: A system and method for thresholding system power loss notifications in a data processing system are provided. Power loss detection modules are provided in a data processing system having one or more data processing devices, such as blades in an IBM BladeCenter® chassis. The power loss detection modules detect the type of infrastructure of the data processing system, a position of a corresponding data processing device within the data processing system, and a capability of the data processing system to provide power during a power loss scenario. The detection module detects various inputs identifying these types of data processing system and power system characteristics and provides logic for defining a set of behaviors during a power loss scenario, e.g., behaviors for sending system notifications of imminent power loss. The detection of the various inputs and the defining of a set of behaviors may be performed statically and/or dynamically.

Abstract: A method, device and system for determining whether a prior shut down of a device having a solid state non-volatile memory unit such as a flash memory unit resulted from a power loss and disorderly shut down and whether a power loss recovery procedure should be run.

Abstract: A power supply control method controls a supply of a power supply voltage from an uninterruptible power supply (UPS) to an information processing apparatus based on time information that is set in advance and indicates a date and time of turning ON and cutting OFF the supply of the power supply voltage. The power supply control method monitors, by a power supply control unit within the information processing apparatus, ON and/or OFF supply states of the power supply voltage with respect to the information processing apparatus at a time specified by the time information; and manages the ON and/or OFF supply states that are monitored, in a referable manner.

Abstract: A backup-type power supply system aims to integrate power output according to different potentials through different power supply modules. Each power supply module includes backup-type N+1 power supply devices and an independent power balance unit to output power in a balanced fashion so that users can add the power supply module of independent potential according requirements. Thereby transformation power loss of the power supply devices can be reduced. The power supply devices can be designed with different specifications and dimensions corresponding to different electronic devices.

Abstract: A system and method of predicting power events in intermittent power environments and dispatching computational operations of an integrated circuit accordingly. A power management prediction system includes a controller executing a prediction algorithm, an arrangement of computation circuitry, a non-volatile storage device containing a power requirements log and a power history log, a clock generator, an intermittent power source, and a power monitor circuit.

Abstract: In the case where there coexist general loads requiring backup only for a short duration and a specific load requiring backup for a longer duration, uninterruptible power with higher reliability is supplied to the specific load with the adoption of a simple configuration. A DC backup power supply system comprises an AC/DC converter for normally supplying DC power to loads in while (the general loads and the specific load, included), and a control circuit for supplying DC output backing up the loads in whole for relatively short time only from a battery at the time of a power outage, while supplying DC output backing up the specific load, such as a cache memory and so forth, for relatively long time. Thus, it is possible to implement an uninterruptible power supply system small in size and low in cost, provided with a function for proper use depending on a prevailing situation.

Abstract: A method of preventing data loss in a data storage system includes supplying write data to a high speed volatile write buffer and supplying electrical power from an energy storage device upon detection of a primary power loss event. The backup electrical power is supplied to the write buffer and nonvolatile cache. Under backup power, the write data is transferred into the nonvolatile cache and the backup power is removed. Upon regaining main power, a data presence indication triggers a transfer of the write data from the nonvolatile cache to the long term storage media. The method may be implemented for a system to protect it from inadvertent power losses or it may implemented in a system where the long term storage device is power cycled to save power. The energy storage device is not necessarily needed in the power cycled system unless power failure protection is also desired.

Abstract: Power consumption that occurs in response to software errors may be reduced. In one example a system tracks a number of occurrences a first set of code causes a system to perform one or more reset actions, determines whether the number of occurrences exceeds a threshold, and selects a second set of code to execute in place of the first set of code, if the quantity exceeds the threshold.

Abstract: A system and method for maintaining persistent data during an unexpected power loss uses a memory controller and a supplemental power source. An entity running on the computer, for example, an application program, a utility, the operating system or other entity, may identify data for preservation using an application program interface. The application program interface may be provided by the memory controller. A sensor determines when an unexpected power loss has occurred and signals the memory controller. Using power from the supplemental power source, i.e. a battery or capacitor, the memory controller copies the identified data to a non-volatile memory. The memory controller may set a flag to indicate that preserved data is available for later recovery.

Abstract: A device and method for making a peripheral device compliant with a power management standard, such as the USB standard, are described. The device includes a power management unit (PMU) and a timing unit. The PMU is coupled to a battery pack and to a processor of the peripheral device, and manages power allocated to the processor. The timing unit sends electrical signals to the input terminals of the PMU when the battery pack is connected to the peripheral device. The electrical signals activate the processor via the PMU. The timing unit sends the electrical signals before a configurable time from the time when the battery pack is connected to the peripheral device.

Abstract: An information handling system (IHS) employs a power fault protection circuit to protect the IHS from overvoltages which may occur on an information line from a power adapter to the IHS. The system includes a processor coupled to the protection circuit. The circuit is operative in a first mode to decouple an information line from the IHS in response to a disable command and operative in a second mode to decouple the information line from the IHS when a voltage in the information line exceeds a predetermined threshold voltage.

Abstract: A data processing apparatus which saves data in a volatile memory into a nonvolatile memory when power is off, the data processing apparatus including: a detecting circuit for outputting: a momentary interruption detecting signal when a power source voltage is below a first threshold voltage, and a power failure detecting signal when the power source voltage is below a second threshold voltage that is lower than the first threshold voltage; and a control section adapted to start saving of the data in the volatile memory into the nonvolatile memory when the detecting circuit has output the momentary interruption detecting signal, continue save of the data, and carry out a predetermined shutdown processing when the detecting circuit has output the power failure detecting signal after the detecting circuit has output the momentary interruption detecting signal.

Abstract: This invention is a system and method for simulating performance of one or more data storage systems. This invention may be used in many useful ways including for configuring or modeling a data storage environment, problem isolation, and general design.

Abstract: An information handling system having a plurality of blade server modules (BSMs) and power supply units (PSUs) uses a module monitor board (MMB) to monitor and control a power budget of the PSUs by each individual BSM requesting authorization from the MMB in order to power ON and boot-up. A blade management controller (BMC) may communicate with the MMB over a communications bus. However, if the firmware application controlling the BMC has been corrupted the BMC it may run in a “boot block” mode and not contain the intelligence necessary to obtain power ON authorization from the MMB. A single, existing input-output (I/O) line from the MMB to the BMC may be utilized to indicate power ON authorization for the respective BSM. The MMB and BMC may be adapted for preventing the BSM from powering ON without proper authorization from the MMB and that the BMC will always power ON the BSM when enough power is available from the PSU.

Abstract: A method is disclosed for verifying compatibility of components in a computer system. In one aspect, the BIOS determines the identity of the computer motherboard and chassis, and reads a CPU register to determine MaxCPUPower. The BIOS determines a MaxHostPower value based on characteristics of the identified motherboard and chassis. If MaxCPUPower exceeds MaxHostPower, then an error handler is invoked. In another aspect, the BIOS reads a CPU register to determine MaxCPUTemp, and determines a MinHostTemp value based on the characteristics of the identified chassis and the value of MaxCPUPower. If MinHostTemp exceeds MaxCPUTemp, then an error handler is invoked.

Abstract: The present invention relates generally to an adapter unit for a personal digital assistant. More specifically, this invention relates to an adapter unit that provides additional functionality, and improved ergonomics and increased ruggedness to the personal digital assistant. The additional functionality includes the ability to automatically change the function of one or more of the application buttons on the personal digital assistant upon the attachment of the adapter unit.

Abstract: A method determines actual power consumption for system power performance states (SPP-states) of a server. The method comprises initializing the server, performing a worst case workload test, measuring power consumption of the server at one or more SPP-states, and adjusting values in a lookup table to reflect the measured power consumption of the server.

Abstract: This invention provides a method to operate a terminal (100), as well as a terminal that operates in accordance with the method. The method includes, in response to initiating a data write operation with a non-volatile memory device (132), activating a sensor (190) that is capable of detecting that the terminal is falling; during the write operation, monitoring the sensor to determine if the terminal is falling and, if it is determined that the terminal is falling, terminating the write operation and executing a non-volatile memory shutdown procedure, else, if it is determined that the terminal is not falling, completing the write operation and deactivating the sensor.

Abstract: A method for handling data between a clock and data recovery system CDR and a data processing unit DP of a telecommunications network node TNN of an asynchronous communications network, using a bit rate adaptation circuit BAS, the bit rate adaptation system BAS including a memory unit MEM with a write process circuit Wp controlled by the recovered clock Rclk and a read process circuit Rp controlled by the local clock Lclk where the bit rate adaptation system BAS also includes a pointer synchronization controller PSC which, depending on the data detected on the input data signal DIb1 of the bit rate adaptation system BAS, sets the read and write pointers to a fixed initial address value. A Clock and Data Recovery system and a telecommunications network node TNN of an asynchronous network, which include a bit adaptation circuit BAS according to the invention, are also disclosed.

Abstract: An electronics-based system (100) for power conversion and load management provides control sequencing and prognostic health monitoring and diagnostics for fault tolerant operation of the system. The system (100) includes a prognostic health monitoring and diagnostic unit (30) for identifying present out-of-range conditions, overload conditions, and trending violations, for components of the system and a decision making unit (20), which controls transitions between a plurality of operating modes to ensure fail-safe operation without unnecessary tripping, cold-starts or system resets upon the occurrence of certain fault conditions.

Abstract: An improved data modem (IDM) and method includes a communication processor module, a mass storage module, a power converter module, and one or more DSP modules. The communication processor module utilizes commercial off-the-shelf components as well as electrically programmable logic devices (EPLD), which are programmed to provide a watchdog timer, programmable interrupt controller, flash page addressing, ISA bus decoder and controller, and various circuits and logic.

Abstract: An NVRAM fail-over controller including a NVRAM device connected to a host computer, the host computer having the ability to directly control the NVRAM device. The NVRAM fail-over controller includes an embedded processor that is powered by back-up power. The NVRAM fail-over controller includes a network interface that is powered by back-up power.

Abstract: A device connected to a bus and a device driver for controlling the device, capable of preventing the device from falling into a forced use suspension (disable) state. Prior to notice of power consumption by a USB device connected to the bus(USB), the device driver acquires knowledge of remaining electric power that can be supplied by the bus. According to whether the remaining electric power is satisfactory for power consumption expected to be notified of by the USB device, the device driver permits the notice of power consumption by the USB device and causes the bus to start electric power supply, or executes avoidance processing in order to avoid shortage of power.

Abstract: Methods and apparatus are provided for reserving power in a handheld computer by inducing a sleep mode when the energy supply of the handheld computer reaches a predetermined low level. A software is provided which operates a sleep mode when a device of the handheld computer detects a predetermined low battery voltage. A processor operates the software to place the handheld computer in a low energy-consuming shutdown state in which an interrupt controller operates to mask those interrupt signals thus providing an user with the impression that the device has entered an unresponsive sleep mode. In maintaining the sleep mode, the processor operates such that all input signals that request the handheld computer to power up remain active but so long as the battery voltage remains below a predetermined voltage the interrupt signals to power up selected applications and devices are masked.