Abstract: An NVRAM fail-over controller including a NVRAM device connected to a host computer, the host computer having the ability to directly control the NVRAM device. The NVRAM fail-over controller includes an embedded processor that is powered by back-up power. The NVRAM fail-over controller includes a network interface that is powered by back-up power.

Abstract: A device connected to a bus and a device driver for controlling the device, capable of preventing the device from falling into a forced use suspension (disable) state. Prior to notice of power consumption by a USB device connected to the bus(USB), the device driver acquires knowledge of remaining electric power that can be supplied by the bus. According to whether the remaining electric power is satisfactory for power consumption expected to be notified of by the USB device, the device driver permits the notice of power consumption by the USB device and causes the bus to start electric power supply, or executes avoidance processing in order to avoid shortage of power.

Abstract: Methods and apparatus relating to computer system maintenance and/or diagnostics are described. In an embodiment, maintenance and diagnostics operations may be performed on a computer system during power-down modes, e.g., without disturbing the pre-power-down state of the computer system. In another embodiment, a request may be provided to perform a maintenance operation on a computer system in response to a power-down state of the computer system. Also, some contents of a state of the computer system may be stored in a memory in response to the at least some contents not previously having been backed-up in accordance with one embodiment. Other embodiments are also disclosed.

Abstract: The present invention provides a method and apparatus for supplying redundant power. The apparatus includes a first power supply adapted to provide a first portion of power. The apparatus further includes a second power supply adapted to provide a second portion of power and a distribution network, wherein the distribution network is adapted to direct the first portion of power and the second portion of power to a first split path adapted to transmit signals in a system.

Abstract: With a storage system including a drive and a controller, which are connected to each other via cables, and with a method for controlling the storage system, an emergency power supply voltage for a power failure at the drive is multiplexed at the controller with a first signal to be sent to the drive, and the resultant emergency power supply voltage is sent via the cable to the drive. When a power failure occurs at the drive, the drive is powered with the emergency power supply voltage sent from the controller, and specified power failure information is multiplexed at the drive with a second signal to be sent to the controller, and the resultant power failure information is then sent via the cable to the controller; and specified processing is executed at the controller in response to the power failure information sent from the drive via the cable.

Abstract: Methods and apparatuses that automatically determine the capabilities of UPS devices. Systems automatically determine whether a UPS device is capable of protecting system resources by comparing the UPS capabilities against system requirements. Such systems can use that determination to approximate how long a UPS device can reliably supply power. Systems having multiple UPS devices can be implemented such that the connections of the UPS devices to system resources are automatically determined, the load on each UPS device can be found, the capabilities of the UPS devices can be obtained, a comparison between UPS load and UPS capabilities can made, and a warning of problems can be sent. Using UPS capability and load information a system can provide for a controlled shutdown of system resources.

Abstract: A method and system for improving Field Replacement Unit (FRU) isolation in memory sub-systems by monitoring Voltage Regulator Module (VRM) induced memory errors. A comparator compares the output voltage coming from the VRM to memory. If the comparator detects a VRM output voltage transient that is outside a rated threshold, then a counter is increased by one. If the counter exceeds a count threshold, a VRM error is posted. If a memory failure occurs within a predetermined period of time, then the VRM error pinpoints the VRM output voltage transient as being the likely cause of the memory failure.

Abstract: The disk array device supplies appropriate power to various parts in accordance with the operating mode in cases where the output of the main power supply drops. The disk array device adjusts the power from a commercial power source 6 with an AC/DC power supply 5, and supplies this power to a power supply common bus 7. A disk drive group 1 and a control circuit board group 2 constituting electrical loads are respectively connected to the power supply common bus 7. When the supply of power from the main power supply stops, the capacitor box 3 supplies a relatively large current for a short time only, in order to retain data during an instantaneous power outage. Then, the battery boxes 4 supply power to the power supply common bus 7 for a relatively long period of time, in order to perform destage control and memory backup. The battery boxes 4 perform balancing control of the output current in order to suppress variation in the output current value among the battery boxes 4.

Abstract: Described are techniques for processing data requests in connection with an I/O operation. A write data request is sent from a host to a target data storage system. The host performs a data validation, such as a checksum calculation, using the data of the data request. The data request is sent to the target data storage system. The target data storage system may be enabled to perform data validation processing on a per device basis by setting one or more device flag bits for a device. The target data storage system performs data validation processing in accordance with the flag bit settings of a device associated with a data request. A target checksum value using the data received on the target data storage system is determined and compared to the host checksum value in order to determined data validity. Data recovery processing is performed if data corruption is determined.

Abstract: A method and apparatus for notifying an end user of a powered device on an Ethernet based network that the powered device will not be reliably powered due to an excess demand condition comprising: detecting an attached powered device; identifying the class of the attached powered device, the class comprising the power requirements of the attached powered device; identifying an excess demand condition; and temporarily supplying power to the attached powered device for a time interval thereby notifying an end user that the powered device is not being reliably powered because of an excess demand condition.

Abstract: The method forms a plurality of DMA data payloads each comprising a plurality of first sectors, and sends to a sector format conversion device one or more of those DMA data payloads. The method then overlays the (i)th DMA data payload onto part or all of a plurality of second sectors to form the (i)th converted DMA data payload, enqueues that (i)th converted DMA data payload in a data queue, transmits that (i)th converted DMA data payload to a data storage device, and writes the (i)th converted DMA data payload to an information storage medium.

Abstract: A method to convert a plurality of sectors from a first sector format to a second sector format is disclosed. The method provides (N) contiguous first sectors comprising a first sector format to a sector format conversion device which includes a buffer and a data queue, where those (N) first sectors comprise a first number of bytes, and determines that (M) contiguous second sectors, comprising a second sector format, comprise at least the first number of bytes. The method overlays the (i)th first sector onto part or all of the (j)th second sector, and enqueues the newly-overlain (j)th second sector. The method then transmits the newly-overlain (j)th second sector to a data storage device, and writes that (j)th overlain second sector to an information storage medium.

Abstract: An apparatus is disclosed to convert data from a first sector format to a second sector format. The sector format conversion device includes a processor, and microcode which causes the processor to overlay (N) first sectors having a first sector format onto (M) second sectors having a second sector format, where that sector format conversion device does not include an operating system comprising a user mode and a kernel mode.

Abstract: An integrated circuit has a power grid and a set of independently switchable voltage islands, together with a system and method for measuring the voltage and history of the voltage on the power grid to determine the correct time to allow a large capacitive load (such as a voltage island) to be switched on to or off the power grid.

Abstract: A system and method for minimizing memory corruption at power up and/or reset is provided. The system includes, a digitally controlled potentiometer between an adapter and the memory; and a voltage divider functionally coupled to the potentiometer. The voltage divider includes a pull-down resistor that brings down the voltage at one of the plural potentiometer pins, minimizing the chances of memory corruption at power up and/or reset. The method includes, setting the potentiometer to a resistance value such that upon power up and/or reset data cannot be written to the memory; and setting the potentiometer in an increment or decrement mode such that resistance between plural pins of the potentiometer can be increased or decreased allowing content to be written to the memory after power up and/or reset.

Abstract: A power supply unit according to a preferred embodiment of the invention is self testing. The power supply unit is enabled to function with no external loads applied, and includes a visual indicator of whether or not one or more voltage outputs of the power supply unit is within tolerance. To benefit from the self-test feature, a user in the field may simply unplug the power supply unit from all loads, plug the unit into an A/C source, and observe the visual indicator. If the visual indicator is lit, then the user may reasonably assume that the power supply unit is functioning correctly. But if the visual indicator is not lit, then the user may reasonably assume that the power supply unit is faulty.

Abstract: A circuit for prevention of unintentional writing to a memory prevents unintentional writing to a nonvolatile memory, after a recovery from a transitory power failure. The circuit includes a low-voltage detection circuit for detecting a power supply voltage drop depending on the state of a control signal for the detection circuit. A writing operation to the memory is prohibited depending on the control signal as well as upon an output signal of the low-voltage detection circuit.

Abstract: Debugging a device, including a device having power-saving features, may include observing and controlling power state transitions.

Abstract: One embodiment disclosed relates to a system for power distribution to network devices. The system includes a plurality of network switches each having an internal power supply and a plurality of ports for connecting to the network devices and an external power supply having a plurality of output ports for connecting to the network switches. The external power supply communicates power available to the network switches. Each network switch determines amounts and priority levels of power for the network devices connected thereto, sums together the amounts at each priority level, determines additional amounts and priority levels of power required beyond the is internal power supply capability, and sends a power request to the external power supply. The external power supply allocates power to the network switches depending on the power requests received.

Abstract: A control and power supply system for the actuators of at least two airplane seats, which are preferably adjacent. The actuators of an airplane seat and the actuators of at least one other airplane seat are connected to a common control unit by a data link device. Each actuator can be supplied by at least two power units. In case of control unit failure, at least one actuator takes over the function of the control unit. For uncoupling defective parts of the corresponding bus structure, all the actuators are provided with elements for cutting the ingoing and outgoing data lines and power lines.

Abstract: A system and method for the reliable firmware update of a disk connected to a fibre channel loop fabric allows the specified filers and other predetermined system devices connected to the fabric to be made aware of a firmware download to the target disk without need of a system broadcast message, and while avoiding an alert or error condition such as those encountered through an FC-AL reset request. The target disk returns a special downloading firmware reject code embedded in a low-level protocol that remains operative during a firmware download. This reject code is recognized by an accessing system device as indicating that the disk is currently downloading updated firmware. In this manner, having recognized the code, the system device holds any I/O operations with respect to the target disk for a given delay time. Thus, the system device does not misinterpret the unavailability of the disk as a failure, leading to an unwanted system-wide FC-AL reset state.

Abstract: A power cut-off protection control circuit and method. A memory pair and a selecting circuit are provided. The memory pair stores data made available at respective storage inputs of first and second storage elements of the pair and provides the stored data at respective storage outputs thereof. The memory pair has a polarity selecting input through which the output of one of the first and second storage elements is caused to correspond to a first control state of the switch and the output of the other of the first and second storage elements is caused to correspond to a second control state of the switch. The selecting circuit has inputs coupled to the respective storage outputs of the memory pair and an output coupled to a control line of the switch for controlling the switch. A selecting line of the selecting circuit selects between the inputs, for selecting one or the other of the storage outputs of the first and second storage elements.

Abstract: A method and system is described for remotely managing a battery powered client computer. A data packet, which includes a set of instructions, is sent to the client computer from a managing computer. Included in the data packet is a field indicating how much computing time is needed to execute the set of instructions. If the client computer is operating on battery power, the client computer determines if there is enough battery life remaining to execute the set of instructions. If not, then the set of instructions are disregarded.

Abstract: The modular master control unit of the telecommunications power system communicates via a data bus with the associated modular rectifier units, distribution unit(s) and battery connection unit(s) to collect operating state information from the neuron processors of those units and store that information in a database. The master control unit also controls the operation of the associated modular units by supplying operating state information, based on values stored in the database. The user interface manager module provides local user interface control over the system by allowing the user through a local display screen and touch pad to read from and write to the database. By downloading an applet to a remote computer running a web browser, the user interface manager allows users at remote locations to perform the same control and monitor functions as a user at the local site. The applet runs within the standard browser and communicates with the user interface manager using TCP/IP protocol.

Abstract: A memory device tester capable of testing for proper operation of reduced power states in memory devices. The memory device tester can include a processor or a state machine, each configured to send commands to the memory device, and to compare results. An example of a memory device that can be tested by the memory device tester is a Direct Rambus Dynamic Random Access Memory (DRDRAM). The described processing systems and other circuits can test a DRDRAM for proper operation in a standby (STBY) state. When the DRDRAM is in STBY, the column decoder is shut off to conserve power, and the DRDRAM should not respond to column packets on the column control bus. The method and apparatus provide for testing that the column decoder is shut off when in STBY with no banks active, which is the recommended usage pattern for the part.

Abstract: Disclosed is a system having a power input line. A power supply facility provides the system with a combined set of signals including a power signal and a status signal over the power input line. Additionally, disclosed is a system having at least two power input lines. Uninterruptible power supply facilities provide the system with combined sets of signals including a power signal and a status signal over the power input lines. Each combined set of signals includes a unique UPS identifier, which can be used to determine whether power sources for power input lines are unique.

Abstract: Volatile memory is placed into a data-preserving safe state in a computer system in response to any one of a reduction in power applied to the volatile memory, a bus reset signal on a data communication bus of the computer system, and an absence of a bus clock signal on the bus. The volatile memory is powered from an auxiliary uninterruptible power supply in response to the reduction in power. The volatile memory is also placed into the data-preserving safe state in response to a cessation in executing software instructions by a CPU of the computer system. Placing the volatile memory into the safe state in response to and under these conditions enhances the opportunity to preserve data in response to error and malfunction conditions.

Abstract: When a reset signal /RESET is “L”, a flip-flop circuit holds “1”; on the other hand, a flip-flop circuit holds “0”. When the reset signal /RESET becomes “H”, the flip-flop circuits captures data in synchronous with a clock signal. When a power supply voltage returns to the initial value after an instantaneous blackout occurs, the data of the flip-flop circuits have the same value. An output signal of an exclusive-OR gate circuit becomes “L”, the output is held in a flip-flop circuit. As a result, an instantaneous blackout detection signal becomes “H”.

Abstract: An image recording/reproducing apparatus includes a first device for reproducing data from a recording medium, a second device for recording the data reproduced by the first device, a data maintenance unit for controlling the operation of the first and the second devices, a power supply unit for supplying a power to the first and the second devices, a power control unit for controlling operation of the power supply unit, an error data detecting unit for detecting an error data among the data recorded in the second device, and a main control unit, which, upon receiving a power cut-off command, controls the data maintenance unit to stop the operation of the second device and delete the error data detected by the error data detecting unit. Then, with the deletion of the error data, the main control unit controls power control unit so that the power supply unit cuts off the power supply.

Abstract: A system and method for providing critical state monitoring for a power supply, such as an uninterruptible power supply (UPS), is provided. In one embodiment, the invention includes a notification system for at least one power supply coupled to a computer network and adapted to transmit information such as a trap over the computer network when one of the power supplies undergoes the entry of a critical state, wherein the notification system includes a computer system connected to the computer network and has running on it a monitoring program, a reporting program and a database. The monitoring program monitors the network and detects the information being associated with the entry of the critical state. The database stores the information relating to the information transmitted over the network being associated with the entry of the critical state. The reporting program reports over the computer network the information relating to the duration of the critical state.

Abstract: An arbitrary number of a plurality of physical devices are mapped to each logical device provided for a host as a working unit, while considering a priority given to each logical device, and with each physical device being made up of a plurality of disk devices. This arrangement allows dirty data to be quickly saved to the disk devices in the order of logical device priority in the event of a failure. Furthermore, jobs are preferentially processed for important tasks in the event of a failure to reduce deterioration of the host processing performance.

Abstract: A control apparatus to which plural power devices are connected via a communication line. The power devices send data indicating a self-diagnostic result to the control apparatus by serial communications via the communication line. A CPU ignores serial communication data when a low-voltage detection circuit detects an abnormal drop in power source voltage. A period for ignoring data is set to time at which a completion of serial communication with all the power devices is determined by counting the number of communications by a counter. Even in case where an influence by the drop in power source voltage remains after recovery of the power source voltage due to communication delay, data that may includes abnormality is ignored and only self-diagnostic data with high reliability is used.

Abstract: An information processing apparatus includes a high-speed processor, and the high-speed processor processes a game program restored in a memory cartridge. A power control routine is then executed, and capacitors (C4, C5) included in a charge pump circuit is repeatedly charged and discharged. If an error occurs in the high-speed processor and then the power control routine is not properly executed, a difference in electric potential (VC) between one end of a resistor (R10) and a reference electric potential surface or point increases. When the difference in electric potential exceeds a threshold value, a supply of stabilized voltage is stopped by a power on/off control circuit, and an entire system including the high-speed processor is then turned off.

Abstract: A method and circuit provide a system level reset function for an electronic device. An initial reset function is provided under a low voltage condition of supply voltage, such as occur upon first energizing the electronic device. A tunable reset function is also provided, which can first be asserted at a voltage level setting less precise than that setting becomes upon tuning. Further, a boot-up reset function is provided, which provides its reset function at a voltage level setting that is set according to a calibration. Calibration can be based on data stored in a non-volatile memory, and can involve a checksum operation. The electronic device, a microcontroller for instance, is held in a reset state with any of the initial, tunable, and boot-up reset functions.

Abstract: A power failure detection system for detecting power failures in a cash dispenser machine and in an associated card reader includes an external signal input part for receiving a power failure signal from a first power failure sensing circuit located in a host cash dispenser machine, a card reader associated with the cash dispenser; an internal power source located in the card reader, a second power failure sensing circuit located in the card reader; a power failure signal output part for receiving and processing power failure signals from the external signal input part and from the second power failure sensing circuit. The power failure signal output part contains a circuit to output a final power failure signal if either the card reader or the cash dispenser has a power failure wherein the shape of said final power failure signal indicates whether the card reader or the cash dispenser or both experience a power failure.

Abstract: An apparatus and method for erasing incomplete and/or pending jobs from a marking device's non-volatile memory after a power loss. A threshold power loss duration can be selected, as can type of job(s) to be erased and whether users should be notified of erasure.

Abstract: A command transmission/reception section (4R), a power-control determination section (8) and a power control section (9) are provided in a controlled device (3) which is connected to a network (1) and which performs power control in response to a command transmitted from a control device (2). Upon receipt of a power control command from the control device (2), the power-control determination section (8) determines as to power-on/power-off in units of a block, and performs power control on the basis of a result of the determination. Consequently, unnecessary power-on in, for example, video reservation can be prevented.

Abstract: A method and apparatus are provided for preventing data corruption in an information handling system when a server requests the system to perform a system management activity and the amount of battery energy remaining available to the system is not known by the requesting server. After waking up the information handling system from a sleep state, the server interrogates the system to determine the state of charge of the battery. The server considers both the remaining state of charge of the battery and the time and energy required to carry out the requested operation. If the battery has sufficient charge to carry out the particular requested operation, then the server instructs the system to carry out the particular operation. However, if the battery does not have sufficient charge to carry out the particular requested operation, then the server does not continue the requested operation or aborts the operation.

Abstract: A disk array device having two or more disk units, each disk unit including at least one disk drive, at least either of said disk units having parity bits carrying data recovery information, comprises at least one backup battery provided for each of said disk unit.

Abstract: A system includes servers accessing storage through a storage area network. The storage has a plurality of ports which may differ in data transfer speed, and memory resources connected to these ports. Data transmission between a port and a server is monitored. If the amount of data transfer exceeds prescribed limits, then a different port is selected, and that port is used for further communications.

Abstract: A system is capable of receiving Fast Page mode, Extended Data Out mode, Burst Extended Data Out mode, or a combination of these memory devices. A method of determining the type of memory present allows the system to adjust internal memory access signals in accordance with the type of memory installed. The system may be shipped with a first type of memory, and then upgraded to a second type of memory by the user to improve overall system performance. A first bank of memory may be of a first type, and a second bank may be of another type. The user may make cost versus performance decisions when upgrading memory types or capacities.

Abstract: Battery information is transmitted from a recording and playback apparatus to a host computer. In the host computer, based on the time for which operation can be continued, corresponding to the current operating status and the remaining battery level that is included in stored battery information, a warning is output, the data of a cache memory is written, data writing prohibition is set, and a forced closing process is performed. With this construction, in a system formed of a portable recording and playback apparatus and a personal computer, a proper system operation corresponding to the remaining battery level of the recording and playback apparatus is obtained, and the data recorded in the recording medium is prevented from being destroyed as a result of operation stopping due to, for example, the remaining battery level becoming zero while recording.

Abstract: The present invention discloses a method for saving data including system status data stored in a memory to a backup server via a data communication network if the remaining capacity of the battery is not sufficient, by confirming continuously the remaining capacity of the battery, in a suspend mode in a computer system. Accordingly, the present invention previously prevents important data from losing although the system-down is occurred abruptly by the perfect discharge of the battery.

Abstract: A circuit configuration applicable to systems such as consumer electronics devices enables communication between components such as integrated circuits connected to the bus. According to an embodiment, the RUN power supplies are turned to an OFF state in response to a fault condition. An interface circuit associated with an integrated circuit coupled to the bus controls the loading on the bus caused by the interface circuit and the integrated circuit such that communication between devices on the bus can continue. Therefore, even when a fault condition results in the loss of the RUN power supplies, a command can be transmitted over the bus from a first integrated circuit in a powered state to a second integrated circuit in the powered state while a third integrated circuit connected to the bus is in an unpowered state.

Abstract: In an information storage apparatus including an uninterruptible power supply (UPS), a sequence of operation from when a power failure occurs to when power of the UPS is turned off is automatically accomplished completely without human power to thereby guarantee user data. For this purpose, the apparatus includes a disk array, a host, and a plurality of UPSs to supply power to the disk array and the host. The UPSs monitor a state change of power on a host side by a host ac control line or an SCSI unit to sequentially execute processing in an order of processing of host termination, processing for cache flush of the disk array processing of host UPS termination processing of disk array termination and processing for termination of disk array UPS. Between the UPSs and the Host and between the UPSs and the disk array, there is provided an interlocking control signal to monitor current states thereof so as to control the respective operations.

Abstract: A memory system provides one or more control signals for configuring and controlling a memory sub-system during a power failure or system reset. A power delay circuit and a power fail controller cooperate to quickly place the memory system in a retention state in the event a power failure event is detected. The power delay circuit detects either a reset signal or power failure to initiate the memory retention state. The power delay circuit and power fail controller ensure the memory system is initialized prior to entering the retention state.

Abstract: A rapid self-error-check circuit of a computer power supply is disclosed, wherein a computer power supply is installed with a self-detecting device; an LED displaying light and detecting button are exposed on the casing of the power supply; thereby, the normality of the power supply can be detected by pressing a detecting button and then the result is displayed through the colors of the LED displaying light.

Abstract: A method for preserving data on a portable apparatus having a limited power source is disclosed comprising: detecting that power available in the power source has reached a threshold value; and saving data stored in a volatile memory on the portable apparatus to a server.

Abstract: An object of the invention is to make it possible to secure data retained by a cache memory with high reliability without increasing the size or cost of a storage device. When a host-handling processor and a disk processor have recognized occurrence of a power failure, operation of a storage device is continued for about one minute on DC power that is supplied from a battery module. After a lapse of one minute from the occurrence of the power failure, the host-handling processor interrupts the connection between the storage device and a host. Then, the host-handling processor turns off a SW of a host I/F and the disk processor writes, to an HDD, data that have been written to a cache memory. After completion of this processing, the disk processor turns off a SW of the disk I/F and a SW of the HDD. Then, the disk processor causes the battery module to supply DC power only to the cache memory.

Abstract: A computer system comprising a personal computer assembly (motherboard), memory for storing data, means for detecting loss of applied power, and means responsive to the detecting means for inhibiting data transfers by the processor of the personal computer and the memory. In accordance with the invention, memory comprises non-volatile memory and the inhibiting means applies a signal to the memory to inhibit data transfer operations of the memory. The means for detecting loss of applied power detects loss at a power mains connection of a power supply for supplying operating power to the personal computer assembly. A machine control comprises a computer system according to the invention.