Abstract: An integrated circuit includes a DMA controller for performing conventional DMA transfers and for backing-up and restoring data during low power events. The integrated circuit includes one or more processor components, one or more peripheral components, a power management circuit and the DMA controller. The power management circuit manages power control within the integrated circuit. The DMA controller includes a DMA engine for executing DMA transfers between different ones of the components and memory based on configuration parameters provided to the DMA engine. A detection circuit configured determines if the power management circuit initiates a power state change. The DMA controller also has circuitry for providing a first set of configuration parameters to the DMA engine if no change in power state is detected and overriding the first set of configuration parameters with a second set of configuration parameters if a change in power state is detected.

Abstract: A controller for use in managing an operational lifetime of at least one wind turbine is communicatively coupled to at least one wind turbine and a server sub-system. The controller is configured to receive operational data from the wind turbine, transmit the operational data to the server sub-system, and transmit a request for historical data corresponding to the wind turbine to the server sub-system. The controller is further configured to receive a response from the server sub-system, wherein the response includes historical data corresponding to the wind turbine, and to determine an estimate of a time failure of the wind turbine based on at least one of the operational data and the historical data.

Abstract: A semiconductor storage system includes a memory controller that classifies a memory block of a memory area into a data block and a buffer block. The buffer block corresponds to the data block. The memory controller compares the number of free pages of both the data block and the buffer block with the number of valid pages of the data block and the buffer block during mergence in order to select the merged target block. Depending on the result of the comparison, either the data block or the buffer block is selected as the merged target block.

Abstract: An electronic device includes a power supply unit that generates plural output voltages from an input voltage and outputs the various output voltages from respective plural power supply channels, a voltage detecting unit that monitors voltages of two power supply channels among plural power supply channels which are different in decreases of the output voltage in the case that the input voltage is cut off, outputs a first detecting signal upon detecting a decrease in voltage of a first power supply channel having a fast decrease to a first threshold and outputs a second detecting signal upon detecting a decrease in voltage of a second power supply channel having a slow decrease to a second threshold, and a control unit that saves data upon receiving the first detecting signal and stops an operation of the electronic device upon receiving the second detecting signal.

Abstract: Memory storage apparatus include a non-volatile memory for storing data and a power management unit configured to sense a level of an external power supply and to predict a loss of the external power supply. A power-polling time control circuit is configured to control a time when a voltage level sourced from the external power supply is reduced below a predetermined level after loss of the external power supply. A control logic controls read and/or write operations of the non-volatile memory responsive to a prediction of loss of the external power supply from the power management unit.

Abstract: In an example embodiment, a method is provided to identify an error associated with a system battery. This system battery is operably associated with a computing device and is used to power the computing device. A parameter of the system battery is tested and an error associated with the system battery may be detected. In an example, the error may be detected before the operating system is loaded onto the computing device. In another example, the error may be detected when the computing device is waking from a reduced power mode.

Abstract: A data storage apparatus includes a memory, a monitoring unit for monitoring an unauthorized action on data stored in the memory, a first power supply for supplying power to the monitoring unit, and a power storage unit which supplies power to the monitoring unit when supply of the power from the first power supply to the monitoring unit is stopped and which is charged while the power is being supplied from the first power supply to the monitoring unit.

Abstract: In a circuit board on which a plurality of CPUs are mounted, the CPUs comprises: monitor units for outputting task statuses of the respective CPUs; and a diagnosis circuit connected to the plurality of CPUs, comparing and judging combinations of the task statuses of the plurality of CPUs based on information on task statuses outputted from the monitor units, and detecting false operations and failures of the circuit board.

Abstract: A memory subsystem includes volatile memory and nonvolatile memory, and logic to interrupt a power down save operation of the memory subsystem upon detection of a restoration of system power, and to enable use of the memory subsystem by the system if sufficient nonvolatile memory capacity of the memory subsystem is available to backup an amount of the volatile memory capacity of the memory subsystem.

Abstract: A DC backup power supply system having a plurality of loads to which AC from a commercial power source is supplied, and DC power storage means for supplying DC power to the plurality of the loads at the time of a power outage of the commercial power source, said DC backup power supply system including: a control circuit having a first DC backup output for supplying a power from the DC power storage means to the plurality of the loads, including a specific load, only during the power outage of the commercial power source, and a second DC backup output for continuously supplying a power from the DC power storage means to the specific load regardless of the power outage of the commercial power source or sound operation thereof, the control circuit supplying the respective powers from the same DC power storage means to the first and second DC backup outputs.

Abstract: A system and method for protecting memory during system initialization is provided. A complex programmable logic device (CPLD) is operatively interconnected with a multiplexer to enable control of a memory to be switched between a memory controller and the CPLD in response to error conditions. If an error condition is identified, the CPLD assumes control of the memory and activates a battery subsystem to provide memory refreshes until system re-initialization. Upon system bring-up, interactions between the BIOS and CPLD assure that protected memory is fully recovered by the system. The contents of memory will remain protected from any further faults that may occur during the bring-up sequence.

Abstract: According to an embodiment of the invention, a method and apparatus for computer memory power backup are described. According to one embodiment, a memory system includes a first memory; a second memory coupled to the first memory and to a host, the second memory to transfer data between the first memory and the host; and a backup power source, the backup power source providing power to the first memory and the second memory if a main power source fails.

Abstract: The storage control device of the present invention switch-connects each of enclosures and individually stops the transmission of power to the enclosures that are not being accessed in order to reduce the power consumption amount. A plurality of additional enclosures are switch-connected via an inter-device switch to a base enclosure. Drives that have not been accessed for a predetermined period of time or more undergo spindown. If all the drives in the enclosure then assume the spindown state, the supply of power to each of the drives from the intra-enclosure power supply is stopped. In cases where all the drives in a certain enclosure have undergone spindown, the base enclosure turns OFF the switch in the power distribution circuit connected to this enclosure. As a result, the transmission of power to this enclosure is stopped. The fault diagnosis section detects a fault that has occurred with communications that employ the inter-device switch and specifies the point of the fault occurrence.

Abstract: A system for testing redundancy and hot-swapping capability of a redundant power supply includes a power switch fixture, a system under test (SUT), and a computing device. The power switch fixture includes a processor, an alternating current (AC) source, a first relay, a second, and two AC outputs. The processor is configured for controlling the AC source to output voltage to the two AC outputs by switching one of the first and the second relay on and the first and the second relay off, so as to ensure that one of the first power supply and the second power supply is operable to provide power to the SUT. The SUT includes a redundant power supply that includes a first power supply and a second power supply. The computing device includes a test control unit for testing redundancy and hot-swapping capability of the redundant power supply.

Abstract: Power consumption that occurs in response to software errors may be reduced. In one example a system tracks a number of occurrences a first set of code causes a system to perform one or more reset actions, determines whether the number of occurrences exceeds a threshold, and selects a second set of code to execute in place of the first set of code, if the quantity exceeds the threshold.

Abstract: A monitoring device and method are provided to monitor a separate device for malfunctions and to control and restore the malfunctioning monitored device to a normal functioning state. A malfunction state includes the monitored device being powered off or in a standby power state. The monitoring device includes control logic operative to determine a malfunction state of the monitored device and to control a reapplication of power to the monitored device to reboot the monitored device based on the determined malfunction state of the monitored device. The method for monitoring and controlling the monitored device comprises the steps of: determining a malfunction state of the monitored device; and controlling a reapplication of power to the monitored device to reboot the monitored device based on the determined malfunction state of the monitored device.

Abstract: One or more switches are interposed between a controller portion and a storage device. When transmission of a command to a certain storage device fails, a command is transmitted starting from an upstream side to a downstream side of a path between the controller portion and the switch to which the certain storage device is connected, and when command transmission fails while transmitting a command from a kth switch (k is an integer of 0 or more) which is connected to a (k+1)th switch and is one level upstream of the (k+1)th switch or from any port of the controller portion, it is determined that a failure has occurred in a power source that supplies power to the (k+1)th switch.

Abstract: The present invention provides a control method for an information processing system, which includes a plurality of processing apparatuses performing a mutually equivalent operation, comprising the step of isolating the processing apparatus for which a fluctuation of power source voltage is relatively large, from the information processing system, if an error is not detected in each of the processing apparatuses and respective items of output information from the plurality of processing apparatuses raise a nonidentity.

Abstract: This descriptive document is about a new backup device that takes advantage of the components of a PC's conventional power supply and it combines them with additional typical electronic components from an uninterruptible power supply (UPS). The result of such combination is a lower cost backup function that is applied directly to the PC and, therefore, eliminates the requirement of external devices—such as a UPS—to perform this backup function. In this document, the electronic components that combine with the PC's power supply in order to provide the backup functionality described above are referred to as integrated backup unit (URI).

Abstract: Certain embodiments of the present invention provide for a system for communication between a controller and a power supply using a communication interface. In an embodiment, a communication system includes a power supply having one or more diagnostics. The communication system also includes a controller, configured for controlling the power supply and monitoring the one or more diagnostics of the power supply. In addition, the communication system includes a communication interface, configured to receive from the controller and send from the power supply one or more signals. The communication system also includes a load, configured to operate using the power provided by said power supply.

Abstract: A self-service terminal comprises a pc core and at least one module, which can be powered down independently of the pc core, the terminal has a control application and an agent arranged to monitor the fault state of the at least one module and cause a fault signal to be sent from the self-service terminal when the fault state of the at least one module is characteristic of a problem with the at least one module. The agent is arranged to determine if the module has been powered down; whereupon the fault signal is buffered until the module is powered up and a determination as to the fault state of the module is again made. The fault signal is only sent if the fault state still indicates there to be a problem with the at least one module.

Abstract: A method of providing a power failure warning in a storage system includes partitioning early power off warning (EPOW) control logic of a storage enclosure to be symmetric with a power distribution network power domain. A power failure warning system for a storage system having a plurality of storage enclosures includes a power system control module coupled to a power supply for control and management of input power to the storage system. An output stage of the power supply is dedicated to a first virtual storage enclosure within one of the plurality of storage enclosures.

Abstract: According to some embodiments, delta checkpoints are provided for a non-volatile memory indirection table to facilitate a recovery process after a power loss event.

Abstract: Mechanisms for thresholding system power loss notifications in a data processing system are provided. Power loss detection modules are provided in a data processing system having one or more data processing devices, such as blades in an IBM BladeCenter® chassis. The power loss detection modules detect the type of infrastructure of the data processing system, a position of a corresponding data processing device within the data processing system, and a capability of the data processing system to provide power during a power loss scenario. The detection module detects various inputs identifying these types of data processing system and power system characteristics and provides logic for defining a set of behaviors during a power loss scenario, e.g., behaviors for sending system notifications of imminent power loss. The detection of the various inputs and the defining of a set of behaviors may be performed statically and/or dynamically.

Abstract: A print engine comprising at least one print controller and at least one associated authentication device is provided. Each authentication device has a processor, non-volatile memory, an input for receiving power from a power supply and a power detection unit. Each authentication device is configured to enable multi-word writes to the non-volatile memory under control of the associated print controller. The processor is configured to control and trim the amount of power supplied to the input to predetermine a threshold at which operation of the authentication device is established. The power detection unit is configured to monitor a voltage level of the power supplied to the input, and in the event the voltage level drops below the predetermined threshold, preventing subsequent words in any multi-word write currently being performed from being written to the memory.

Abstract: A data storage system using flash storage maintains a status indicator corresponding to data written into the flash storage. The status indictor of the data indicates whether a disruption, such as a power disruption or a device disconnection, occurred when the data was being written into the flash storage. The data storage system determines whether the data may be corrupted based on one or more of the status indictors. The data storage system may make this determination at a selected time or after a power-up of the data storage system. If the data is determined to possibly be corrupted, the data storage system may optionally discard the corrupted data from the flash storage or flag the corrupted data for future removal.

Abstract: A user device is provided. The device includes a main power supply, and an auxiliary power supply. The main power supply provides a main power. The auxiliary power supply cuts off the main power according to a power level of the main power supply and provides an auxiliary power upon Sudden Power-Off (SPO).

Abstract: A method and system for improving Field Replacement Unit (FRU) isolation in memory sub-systems by monitoring Voltage Regulator Module (VRM) induced memory errors. A comparator compares the output voltage coming from the VRM to memory. If the comparator detects a VRM output voltage transient that is outside a rated threshold, then a counter is increased by one. If the counter exceeds a count threshold, a VRM error is posted. If a memory failure occurs within a predetermined period of time, then the VRM error pinpoints the VRM output voltage transient as being the likely cause of the memory failure.

Abstract: A microcontroller receives a supply voltage (VCC) from one or more batteries. Rather than automatically resetting the microcontroller if VCC drops below a VBO voltage, a latent VBO reset circuit does not reset the processor if VCC drops below a second voltage (VBO) as long as VCC does not fall so low that a power on reset (POR) circuit of the latent VBO reset circuit is tripped. The processor continues to operate as long as it can below VBO, thereby maximizing battery usage. When VCC rises to a third voltage (for example, due to battery replacement), then the latent VBO reset circuit automatically resets the processor to remove potential ill-effects of having operated below VBO. User data stored in volatile memory is not lost during battery replacement. A special VBO bit in a processor-readable status register indicates that the microcontroller operated below VBO.

Abstract: An identification apparatus for backup-type power supply systems aims to be used on a backup-type power supply system which includes real power supply devices and dummy power supply devices to form a N+1 architecture to output power. It has signal generation means located on the real power supply devices and dummy power supply devices to generate real identification signals and dummy identification signals of different potentials and a signal detection means to receive the identification signals to identify the real power supply devices and dummy power supply devices. Thereby operators can clearly understand coupling and installation conditions of the power supply devices of the backup-type power supply system to perform power risk management.

Abstract: Methods, apparatus, and computer program products for variable dynamic throttling of network traffic for intrusion prevention are disclosed that include initializing, as throttling parameters, a predefined time interval, a packet count, a packet count threshold, a throttle rate, a keepers count, and a discards count; starting a timer, the timer remaining on no longer than the predefined time interval; maintaining, while the timer is on, statistics including the packet count, the keepers count, and the discards count; for each data communications packet received by the network host, determining, in dependence upon the statistics and the throttle rate, whether to discard the packet and determining whether the packet count exceeds the packet count threshold; and if the packet count exceeds the packet count threshold: resetting the statistics, incrementing the throttle rate, and restarting the timer.

Abstract: Battery information is transmitted from a recording and playback apparatus to a host computer. In the host computer, based on the time for which the operation can be continued, corresponding to the current operating status and the remaining battery level, stored in the battery information, a warning is output, the data of a cache memory is written, data writing prohibition is set, and a forced closing process is performed. With this construction, in a system formed of a recording and playback apparatus, such as a CD-R/RW drive unit, and a personal computer, a proper system operation corresponding to the remaining battery level of the recording and playback apparatus is obtained, and the data recorded on the recording medium is prevented from being destroyed as a result of operation stopping due to, for example, the remaining battery level becoming zero.

Abstract: A method of providing assured message delivery with low latency and high message throughput, in which a message is stored in non-volatile, low latency memory with associated destination list and other meta data. The message is only removed from this low-latency non-volatile storage when an acknowledgement has been received from each destination indicating that the message has been successfully received, or if the message is in such memory for a period exceeding a time threshold or if memory resources are running low, the message and associated destination list and other meta data is migrated to other persistent storage. The data storage engine can also be used for other high throughput applications.

Abstract: A method and apparatus determines and sets operating voltage on a JTAG interface by incrementally increasing a test voltage applied thereto. The contents of a register is monitored to detect when the contents switch (change) from a first value to a second value. The voltage occurring at the switch is doubled to establish the operating voltage.

Abstract: A method and system are described for distributing at least one clock signal between shelves in a multi-shelf modular computing system includes a clock signal generator for generating a first clock signal, an inter-shelf bus for carrying the first clock signal to a second shelf, and a first shelf manager module, associated with the second shelf, for receiving and regenerating the first clock signal and providing the regenerated first clock signal to at least one module within the second shelf. A system and method for detecting a location of a fault in an inter-shelf bus in a multi-shelf modular computing system is also disclosed. A power source applies a bias between at least two conductors of the inter-shelf bus. At least one module detects the applied bias to determine if a fault is located between the at least one shelf and the power source.

Abstract: A system is provided with a basic input/output system (BIOS) with the ability to intervene, when a suspend process is initiated in response to an AC failure condition to place the system in a suspended to memory state, to initiate a number of data transfer operations to save a persistent copy of an operational state of the system. The BIOS is further equipped to check one or more times whether the data transfer operations are completed, and causing a processor of the system to operate in a reduced power consumption mode at least one time period while the BIOS is not performing the checking.

Abstract: A power management system may be configured to allow digital information relating to the power management functions of sequencing and fault spreading to be passed between POL regulators using a standard multi-master multi-slave interface such as I2C bus interface or SMBus interface. POL regulators may be configured via pin strapping, and coupled to a serial data bus where they may monitor bus transactions initiated by other similar POL regulators. Each POL regulator may respond to the bus transactions initiated by other POL regulators according to its configuration, and may perform a variety of tasks associated with sequencing and fault spreading in addition to regulating its own voltage output. When configured with a standard multi-master/multi-slave interface such as an I2C bus interface or SMBus interface, the POL regulators may report information to multiple other POL regulators while maintaining compatibility with non-POL devices also connected to the bus.

Abstract: A circuit unit connects outputs from a first power supply and a second power supply in parallel, and simultaneously supplies powers from both power supplies to a load. A control unit controls an output current from the first power supply to an upper-limit value or lower, and controls an output current from the second power supply to a value obtained by subtracting the upper-limit value from a current detected by a current detector. An abnormality detector detects an abnormality in simultaneously supplied power, based on a reference current value associated with an operating state of the power supply apparatus and the current detected by the current detector.

Abstract: A status notification register storing a state of a function executing section is arranged for each function executing section. The function executing section includes at least one circuit for performing a predetermined function. By determining one of two values set in the status notification register, a power failure occurring in a functional unit is identified and an initial setting process is performed to an identified location when power is restored.

Abstract: An electronic system for testing a material includes at least one module for mechanically mounting on the material. The module includes a signal generator for generating a signal generator signal. The module also includes a stimulus signal delivering device (SSDD) and an SSDD circuit for providing a device signal derived from said signal generator signal to the material. The module also includes a sensor and a sensor circuit for receiving an interaction signal derived from interaction of the device signal with the material.

Abstract: A host apparatus capable of sensing failure in an external device connected thereto through communication cable, comprises an external signal detector for sensing failure in the external device by detecting signals of the external device through the communication cable; a display for outputting a predetermined message; and a controller for displaying a predetermined warning message informing the failure on the display, if the external signal detector senses the failure in the external device. Therefore, a user can be informed of the failure in the external device.

Abstract: A method, system, and computer program product are disclosed for dynamically managing power in a microprocessor chip that includes physical hardware elements within the microprocessor chip. A process is selected to be executed. Hardware elements that are necessary to execute the process are then identified. The power in the microprocessor chip is dynamically altered by altering a present power state of the hardware elements that were identified as being necessary.

Abstract: Embodiments of a method and system for saving system context after a power outage are disclosed herein. A power agent operates to reduce the possibility of data corruption due to partially written data during an unexpected power outage. The power agent can determine an amount of time remaining before a power store is depleted. Based on the amount of time, the power agent can store system context information. Correspondingly, the power agent can operate to save complete system context, partial system context, or flush (I/O) buffers. Once power is restored, the power agent can restore the system context based on the nature of the save. Other embodiments are described and claimed.

Abstract: A method for identifying power supply modules is adopted for use on a backup-type power supply system that includes real power supply modules and a dummy power supply module structured in a N+1 architecture to output power. By altering PG signal issue time and identifying PG signal delivery time difference of different power supply modules, the real power supply modules and the dummy power supply module can be identified. Thus operators can clearly understand coupling and installation conditions of the power supply modules of the backup-type power supply system to facilitate power risk management.

Abstract: A system comprises plural electronic modules, at least one interconnect structure and plural power supplies. The electronic modules communicate over the interconnect structure. The system further comprises plural redundant manager modules to perform management tasks with respect to the at least one interconnect structure and the power supplies.

Abstract: A power controller system is described herein, which may consist of one or more power controller ICs and other components. Each power controller selectively couples power supply voltages to a plurality of electrical devices, such as cards that have been inserted into expansion slots in a server. To simplify processing by a system processor monitoring the health of the power subsystem, each power controller IC asserts a power-good signal at a power-good terminal only if the operating conditions for all channels are satisfactory. A power good signal is generated even if a channel is not supplying power to a channel due to a card retention switch signal not being asserted or the channel is not enabled. The power-good signals from all power controllers in the system are then ANDed together to determine if any of the power controllers are experiencing unsatisfactory conditions.

Abstract: A communication control system has a plurality of control units that are connected via a communication bus to provide bidirectional communication. A control unit detects a failure when it occurs. Upon failure detection, the control unit generates a failure detection signal which operates a communication signal cutoff means to cut off the communication signal transmission from the control unit. In accordance with the communication signal reception state in a control unit other than the control unit in which the failure is detected, the former control unit identifies a failure occurrence in the latter faulty control unit.

Abstract: A system for analyzing mutually exclusive conflicts among a plurality of redundant devices in a computer system includes a data management module operable on the computer system. The data management module parses through status data generated by the plurality of redundant devices to identify an error condition in one of the plurality of redundant devices, generate metadata describing the error condition, and take action to resolve the error condition. A method of analyzing mutually exclusive conflicts among redundant devices in a computer system includes collecting status data from the redundant devices, identifying an error condition, generating metadata describing the condition, analyzing the metadata to determine a lowest-level or least impacting redundant device that is the root cause of the condition, and taking an action to resolve the condition.

Abstract: In at least some embodiments, a system comprises a processor and a memory coupled to the processor. The memory stores processor performance utility instructions and performance adjustment instructions. When executed, the processor performance utility instructions are configured to cause activities of the processor to be counted and to cause a processor utilization value to be determined based on the counts. When executed, the performance adjustment instructions are configured to adjust the processor utilization value based on a comparison of the processor's current operating frequency and maximum operating frequency.

Abstract: A system and method for preventing damage to media files within a digital camera comprise a power manager for detecting power failures, an interrupt handler for responsively incrementing a counter device and a removable memory driver for performing memory access operations, evaluating the counter device to determine whether a power failure has occurred during the memory access operation and for repeating the memory access operation whenever a power failure has occurred during the memory access operation.