Abstract: Aspects for monitoring audible tones indicative of operational status of each planar in a multiple planar chassis are described. Included in the aspects is the monitoring of a speaker channel of each planar of a plurality of planars in a common chassis for state changes of beep tones. An operational status of a specific planar emitting the beep tones is identified based on the state changes.

Abstract: System, method and computer program product for recovering from a failure of a computing device. Start up of a first component of the device is monitored and a determination is made whether the first component has started successfully. If so, a second, higher level component of the device is started. Operational data received from the second component is monitored. If the operational data falls outside of an operational boundary, an action is performed on the second component to enable the second component to operate within a preferred operational boundary. If the first component does not start up successfully, a determination is made if start up of the first component is critical to operation of the second component. If so, a corrective action is performed relative to the first component and afterwards, an attempt is made to start up the second component.

Abstract: A method, apparatus and program storage device for providing automatic recovery from premature reboot of a system during a concurrent upgrade is disclosed. A concurrent code-load to a plurality of storage controllers of a storage system is initiated. A code-load failure is detected. The stage of the code-load failure is identified. A code-load recovery process based upon the identification of the stage that the code-load failure occurred is initiated.

Abstract: In some embodiments, the invention involves a system and method relating to autonomic boot recovery. In at least one embodiment, the present invention utilizes an embedded partition to safeguard boot information to be used in the event of a boot failure. An agent within a VMM may be similarly used. The embedded partition or VMM agent enables the preservation of “Last Known Good” boot configurations as well as providing an agent to provide self-healing to a platform which might have run into some type of corruption of critical data. In some embodiments a variety of intelligent filter mechanisms are enabled to allow a user to target the preservation of only certain types of configuration data. Other embodiments are described and claimed.

Abstract: A computer implemented method and computer program product for detecting and communicating boot failures in a client device. A Dynamic Host Control Protocol server is configured to monitor Dynamic Host Control Protocol communications from one or more client devices, wherein the client devices are configured to boot from local media. A boot request is received from a client device in response to a failure of the client device to boot from the local media. Responsive to receiving the boot request, a determination is made that a boot failure has occurred on the client device.

Abstract: A few inexpensive hardware facilities are incorporated in a tightly synchronized cross checked design. These facilities allow initialization software to quickly bring the two processors to the same state by rapid, repeated resets and execution of the initialization software. The resets are done in a way as to be transparent to the rest of the system and to the end user.

Abstract: Under the present invention, a configurable dictionary is provided. The configurable dictionary includes a set of objects that identify: (1) attribute conditions of the computer system to be checked; (2) associated locations within the computer system for checking the attribute conditions; and (3) actions to be taken based on results of the checks for the computer system. The health of the computer system is checked by processing the set of objects in the configurable dictionary. Specifically, the attribute conditions identified in the configurable dictionary are checked at their associated locations, and any necessary action are implemented.

Abstract: A system and method for initializing a register file during a test period for an integrated circuit, wherein the register file has one or more input ports. A counter, when enabled, is initialized and counts at each write cycle of the register file and outputs a current count value to the input ports of the register file to pre-load the register file to a known state.

Abstract: A basic input/output system (BIOS) debugging system and method, which is applicable to a BIOS that has a debugging mechanism hidden by the BIOS in normal operation. The debugging method includes the following steps of (1) determining in a power on self test executed by the BIOS whether at least a preset input mode that is used for a user to enter the debugging mechanism is actuated or not, and proceeding to step (2) if the input mode is actuated, or continuing executing the POST; (2) entering the setting mode of the BIOS and displaying the hidden debugging mechanism; and (3) executing debugging functions provided by the debugging mechanism and/or resetting parameters provided by the debugging mechanism. Accordingly, the present invention allows the user to execute the hidden debugging mechanism after the completion of the BIOS initial setting, thereby, increasing the debugging efficiency.

Abstract: An application management system and method is proposed. The application management system includes a first processor and a second processor. The first processor executes an application in a computer system. The second processor includes a monitor module to monitor the execution status of the application. If the execution status of the application is abnormal, the monitor module enables the computer system to reboot, and uses the first processor to re-execute the application.

Abstract: Embodiments include writing a first data value to a validation variable through a fixed programming interface, where the validation variable includes multiple fields that correspond to multiple fields within a persistent variable. Contents of the validation variable are subsequently read through the fixed programming interface. When the validation variable contents include one or more differences from the first data value, one or more errors are identified.

Abstract: An apparatus includes a buffer that collects store instruction information associated with one or more processes. The collected store instruction information includes data and addresses where the data are to be stored. The apparatus also includes a buffer control that drains the buffer of store instructions associated with a first process before it collects store instructions associated with a second process.

Abstract: A memory system is provided which comprises a main memory that stores main data and reference data; a first storage that stores the reference data; and a controller that accesses the reference data from the main memory upon receipt of a power up signal, and loads the main data into a second storage when the reference data retrieved from the main memory is tested to be the same as the reference data in the first storage.

Abstract: Embodiments provide a data processing system comprising first initialisation software to initialise the data processing system, means to access storage comprising a first region and a second region comprising first software; the system further comprising second initialisation software arranged, using information associated with the second region, to access the second region to launch the first software.

Abstract: An on-line service is automatically accessed by the computer as it boots up to determine if a ROM update exists for the system. If so, the updated ROM code is downloaded to the system and the ROM is flashed. The operator of the system is generally uninvolved in this process and the process is preferably performed each time the system initializes. In this manner, the system's ROM is nearly always up to date proactively and the operator or IT administrator need not spend time and energy reacting to a problem, determining whether a ROM update exists, finding the updated ROM, downloading the new ROM code and flashing the ROM him or herself.

Abstract: In some embodiments, the invention involves a system and method relating to autonomic boot recovery. In at least one embodiment, the present invention utilizes an out-of-band (OOB) microcontroller to safeguard boot information to be used in the event of a boot failure. The OOB microcontroller enables the preservation of “Last Known Good” boot configurations as well as providing an agent to provide self-healing to a platform which might have run into some type of corruption of critical data. In some embodiments a variety of intelligent filter mechanisms are enabled to allow a user to target the preservation of only certain types of configuration data. Other embodiments are described and claimed.

Abstract: A system, method and software for isolating information handling system memory system devices are disclosed. In dual-channel double-data-rate memory system implementations, teachings of the present disclosure facilitate accurate identification of memory system devices that fail diagnostic testing or cause memory errors. A BIOS level application is provided which permits user or application selection and isolation of memory system devices or components, thereby eliminating the need for physical removal of such components during testing as well as permitting continued use of the information handling system with defective memory system devices isolated.

Abstract: A method of maintaining security of a BIOS included in a BIOS ROM of a computer system. The method of BIOS security of the computer system includes storing a check sum value calculated by byte-adding a user password and a product serial number of a BIOS ROM. The method further includes comparing the stored check sum value with a check sum value calculated by byte-adding an inputted password and the product serial number of the BIOS ROM. The method further includes enabling writing to the BIOS ROM when the stored check sum value and the calculated check sum value are equal. Thus, by adding a checking function to check the product serial number given by manufacturer and the director password given by a user, the BIOS ROM is effectively protected from an optional or malicious falsification, change, or removal action.

Abstract: A computing system is provided which includes a processor having a cache memory. The cache memory includes a plurality of independently configurable subdivisions, each subdivision including a memory array. A service element (SE) of the computing system is operable to cause a built-in-self-test (BIST) to be executed to test the cache memory, the BIST being operable to determine whether any of the subdivisions is defective. When it is determined that one of the subdivisions of the cache memory determined defective by the BIST is non-repairable, the SE logically deletes the defective subdivision from the system configuration, and the SE is operable to permit the processor to operate without the logically deleted subdivision. The SE is further operable to determine that the processor is defective when a number of the defective subdivisions exceeds a threshold.

Abstract: A test apparatus for testing a booting and shutdown process of a computer system provided. The test apparatus includes a power control unit and a test control unit. The power control unit is for receiving AC power, and selectively outputting the AC power to a power supply end of the computer system. The test control unit outputs a power control signal to the power control unit, for controlling the power control unit to output the AC power to the power supply end. The test control unit then tests the booting and shutdown process of the computer system. The test control unit receives a test result data transferred from the computer system and determines whether the booting and shutdown process is correct.

Abstract: An information handling system (IHS) employs a power fault protection circuit to protect the IHS from overvoltages which may occur on an information line from a power adapter to the IHS. The system includes a processor coupled to the protection circuit. The circuit is operative in a first mode to decouple an information line from the IHS in response to a disable command and operative in a second mode to decouple the information line from the IHS when a voltage in the information line exceeds a predetermined threshold voltage.

Abstract: A system for verifying data in a shadow memory is provided that includes a main memory, a shadow memory, a shadow memory initializer, and a shadow memory verifier. The main memory is operable to store main data persistently. The shadow memory is operable to store shadow data temporarily. The shadow data comprises a copy of the main data. The shadow memory initializer is operable to detect an initialization event and to initialize the shadow memory based on the initialization event. The shadow memory verifier is operable to detect a verification event and to verify the shadow data based on the verification event.

Abstract: An information processing apparatus carrying out hardware diagnosis processing by means of initializing processing of each part of hardware when power supply in the apparatus is started, has a power-off initializing processing part carrying out the hardware diagnosis processing when the power supply in the apparatus is cut off; and a power-off timing control part controlling timing of cutting off the power supply in the apparatus in such a manner that the power supply in the apparatus is carried out after the hardware diagnosis processing and trouble reporting processing carried out by said power-off initializing processing part are finished.

Abstract: The present invention relates to a method of providing a real time solution to an error occurred when a computer is turned on, which enables a BIOS installed in the computer to test all hardware equipment of the computer and record any detected error, and also enables the BIOS to show a solution corresponding to the error on a display connected to the computer through pressing a function key of an input device coupled to the computer while the test is finished.

Abstract: An information handling system having a plurality of blade server modules (BSMs) and power supply units (PSUs) uses a module monitor board (MMB) to monitor and control a power budget of the PSUs by each individual BSM requesting authorization from the MMB in order to power ON and boot-up. A blade management controller (BMC) may communicate with the MMB over a communications bus. However, if the firmware application controlling the BMC has been corrupted the BMC it may run in a “boot block” mode and not contain the intelligence necessary to obtain power ON authorization from the MMB. A single, existing input-output (I/O) line from the MMB to the BMC may be utilized to indicate power ON authorization for the respective BSM. The MMB and BMC may be adapted for preventing the BSM from powering ON without proper authorization from the MMB and that the BMC will always power ON the BSM when enough power is available from the PSU.

Abstract: A method, apparatus, and computer instructions for analyzing data from a crash of the data processing system. A portion of the memory in the data processing system is preserved in response to the crash of the data processing system. The data processing system is rebooted with an environment suited for analyzing trace data in the portion of the memory.

Abstract: A storage controlling apparatus controlling an access, for example, from a host to a physical device has a determining means determining whether or not a basic mode predetermined among two or more modes agrees with a mode set in a mode setting sequence run when the apparatus is reset or when data is transferred between modules, and a notifying means determining that transfer mode abnormality occurs when the determining means determines that the two modes do not agree with each other and sending an error notice. Whereby, a data transfer status in a mode differing from the basic mode can be detected as transfer mode abnormality, and the transfer mode abnormality can be solved.

Abstract: A method, computer system, and apparatus perform an expedited boot and operating system load operation from a hard drive device. Rather than waiting for storage media in a storage device to be fully operational before retrieving software modules and/or data required for initial loading of an operating system, the software modules and/or data are stored in a non-volatile memory in the storage device and are immediately available to the central processing unit. When the busy bit in a drive status register is set by the hard drive microcontroller, the BIOS code attempts to retrieve the requested data from a non-volatile memory in the hard drive, such as a non-volatile cache memory which may be configured to provide coherent data storage, even across a power loss to the hard drive.

Abstract: A method and an apparatus for controlling a digital electronic product, using a control signal transmitter and a signal receiver combined with a gate system for controlling a digital home appliance, such that a system activation/inactivation control mechanism is established. The on/off status of the gate system is remotely controlled by the control signal transmitter. In the process of switching off the gate system, a basic input/output system (BIOS) for executing switching on/off is used to detect whether the external connecting port is connected to a signal receiver. When the system is in the off status, the electric connection to the signal receiver is maintained, such that the activation control signal from the control signal transmitter can be received any time. Thereby, the signal status of the signal receiver can be changed to automatically switch on the gate system, and the control signal transmitter can thus remotely control operation of the digital home appliance.

Abstract: A method for selecting one of a plurality of BIOS images included in a computer system includes indicating a selection of a BIOS image via a bus by an embedded controller. The method also includes powering up or resetting the system. In addition, the method includes accessing the selected BIOS image for execution.

Abstract: A smart interface converter senses initial activation in a network environment, performs preselected tests, and signals to a predefined destination. The tests performed may include internal device status, bit error rates, power levels, and the like. Signaling to a predefined destination may take place automatically on completion of the tests, or may be conditioned on the receipt of a control message addressed to the smart interface converter. The signaling by the smart interface converter may trigger events such as the activation of one or more services.

Abstract: A system (100) and a method (500) for managing boot errors. When errors occur during boot, the errors may be recorded in non-volatile storage (115). The errors in the non-volatile storage (115) may be retrieved, decoded, and displayed in a form more understandable to the user. Also, tie errors may be analyzed to efficiently detect and correct the causes of the errors. In addition, the analysis may be used to prevent errors altogether.

Abstract: In accordance with one embodiment of the present invention, a method for recovering a BIOS in a computer is described, comprising: unattendingly loading a BIOS recovery code image into system ROM stored on a bootable device; and unattendingly rebooting the computer.

Abstract: The present invention provides a system and method for diagnostics execution in which diagnostics code is stored in a designated partition on a removable nonvolatile memory device, such as a compact flash or a personal computer (PC) card that is interfaced with the motherboard of a file server system. The file server system firmware is programmed in such a manner that, upon receipt of a diagnostics command, a normal boot mechanism is interrupted, and a diagnostics boot is performed. The firmware is programmed to probe the removable nonvolatile memory device, and to load the diagnostics code contained thereon into main memory and to execute the diagnostics in response to an initiation by an operator's key sequence. In accordance with a further aspect of the invention, the data produced as a result of the diagnostics test sequence is captured and stored in a maintenance log in another partition on the compact flash that has been pre-assigned for that purpose.

Abstract: After power activation, a transferer 14 detects a bootstrap program 111 having a first error check code 114 assigned thereto and being stored in a first storage device 11, subjects the bootstrap program 111 to an error detection/correction process, and transfers the bootstrap program 111 to the second storage device 12. If the transfer is properly completed, by executing the bootstrap program 111 on the second storage device 12, the CPU 10 performs an error detection/correction process for a main program 112 having a second error check code 115 assigned thereto, and transfers the main program 112 to a third storage device 13, after which the CPU's control branches out to the main program 112 on the third storage device 13. As a result, system boot can be performed without employing a NOR type flash memory.

Abstract: A method, computer program product, and a data processing system for generating a data dump in a data processing system is provided. A system boot of the data processing system is initialized. A firmware that includes fault collection logic is executed. A data dump is created in a persistent storage of the data processing system. An attempt is made to complete the system boot of the data processing system.

Abstract: In the initial setting of a memory card 1, the flash check data FD stored in a flash memory 2 is read out, this data FD is compared with the operation check data FD11 stored previously in the ROM, the write check data FD12 stored in the ROM 4a is written, if a fault is not detected, to the flash memory 2, and this data is read again and is compared with the write check data FD12 of the ROM 4a. When any fault is not detected in comparison of these data, the CPU determines that the flash memory 2 is normal. Moreover, if a fault is detected in the comparison of data, the CPU sets the reset process fault data to a register 5a to set a controller 3 to the sleep mode. When the command CMD is received during this period, data comparison is executed again.

Abstract: A method of testing a plurality of embedded memories within an integrated circuit. Each of the embedded memories include particular read and write protocols. The method includes providing a memory built in self test sequencer module and providing satellite engine module coupled to the memory built in self test sequencer module, to the plurality of embedded memories and applying read and write protocols to the plurality of embedded memories based upon the particular read and write protocols of each of the embedded memories. The satellite engine module includes an instruction buffer and a sequence generation engine.

Abstract: Audible status indications available at a local information handling system, e.g. beep codes, are used to notify a remote information handling system of the local information handling system's status. The remote information handling system then generates a visual or audible indication of the local information handling system's status.

Abstract: An information processing device and a recovery method thereof make it possible to improve strength of a system and so on against a failure, to give reliability and stability of information processing, and to easily perform restoration of a system failure and update of a system. That is, the present invention is directed to the information processing device connectable to a network including one or plural computers and the recovery method thereof, and first and second storages and a processing unit are provided. The first storage stores a first basic software, and the second storage stores a second basic software. The second basic software includes software which makes the information processing device read-in data via the network. The processing unit recognizes an operating mode by means of a boot program, and makes either the first basic software or the second basic software operate based on the recognition of the operating mode.

Abstract: Thermal subsystems of manufactured information handling systems are tested for compliance with desired parameters by running a thermal diagnostics module in firmware during one or more manufacturing activities performed on the information handling system. The thermal diagnostics module monitors and stores one or more thermal parameters detected at the information handling system, such as the maximum temperature zone detected during a manufacturing activity. The stored thermal parameter is read after the manufacturing activity and compared with an expected value to determine the status of the thermal subsystem. For instance, an information handling system maximum operating temperature is detected by firmware running on an embedded controller during imaging of a hard disk drive and fails thermal testing if the detected maximum operating temperature exceeds a predetermined value, such as a value that would not be reached if the thermal subsystem functioning properly.

Abstract: The computing machine (1) comprises a RAM (3) and a mass memory (5) in which an operating system is stored. The mass memory (5) comprises a partition (8) that is read-only accessible to the operating system, said partition (8) containing a startup function, an automatic repair function, and a function for mounting said operating system.

Abstract: An apparatus, program product and method utilize targeted boot diagnostics in connection with a boot operation to automate the handling of hardware failures detected during startup or initialization of a computer. In particular, in response to detection of a failure after initiation of and during performance of a boot operation, a targeted diagnostic operation is initiated on at least one hardware device in the computer in response to detecting the failure, such that after the targeted diagnostic operation is initiated, the boot operation may be completed.

Abstract: A method and system for displaying status indications from a communications network is provided. Alert identifiers are provided that identify a communications-network alert to be presented to a user on a display device. A set of presentation attributes desired to be displayed with the alert are provided, and a plurality of data structures from which the presentation attributes can be gathered is identified. The presentation attributes are retrieved from the plurality of data structures, and inputted into a single presentation data structure, which can be the sole object of a data query used to retrieve information to be presented in connection with the communications-network alert.

Abstract: To provide a system for transmitting the counter information based on a counter value to be updated and an offset value to be entered in accordance with a communication from a device in order to perform the setting for easily collecting the correct accumulated counted number of prints, in which the counter value is reset when setting the offset value.

Abstract: Methods and apparatus are provided for use in testing a memory (220, 230, 240) in a multiprocessor computer system (200). The multiprocessor computer system (200) has a plurality of processing nodes (210-217) coupled in an array wherein each processing node is coupled to at least one other processing node, and a memory (220, 230, 240) distributed among the plurality of processing nodes (210-217). A configuration of the array is determined. An initial configuration of the memory (220, 230, 240) is also determined. The memory (220, 230, 240) is tested over the array according to the initial configuration to identify a bad memory element. The initial configuration is modified to form a revised configuration that excludes the bad memory element.

Abstract: Methods and systems for testing devices in a scan chain are described. A first device for test and a second device for test are coupled in the scan chain. A signal selector is coupled between the first and second devices. The signal selector selects between an output signal that is output from the first device and a bypass signal that has bypassed the first device.

Abstract: Corrupted firmware in a modem is automatically replaced. Replacement firmware is stored on a host computer. An update server executing on the host responds with firmware image in response to request from modem. Any interface port may be used to receive updated firmware, including a network interface.

Abstract: The present invention includes a method, apparatus and graphical user interface (GUI) that allows a simple, precise, thorough, automatic and interactive diagnostic system for electronic devices. The present invention fully automates every test item, as a memory device including the diagnostic test items is inserted into the electronic device and is configured to automatically begin the diagnostic method. The present invention allows for interactive diagnostic analysis and a user is able to automatically repair many of the defects detected by the diagnostic method.

Abstract: An integrated circuit structure and method provides for an integrated circuit device to respond to an edge transition detection (ETD) pulse in one of two ways. First, in response to the ETD pulse, the integrated circuit device exits a test mode at least temporarily every cycle of the integrated circuit device. Second, a node of the integrated circuit device is re-initialized every cycle if it is not forced by a super voltage indicative of test mode entry. Both of these responses prevent accidental entry of the integrated circuit device into the test mode. If the integrated circuit device is supposed to be in the test mode, it stays in the test mode. If, however, the integrated circuit device is not intended to be in the test mode, the ETD pulse forces the integrated circuit device out of the test mode. Subsequent entry into the test mode of the device is permitted if conditions for entry into the test mode have otherwise been met.