Abstract: In a personal computing system function calls, formatted in 16-bit format for a 16-bit interface to the firmware, are communicated through an operating system providing a System Management Interrupt (SMI) interface to the firmware. An SMI function call in SMI format is generated and sent to an SMI Interface Wrapper module between the operating system and the firmware. The SMI function call is received over the SMI interface at the SMI Interface Wrapper. In the SMI Interface Wrapper, function data from the SMI function call is extracted to provide function call data. A 16-bit function call with the function call data is generated by the SMI Interface Wrapper and passed to the firmware.

Abstract: A system, method, and computer-usable medium for applying a destructive firmware update in a non-destructive manner. According to a preferred embodiment of the present invention, during operation of a multiprocessor data processing system, a service processor updates firmware in the multiprocessor data processing system from a first firmware setting to a second firmware setting. The service processor iteratively applies the second firmware setting to hardware within the multiprocessor data processing system by de-allocating a first hardware device when the second firmware setting includes at least one destructive operation targeted to the first hardware device, performing the destructive operation on the first hardware device, and re-allocating the first hardware device into the multiprocessor data processing system when the destructive operation is complete.

Abstract: A file switching method of a Basic Input/Output System (BIOS) file is disclosed. Upon a received read instruction, a timer for a predetermined timing is initiated, and a first data page having a requested data is read from a first BIOS file. An error correction check on the first data page is performed to check if any error in the first data page. If an error is occurred in the error correction check, repeating the step “reading the first data page”. If number of times of the repeating step exceeds a predetermined number, or if the predetermined timing is expired, a second data page having the requested data is read from a second BIOS file according to the read instruction.

Abstract: In one embodiment, a method of a kernel dumper module includes generating a dump file associated with a kernel when the kernel crashes, storing the dump file to a functional memory upon applying an overwrite protection to a core dump of the dump file, restarting the kernel through a warm reboot of the kernel such that the core dump is not erased from the functional memory, and transferring the core dump to a system file using the kernel.

Abstract: A method for recovering from software and/or hardware failures occurred in a data processing system is disclosed. A current version of boot code and an updated version of boot code are stored in a first memory region and a second memory region, respectively, of a non-volatile memory of the data processing system. The updated version of boot code is periodically replaced by a latest version of boot code downloaded from a support center. After an occurrence of a system crash, a determination is made if the system crash was caused by a known problem that can be remedied by the updated version of boot code. If so, the data processing system is rebooted using the updated version of boot code. Otherwise, data related to the system crash is collected, and the data processing system is rebooted using the current version of boot code.

Abstract: A method and system for determining an optimal order for rebooting servers in a data center. After an abnormal shutdown event in a data center, a power restoration management (PRM) server detects a restoration of power capable of being available for a rebooting of servers in the data center. A power restoration management program automatically and dynamically determines an optimal order for rebooting the servers, where the order is a result of applying policies based on weighted factors. The PRM server or a manual process reboots the servers in the determined order. The rebooting includes an enhancement of a financial position of an organizational entity associated with the data center. The enhancement of the financial position includes increasing a financial profit of the organizational entity or decreasing a financial loss of the organization entity.

Abstract: A data processing system and computer program product for analyzing data from a crash of the data processing system. A portion of the memory in the data processing system is preserved in response to the crash of the data processing system. The data processing system is rebooted with an environment suited for analyzing trace data in the portion of the memory.

Abstract: A method and apparatus for delaying the process of freeing data blocks during the processing of a non-volatile transactions log are disclosed. Accordingly, after a system failure, when a storage system is replaying transactions in a non-volatile transactions log, the storage system flushes the data generated from the transactions to disk storage without freeing and data blocks which, as a result of processing the transactions log, are no longer storing data that is part of the active file system. Consequently, the replay of the transactions log takes less time, and the storage system is brought online more quickly.

Abstract: Computing device deployment and configuration using a mass storage device is provided. A generic computing device is provided to a customer or end user. A mass storage device is used to distribute configuration information to the generic computing device. The configuration information includes customer-specified or ordered software applications or other features. The configuration information can also include updates to the computing device system software. The customer or end user couples the mass storage device to the generic computing device in order to load the configuration information into the computing device. After the configuration information is loaded, the computing device is configured for the customer's use. Further features, such as creating customized images, are also provided.

Abstract: A computer debug method includes following steps: a Power-On Self Test (POST) is started; several function tests of the POST are executed respectively, wherein at least one set of codes corresponding to each following executing function test is stored in a memory before executing each of the function tests; when the POST is interrupted, wait for a user to input a guess signal through an input device; compare the set of stored codes in the memory with the guess signal; a signal representing that the set of stored codes in the memory equals to the guess signal is output if the set of stored codes in the memory equals to the guess signal.

Abstract: A method for memory testing implemented on an embedded system, the method comprising steps of loading a booting program when the embedded system is booted; activating a RAM of the embedded system by the booting program; duplicating the booting program itself and writing the duplicated booting program into a first section of the RAM by the booting program; downloading a testing program from an on-line source and writing the downloaded testing program into a second section of the RAM by the duplicated booting program; and enabling the downloaded testing program to check a third section the rest part of the RAM excepting the first and second sections, after the downloaded testing program is executed by the duplicated booting program.

Abstract: A display apparatus comprises a pixel array, a front-end circuit, a test circuit, and an enable circuit. The test circuit tests the pixel array. The enable circuit determines whether to enable the test circuit in response to a predetermined voltage. After the pixel array is tested, the predetermined voltage is provided by the front-end circuit to disable the test circuit.

Abstract: The present invention relates to computers executing in time-share mode, under the control of their operating systems, a number of separate and independent application programs. The present invention relates in particular to the networks of onboard computer networks of IMA type executing application programs written independently of the hardware specifications of the computers and not permanently resident in the computers. The method of the present invention associates with the digital core of each computer of the network a monitoring state machine operating independently and in having the monitoring state machine monitor the correct observance by the associated computer of the time sequencing of the tasks and memory partition allocations. Furthermore, the monitoring state machines can be configured to execute monitoring service applications of time-out or watchdog type to which the application programs executed by the computers of the network can subscribe.

Abstract: To update firmware on a consumer device intelligently, two or more application images are stored as firmware on the consumer device. If the primary application image is corrupt, the back-up application image is executed on the consumer device. The back-up application image can be updated based on the primary application image. User configuration files can be preserved during the update of an application image, or they can be overwritten. This firmware updating scheme can be advantageously implemented in a personal media broadcasting system.

Abstract: A programmable processor calculates a hash value of a memory region, then monitors program operation to detect a security monitoring system initialization. The hash value is added to extend a security measurement sequence if the security monitoring system initialization clears a security state. Processors that implement similar methods, and systems using such processors, are also described and claimed.

Abstract: Embodiments of the invention provide a method and an apparatus to collect and dynamically update processor polling information. In one method embodiment, the present invention collects processor polling information at boot time to be provided to an operating system. The processor polling information describes operating conditions of an integrated processing system. The operating system is then notified that a triggering event has occurred that may potentially alter the operating conditions of the integrated processor system. Providing to the operating system updated processor polling information during runtime to reflect the operating conditions of the integrated processor system after the occurrence of the triggering event.

Abstract: A few inexpensive hardware facilities are incorporated in a tightly synchronized cross checked design. These facilities allow initialization software to quickly bring the two processors to the same state by rapid, repeated resets and execution of the initialization software. The resets are done in a way as to be transparent to the rest of the system and to the end user.

Abstract: A method for managing a system's computer resources, includes: detecting an error condition in a computer resource; labeling the computer resource as not usable based on the error condition detected; reconfiguring the remaining computer resources to compensate for the detected error condition based on a failure mode policy; and wherein the failure mode policy manages the computer resources by one of: maximizing the amount of the remaining computer resources (mode 1), and maximizing the speed of the remaining computer resources (mode 2).

Abstract: A debug card includes a controlling chipset and a VGA connector. The controlling chipset includes a data storage module, a data transforming module, and a VGA controller. The data storage module stores data received from a computer system, which represents the status of the computer system. The data transforming module transforms the data and transmits the transformed data to the VGA controller. The VGA connector interconnects the VGA controller and a VGA display to display the data.

Abstract: The present invention is directed to systems and methods for remotely booting a server computer system. A boot request is received from the server computer. An access request is transmitted to a boot management system via a secondary communication channel in response to the received boot request. An access response is received from the boot management system. The access response includes boot data from a boot image accessible via the boot management system and compatible with the server computer. In response to the received access response, the boot data is extracted from the access response and forwarded to the server computer for processing and booting. Multiple responses may be required in certain instances to accumulate the entirety of the boot image.

Abstract: A method for accessing a big structure in a 64 k operating environment is disclosed. The method includes changing the big structure into plural sub structures; arranging a big memory space by a power on self test (POST) memory manager; and allocating the sub structures to the big memory space.

Abstract: System, method and computer program product for recovering from a failure of a computing device. Start up of a first component of the device is monitored and a determination is made whether the first component has started successfully. If so, a second, higher level component of the device is started. Operational data received from the second component is monitored. If the operational data falls outside of an operational boundary, an action is performed on the second component to enable the second component to operate within a preferred operational boundary. If the first component does not start up successfully, a determination is made if start up of the first component is critical to operation of the second component. If so, a corrective action is performed relative to the first component and afterwards, an attempt is made to start up the second component.

Abstract: An information processing apparatus carrying out hardware diagnosis processing by means of initializing processing of each part of hardware when power supply in the apparatus is started, has a power-off initializing processing part carrying out the hardware diagnosis processing when the power supply in the apparatus is cut off; and a power-off timing control part controlling timing of cutting off the power supply in the apparatus in such a manner that the power supply in the apparatus is carried out after the hardware diagnosis processing and trouble reporting processing carried out by said power-off initializing processing part are finished.

Abstract: A RAID system includes a non-volatile memory storing a first program and first and second copies of a second program, and a processor executing the first program. The first program detects the first copy of the second program is failed and repairs the failed first copy in the non-volatile memory using the second copy. The failures may be detected at boot time or during normal operation of the controller. In one embodiment, the failure is detected via a CRC check. In one embodiment, the controller repairs the failed copy by copying the good copy to the location of the failed copy. In one embodiment, the system includes multiple controllers, each having its own processor and non-volatile memory and program that detects and repairs failed program copies. The programs include a loader, an application, FPGA code, CPLD code, and a program for execution by a power supply microcontroller.

Abstract: A method of testing on-line and spare memory is disclosed. Such memory may currently store in-use data at some addresses. The testing is initiated upon an occurrence of a pre-selected condition. An address range is determined that excludes at least the addresses currently storing functional data. The address range is subjected to a test pattern, and errors in the address range are reported.

Abstract: A device and method for outputting BIOS POST code, applied to a computer system. The device includes a basic input output system (BIOS), a transfer module and a video graphics array (VGA) connector. The BIOS generates a power-on self-test (POST) code using a low pin count (LPC) interface format. The transfer module receives the POST code and transfers the format of the POST code to a system management bus (SMBus) format. The VGA connector receives and outputs the POST code transmitted from the transfer module.

Abstract: A power on self test (POST) device and a computer system applying the same are disclosed, wherein the POST device comprises a micro controller and a displaying unit. The micro controller is embedded on a motherboard of the computer system for receiving a plurality of POST codes generated by the computer system during a booting procedure and transforming the POST codes into a displaying signal. The displaying unit which is capable for receiving and showing the displaying signal is connected to the micro controller through a flexible line.

Abstract: Firmware is interactively recoverable prior to loading an operating system on a computer. Rather than proceeding through a recovery without user input, user input about a recovery is solicited after determining that an update is needed. Prior to recovering the firmware, users may be able to, for example, specify configuration options about the recovery, cancel the update altogether, and specify a firmware image location. Once input is received, the firmware recovery proceeds.

Abstract: To update firmware on a consumer device intelligently, two or more application images are stored as firmware on the consumer device. If the primary application image is corrupt, the back-up application image is executed on the consumer device. The back-up application image can be updated based on the primary application image. User configuration files can be preserved during the update of an application image, or they can be overwritten. This firmware updating scheme can be advantageously implemented in a personal media broadcasting system.

Abstract: An exemplary computer motherboard of a computer includes a basic input output system (BIOS) chip having a detecting module, a plurality of function elements, and a control chip connected to the BIOS chip. The control chip includes a plurality of detecting pins each corresponding to a corresponding one of the plurality of function elements. Each of the plurality of detecting pins is grounded via a switch. Each of the plurality of detecting pins is connected to a power source via a resistor. The detecting module of the BIOS chip is configured for detecting voltage levels of the plurality of detecting pins of the control chip, and controlling power states of the plurality of function elements according to the voltage levels of the plurality of detecting pins of the control chip.

Abstract: A computer system comprising a processor, a first storage coupled to the processor and comprising an operating system, and a second storage coupled to the processor. The processor is adapted to store a group of files pertaining to the operating system on the second storage prior to launching the operating system. The processor is capable of using the group of files to restore the operating system.

Abstract: A method of configuring a computer with an expansion card to process a basic input output system (BIOS) program thereof, includes performing an expansion card detecting program to detect and identify the expansion card by reading signals from an identifying finger of the expansion card, and loading a configuration program associated with the detected expansion card of the BIOS program.

Abstract: A test device is provided for testing stability of a computer when the computer is started up or shut down. The test device includes a monolithic chip and a switch module. The monolithic chip includes an input port and an output port. The input port receives a high level or a low level signal from the computer. A test control module is disposed in the monolithic chip. The switch module includes an input pin coupled to the output port of the monolithic chip and a pair of output pins corresponding to the input pin. The pair of output pins is connected to the computer, for controlling the computer to be started up or shut down. The input port of the monolithic chip is connected to the computer for detecting a state of the computer.

Abstract: Methods and apparatus to facilitate fast restarts in processor systems are disclosed. An example processor restart method disclosed herein includes recording a log of pre-boot initialization actions, and replaying a portion of the log during subsequent processor restarts to shorten pre-boot initialization time. The example processor restart method disclosed herein may further include creating a log index table for easier referral to portions of the log, storing the log and the log index table in non-volatile memory, using the log index table to reorder the replaying of the log, and reordering the replay of the log to initialize the video graphics adapter earlier in a processor restart sequence.

Abstract: An information processing device and associated methodology are provided for inspecting a program fault. A first memory stores a boot program executed when the information processing device is initiated for operation. A second memory device is provided for storing an application program. A control device executes a fault inspection program to inspect whether or not a fault has occurred in the second memory device. The fault inspection program is stored in the first memory device and is initiated upon initialization of the information processing device.

Abstract: A circuit includes a circuit identification storage module and a control module. The circuit identification storage module stores circuit identification information. The control module receives the circuit identification information and in response thereto selectively performs a secure boot procedure or a test boot procedure. The control circuit performs the secure boot procedure when the circuit identification information indicates that the circuit is a production circuit. The control circuit performs the test boot procedure when the circuit identification information indicates that the circuit is a test circuit. A related method is also disclosed.

Abstract: EEH methods are used during the boot process to actively disable a defective PCI adapter, thereby allowing the system boot to continue without disruption. This allows faulty adapters to be present in the machine without interrupting the boot process. The slots appear to be empty and the devices/adapters residing therein can be actively “hot swapped” out without altering the rest of the machine state.

Abstract: A PLD is interposed on the communication route between a microprocessor (hereinbelow called MP) and boot memories. The boot memories store MP start-up data needed to start up the MP and start-up protection code constituting protection code for the MP start-up data. The PLD reads the MP start-up data and the start-up protection code thereof from the boot memories, performs, in hardware fashion, a check of the validity of the MP start-up data using this start-up protection code and, if a negative check result is obtained, resets the MP and if a positive check result is obtained, inputs the start-up data that is thus read to the MP.

Abstract: A method of automatic recovery from a boot device failure and an initial program load (IPL) failure of an operating system (OS) comprises: receiving and complying with a user selected option of an action upon an event of a boot device failure and an IPL failure. The user selected option may consist of taking the action of attempting an auto reboot of the server with the selected boot device and continuing the reboot attempts using the reduced priority boot devices from the bootlist until detection of a boot success, or taking no action allowing for manual user intervention.

Abstract: A disk apparatus has a memory storing boot-information; and a stop section which reads, upon receipt of a stop event, the boot-information from a disk and checks the read information against the boot-information in the memory. This section updates contents of the memory to store therein the same boot-information as that in the disk and writes flag-information indicating that the same boot-information is stored in the memory when a difference is found by the checking. The apparatus also has a start section which judges, upon receipt of a start event, whether or not the flag-information is stored in the memory, reads the boot-information from the memory and activates a device used with the apparatus while deleting the flag-information when the flag-information is stored. This section reads the boot-information from the disk to activate the device and writes the read boot-information in the memory when the flag-information is not stored.

Abstract: A basic input output system (BIOS) test system includes a protocol conversion module and a computer. The protocol conversion module is connected to a tested device. The computer is connected to the protocol conversion module. The computer controls the protocol conversion module to simulate a keyboard to send keyboard commands to the device. The computer storing correct setting lists and comments of the setting lists of the BIOS. The tested device selects setting lists and comments thereof according to the keyboard selection commands sent by the protocol conversion module. The tested device is connected to the computer to deliver selected setting lists and comments thereof to the computer. The computer compares the selected setting lists and comments thereof with the correct setting lists.

Abstract: In a personal Internet communication device, an optimized operating system image (NK.bin) is constructed from the operating system component files required to provide a minimum threshold of operating system functionality. By reducing the size of the operating system image, the time required to load the operating system is reduced.

Abstract: Various techniques are disclosed herein to provide an improved approach to the loading of configuration data into configuration memory of programmable logic devices. For example, in accordance with one embodiment of the present invention a method of configuring a programmable logic device includes reading a first bitstream from a first memory block of an external memory device. The first bitstream is checked for errors and a second bitstream is read from a second memory block of the external memory device if an error is detected. Configuration memory of the programmable logic device is programmed with configuration data provided in one of the first bitstream and the second bitstream.

Abstract: A system for booting a computing device with a windowing operating system obtained from an external memory media via an external interface includes an initialization module stored in a read-only memory in the computing device, the module being executed in a processor in the computing device and establishing a data connection to the external memory media through the external interface, and an external device in which the external memory media is disposed, the media storing a windowing operating system image at an external location, and sending the image from the media to the computing device via the external interface in response to a request from the computing device based on memory geometry information of the media, the image being received by the computing device, loaded into a runtime memory in the computing device and then executed by the processor to boot the windowing operating system in the computing device.

Abstract: An apparatus for changing BIOS parameters via an exchange file, including a control unit, a microprocessor, a first memory, a second memory, a third memory and a keyboard. The method includes the steps of saving N parameter banks of BIOS in the third memory, forming the exchange file and performing a operation process via parameter banks, which including the steps of forming, writing, reading, revising and opening the exchange file, selecting one of parameter banks and performing corresponding operations according to the selected parameter bank.

Abstract: A system and method of a basic input output system (BIOS) test system are disclosed. According to an aspect, a basic input output system (BIOS) test system can include a BIOS test manager configured to enable BIOS testing of multiple information handling systems within a test environment. The BIOS test system can also include a local test harness driver operable to be coupled to the remote BIOS test manager to receive test routines, and a test buffer configured to receive a test routine from the BIOS test manager. The test routine can further be executed using a test engine integrated as a part of a BIOS of a particular information handling system.

Abstract: A method for making a test fixture includes the following steps. A Linux operating system is installed to a computer storage device and a test program is installed to the storage device. Which kernels have been installed in the Linux operating system is checked to obtain a check result. A part of or entire content of the storage device is copied to a system image file except a boot file. A boot file directory structure is made in the system image file. The boot file in the storage device is customized to make a disc boot file in the boot file directory structure. The check result is recorded in the disc boot file. An initrd file corresponding to the check result is created in the boot file directory structure according to the boot file in the storage device. A bootable test disc is made using the system image file.

Abstract: A processing system is set forth that includes a processor, read only memory storing an operating system image file accessible by the processor, and random access memory that is also accessible by the processor. The processing system also includes a boot program that is executable by the processor to initialize the processing system in response, for example, to a power-on event, reset event, or a wake-up event. A power-on event occurs when power is initially provided to the processing system while a wake-up event occurs when the processing system is to exit a low-power mode of operation. A reset event occurs when, for example, a fault is detected that causes the system to restart. The boot program selectively performs a full boot copy of the operating system image file from the read only memory to the random access memory or a fast boot copy of only predetermined portions of the operating system image file from the read only memory to the random access memory.

Abstract: A computer implemented method, a data processing system, and a computer usable program code for automatically identifying multiple combinations of operational and non-operational components with a single part number. A non-volatile storage is provided on a part, wherein the part includes a plurality of sub-components. Unavailable sub-components in the plurality of sub-components are identified based on a series of testing to form identified unavailable sub-components. Information of the identified unavailable sub-components is stored into the non-volatile storage.

Abstract: A method for burning a BIOS chip (108) and a network card chip (107) that are attached on a motherboard (106), includes the steps of: storing a plurality of MAC addresses in a burning device (102); loading a BIOS file and a network card file into the burning device; sending the BIOS file from the burning device to a burning card (104), and burning the BIOS file into the BIOS chip via the burning card; the burning device sending the network card file which includes a MAC address from the burning device to the burning card, and burning the network card file into the network card chip via the burning card; and verifying whether the BIOS chip and the network card chip have been burned correctly.