Abstract: A microcontroller device comprising a receiver component configured to receive a one or more reset signals for the microcontroller device; an identification component configured to identify a source of the or each reset signals received by the receiver component; a time interval determining component configured to determine a length of a time interval in accordance with the identified source of the or each reset signals received by the receiver component; a voltage setting component configured to set a voltage of an output of the microcontroller device to a first value on receipt of a reset signal by the receiver component; and a control component configured to maintain the voltage of the output at the first value for the duration of the determined length of the time interval; and set the voltage of the output to a second value on substantial completion of the determined length of the time interval.

Abstract: The snapshot capability moving into the SAN fabric and being provided as a snapshot service. A well-known address is utilized to receive snapshot commands. Each switch in the fabric connected to a host contains a front end or service interface to receive the snapshot command. Each switch of the fabric connected to a storage device used in the snapshot process contains a write interceptor module which cooperates with hardware in the switch to capture any write operations which would occur to the snapshot data area. The write interceptor then holds these particular write operations until the original blocks are transferred to a snapshot or separate area so that the original read data is maintained. Should a read operation occur to the snapshot device and the original data from requested location has been relocated, a snapshot server captures these commands and redirects the read operation to occur from the snapshot area.

Abstract: An electronic circuit includes a first processor (100) operable to perform processing operations, a first trace buffer (230) coupled to the first processor (100), a first triggering circuit (210) coupled to the first processor (100), the first triggering circuit (210) operable to detect a specified sequence of particular processing operations in the first processor (100); a second processor (101), a second trace buffer (231) coupled to the second processor (101), a second triggering circuit (211) coupled to the second processor (101), the second triggering circuit (211) operable to detect at least one other processing operation in the second processor (101); and a cross trace circuit (330) having a trace output and having inputs coupled to the first triggering circuit (210) and to the second triggering circuit (211), the cross trace circuit (330) configurably operable to respond to a sequence including both a detection of the sequence of particular processing operations of the first processor (100) by the fir

Abstract: Power-backup capabilities are provided by implementing a variety of different methods, systems and devices. According to one such implementation, a memory device stores data in response to data accesses under the control of a memory control circuit. A solid-state memory circuit and a volatile caching memory circuit provide the memory control circuit with access to a set of common data. A circuit carries primary operating power to the memory device. A backup power circuit has a power module having and securing a power-reservoir circuit. A capacitor holds a charge to provide operating power to the memory circuits to permit transfer of the data from the volatile memory circuit to the solid-state memory circuit. A notification circuit provides an external user indication of the power-reservoir circuit integrity. A circuit-based structure secures the power-reservoir circuit for operation as part of the memory device and facilitates replacement of the power-reservoir circuit.

Abstract: A network device, such as a router or switch, has a CPU and a memory operable to receive, store and output computer code. The code includes device configuration files, traffic pattern files, and standard-behavior-output template files adapted for detecting network device functional defects and bottlenecks. The device is operable in a testing mode to act as either a Device Testing Doctor (DTD) or a Device Under Test (DUT), in which it loads into or accepts from a related, interconnected and similarly configured and operable network device selected ones of the device configurations, transmits to or receives from the other device selected ones of the input traffic patterns, compares its own output or that of the other device in response to the input traffic pattern with selected ones of the standard-behavior-output templates, and detects a network device defect or bottleneck in itself or in the other device based on the comparison.

Abstract: The present invention is a system and method for supporting an alternative peer-to-peer communication over a network in a SAS cluster when a node cannot communicate with another node through a normal I/O bus (Serial SCSI bus). At startup, driver may establish the alternative path for communication but may not use it as long as there is an I/O Path available. In the present invention, two types of P2P calls, such as event notification calls and cluster operation calls may be supported.

Abstract: Systems and methods are provided for identifying a relationship between multiple interrelated applications running in a mainframe environment. A repository is created to store information describing the multiple interrelated applications from the mainframe environment. A target application among the multiple interrelated applications is identified, and a frequency and a dependency relationship between the application and the multiple interrelated applications is determined. The relationship is displayed via a user interface. The relationship may be used to identify a cause of a failure in a mainframe environment.

Abstract: Fault injection in dynamic random access memory (‘DRAM’) modules for performing built-in self-tests (‘BISTs’) including establishing, in the mode registers of the DRAM modules by the memory controller through the shared address bus, an injection of a fault into one or more signal lines of a DRAM module, the fault characterized by a fault type; writing data by the memory controller through a data bus to the DRAM modules, the data identifying a particular DRAM module; and responsive to receiving the data, injecting, by the particular DRAM module, the fault characterized by the fault type into the one or more signal lines of the particular DRAM module.

Abstract: In one embodiment, the present invention includes a method for performing dynamic testing of a many-core processor including a plurality of cores, manipulating data obtained from the dynamic testing into profile information of the many-core processor, and storing the profile information in a non-volatile memory. The non-volatile memory may be within the many-core processor, in some embodiments. Other embodiments are described and claimed.

Abstract: Techniques are provided for performing memory diagnostics. A portion of physical memory is locked using functionality included in an operating system. At least one memory diagnostic test is executed on the portion producing a result. It is determined, in accordance with the result, whether a memory problem exists for the portion of physical memory.

Abstract: A method of assisting failure mode and effects analysis of a system having a plurality of components includes obtaining data associated with a component, or a group of components, of the system. The component or the group is associated with component type data or group type data, respectively, that includes data relating to at least one failure feature common to all components or groups, respectively, of that type. The component/group data and the component/group type data can then be stored and/or transferred for use in a failure mode and effects analysis of the system.

Abstract: A method, apparatus and computer program product are provided for implementing self-optimizing initial program load (IPL) diagnostics. A control flag is set to identify a self-optimizing IPL diagnostics mode. The self-optimizing IPL diagnostics mode includes collecting a list of new parts and collecting a list of identified failed parts. Hardware is identified and initialized for running diagnostics on the collected list of flagged parts. Diagnostics are run only on the initialized flagged hardware.

Abstract: A test system for testing a communication system having a plurality of communication links is disclosed. The test system has a single tester for performing various measurement and diagnostic tasks on a single link. The test system also has a switching system for independently testing any link by coupling the tester into any one link. The tester is coupled into the link by coupling the tester input to the link's transmitter and the tester output to the link's receiver. The switching system couples the tester such that all remaining links of the communication system have a unique one of the plurality of transmitters coupled to a unique one of the plurality of receivers, whereby the operation of the communication system can be maintained while testing individual links.

Abstract: The present invention provides a control method for an information processing system, which includes a plurality of processing apparatuses performing a mutually equivalent operation, comprising the step of isolating the processing apparatus for which a fluctuation of power source voltage is relatively large, from the information processing system, if an error is not detected in each of the processing apparatuses and respective items of output information from the plurality of processing apparatuses raise a nonidentity.

Abstract: Provided are a method and system for loading test data into execution units in a graphics card to test the execution units. Test instructions are loaded into a cache in a graphics module comprising multiple execution units coupled to the cache on a bus during a design test mode. The cache instructions are concurrently transferred to an instruction queue of each execution unit to concurrently load the cache instructions into the instruction queues of the execution units. The execution units concurrently execute the cache instructions to fetch test instructions from the cache to load into memories of the execution units and execute during the design test mode.

Abstract: Remotely administering a server, the server including non-volatile memory upon which is disposed one or more digital images representing the server, the server also including one or more components each of which includes non-volatile memory in which is disposed one or more digital images representing the component, where the server is connected for data communications to a management module, and remotely administering the server includes: retrieving, by the management module from the server, the digital images representing the server and the digital images representing the installed components; generating, by the management module with the digital images representing the server and the digital images representing the installed components, a graphical representation of the server with the installed components; and presenting, by the management module to a user through a GUI, the graphical representation of the server with the installed components.

Abstract: A testing device for testing a motherboard is provided to include a server, a client terminal computer, a debug card and a receiving device. The server is connected to the client terminal computer, for inquiring test results. The debug card is attached to the motherboard, for getting test data. The receiving device connecting with the debug card transmits the test data to the server via a network. A testing method for testing a motherboard is provided to include the following steps: a debug card getting the test data from the motherboard; sending the test data to a receiving device, the receiving device transmitting the test data to a server, the server collating and analyzing the test data; and a client terminal computer inquiring test results via the server.

Abstract: A method and system for supporting recovery of a computing device includes determining and storing a sub-set of firmware instructions used to establish a pre-boot environment and executing the sub-set of firmware instructions in response to an error.

Abstract: A fault zone definition mechanism groups components of an interconnect environment having a common point of dependence into a logical group defining a fault zone for the interconnect environment. The fault zone definition mechanism may be implemented in software, firmware or hardware, or a combination of two or more of software, firmware and hardware. A method for defining a fault zone is also disclosed.

Abstract: The present invention relates to a method for disconnecting a transceiver from a bus in multipoint/multidrop architecture. A central processing unit (CPU) and a universal asynchronous receiver transmitter (UART) in a system are connected to a controller used for storing and transmitting data, and the controller is further connected with a bus through a transceiver that monitors/records data and a relay that connects or disconnects the transceiver from the bus. The controller comprises a signal comparator used to compare similarities and differences of data and a failure detection controller used to achieve connection or disconnection of the bus with the transceiver. In case of the transceiver's failure, the controller disconnects the transceiver from the bus to ensure that the bus does not fail to work due to breakdown of the transceiver.

Abstract: An arithmetic device simultaneously processes a plurality of threads and may continue the process by minimizing the degradation of the entire performance although a hardware error occurs. An arithmetic device 100 includes: an instruction execution circuit 101 capable of selectively executing a mode in which the instruction sequences of a plurality of threads are executed and a mode in which the instruction sequence of a single thread is executed; and a switch indication circuit 102 instructing the instruction execution circuit 101 to switch a thread mode.

Abstract: A statistically added point calculation unit of the present invention statistically adds a point to a part related to a content of an anomaly in error information received by an error information receiving unit, and sets the added point in an added point table. A suspected place identifying unit refers to the added point table, and if the statistically added point of a target of determination has exceeded a threshold, the suspected place identifying unit identifies the target of the determination as a suspected place. If the configuration information table is referred to and a target of this process is a maintenance part at the suspected place, the suspected place identifying unit compares an initial value, for example, by means of the threshold which has been doubled. Furthermore, the suspected place identifying unit identifies a part having the statistically added point which is the next highest, as a second suspected place. A part isolation processing unit isolates the part at the suspected place.

Abstract: A computer running a host operating system in a host virtual machine includes a support operating system running in a support virtual machine. A support module running in the support operating system identifies and remediates defects associated with the host operating system. A monitoring module running in the support operating system identifies a defect associated with the host operating system and notifies the support module responsive to identification of the defect. A user interface is provided for the support module. The user interface can be through a web server or a support button associated with an input device of the computer. The user interface can be supported through input/output virtualization hardware of the computer. A host agent module executing in the host operating system can interact with the support module to remediate a defect associated with the host operating system.

Abstract: The innovation relates to a system and/or methodology for the configuration and creation of industrial automation designs. The system providing for the generation of functional specifications, software and hardware designs, as well as testing and testing schemas. Additionally, the innovation provides a user interface for modification of the designs and specifications.

Abstract: Disclosed are a method, system and computer program product for determining hardware diagnostics during initial program loading (IPL). A space is allocated for a diagnostics hardware table storing hardware identifications corresponding to hardware to be tested. A hardware monitor function detects new and/or defective hardware. Hardware can be manually selected. A runtime diagnostics detects defective hardware. The hardware identifications corresponding to the new, failing, and/or selected hardware are added to the diagnostics hardware table. The hardware identification to be tested is acquired during the building of a system Hardware Objects Model (HOM). A diagnostics flag is set within HOM according to the diagnostics hardware table. Diagnostics are performed per HOM diagnostics flag indication. The diagnostics table is cleared, and the operating system is run. At system runtime, diagnostics code monitors for runtime error.

Abstract: A DGP, upon detecting the occurrence of a fault in an IOP that controls a CH, causes another IOP that can control the CH to control the CH and reports to an EPU the occurrence of the fault in the CH and the recovery from the fault. The DGP stores information in a CH configuration table indicating that the other IOP is controlling the CH. Upon receiving the reports of the occurrence of the fault in the CH and the recovery, the EPU refers to the CH configuration table, verifies that the other IOP is controlling the CH, and provides data transfer instructions to the other IOP.

Abstract: Systems and methods to modify a set of connection records are described. A determination is made that an application failed to access a first database via a connection record, where the connection record includes data to access the first database. A determination is made that a second database is accessible, where the second database is a failover database to the first database. A set of connection records associated with the first database is modified to enable access to the second database.

Abstract: The snapshot capability moving into the SAN fabric and being provided as a snapshot service. A well-known address is utilized to receive snapshot commands. Each switch in the fabric connected to a host contains a front end or service interface to receive the snapshot command. Each switch of the fabric connected to a storage device used in the snapshot process contains a write interceptor module which cooperates with hardware in the switch to capture any write operations which would occur to the snapshot data area. The write interceptor then holds these particular write operations until the original blocks are transferred to a snapshot or separate area so that the original read data is maintained. Should a read operation occur to the snapshot device and the original data from requested location has been relocated, a snapshot server captures these commands and redirects the read operation to occur from the snapshot area.

Abstract: A mechanism for isolating failures in a digital system is provided. In one embodiment, a fault table is defined for each unit in the system. Related faults are ordered within the table to reflect the time-order in which the faults would be activated during operation of the associated unit. When multiple related faults are reported for a given unit in the system, the fault that is first located when a linear search of the corresponding fault table is conducted is considered the source of the failure within the unit. If faults are reported for multiple units, the source of the failure for the system is identified using at least one of primary and second priority values assigned to the faults, timestamps obtained when the faults are reported, and an order in which the faults are logged.

Abstract: A method for identifying names of uninformative functions in call-stack traces is described. The method comprises the steps of obtaining a set of call-stacks and information indicative of which call-stack traces in the set match a particular call-stack trace; for each matching call-stack trace pair, incrementing a false negative counter for each function name above a first matching function name in a respective call-stack trace pair; for each non-matching call-stack trace pair, incrementing a false positive counter for each function name above a first non-matching function name in a respective call-stack pair; incrementing a frequency counter for each function name appearing in each of the call-stack traces; calculating an aggregate value for each of the function names as a function of respective ones of the false positive counter, the false negative counter and the frequency counter; and identifying uninformative ones of the function names based on the respective aggregate values.

Abstract: Disclosed is a SATA device having self-testing function with an OOB-signaling operation and a method of testing the same. The SATA device includes target and test-signaling controllers that sequentially generate and transceive control signals for the OOB-signaling operation. The SATA device also includes a test flow controller regulating the flow of the OOB-signaling control signals, and an analogue signal processor generating and transceiving analogue signals in correspondence with the OOB-signaling control signals. The analogue signals transmitted from the analogue signal processor return to the input terminal through a feedback loop.

Abstract: The snapshot capability moving into the SAN fabric and being provided as a snapshot service. A well-known address is utilized to receive snapshot commands. Each switch in the fabric connected to a host contains a front end or service interface to receive the snapshot command. Each switch of the fabric connected to a storage device used in the snapshot process contains a write interceptor module which cooperates with hardware in the switch to capture any write operations which would occur to the snapshot data area. The write interceptor then holds these particular write operations until the original blocks are transferred to a snapshot or separate area so that the original read data is maintained. Should a read operation occur to the snapshot device and the original data from requested location has been relocated, a snapshot server captures these commands and redirects the read operation to occur from the snapshot area.

Abstract: Network performability characteristics with improved accuracy are derived by taking into account, in the various analyzed network failure states, attributes of elements at the logical level other than just the capacities of edges, as well as by taking into account one or more “abstract components,” such as scheduled maintenance, and by using multiple traffic matrices.

Abstract: In a method for responding to errors that occur during operation of a medical system, having a number of computer workstations connected via a network, upon failure of a system component that is necessary for proper operation of a system program, while the system program is running on one of workstations, a display is presented at the workstation that indicates at the workstation which portions of the system program can still be used, and which portions of the system program can no longer be used due to malfunctioning of the component. Via the network, an automatic notification is transmitted to a workstation associated with a person who is responsible for correcting the malfunctioning component.

Abstract: An electronic controlling device and method is disclosed. One embodiment provides at least one module performing specific functions within one of a plurality of module modes on reception of a corresponding module mode request. A system control unit is provided to operate the at least module in one of a plurality of module modes by distributing a corresponding system mode request. The at least one module is adapted to translate the distributed system mode request to a module mode request which is configurable.

Abstract: A method, a computer program product and a system for reconfiguring functional capabilities in a data processing system with dormant resources. Dormant resources of a data processing system are used to replace (360) the functional characteristics of a broken hardware unit in order to compensate the lost resources. If sufficient dormant resources are available to replace the functional capabilities of the broken hardware unit, the data processing system can be used without any degradation of its capabilities. Otherwise the degradation is reduced. The functional part of the broken hardware unit is fenced (340) from the system, but its configuration data is read (350) from its non-functional part. The enablement definition data contained in the configuration data is then analysed for missing resources. Available dormant resources are then enabled until all the lost resources are replaced or no more dormant resources are available for the replacement.

Abstract: A method of detecting a malfunction in a hardware module is shown. The hardware module comprises a functional hardware adapted to provide a defined function and a diagnosis component. The diagnosis component includes a logic and a status register. The logic has access to the functional hardware and a value of the at least one status register is readable by a software external to the hardware module. The method comprises at the logic receiving a check status command from an external software, checking the status of the functional hardware, and updating a value of the at least one status register depending on a result of the status check.

Abstract: The snapshot capability moving into the SAN fabric and being provided as a snapshot service. A well-known address is utilized to receive snapshot commands. Each switch in the fabric connected to a host contains a front end or service interface to receive the snapshot command. Each switch of the fabric connected to a storage device used in the snapshot process contains a write interceptor module which cooperates with hardware in the switch to capture any write operations which would occur to the snapshot data area. The write interceptor then holds these particular write operations until the original blocks are transferred to a snapshot or separate area so that the original read data is maintained. Should a read operation occur to the snapshot device and the original data from requested location has been relocated, a snapshot server captures these commands and redirects the read operation to occur from the snapshot area.

Abstract: An image management system includes a first storage device configured to store a list of image identifiers indexed by one or more image property descriptors, wherein each of the image identifiers corresponds to a digital image, an index processor in communication with the first storage device, configured to write the image identifiers and the associated image property descriptors for each image identifier in the image index storage, and a search processor in communication with the first storage device, configured to receive a specified image property descriptor and to identify one or more image identifiers that match the specified image property descriptor.

Abstract: A system and method for aborting web services automatically. An application program container has a first web service application program embedded, intercepts a message that is transmitted and received between a second web service program located externally and the first web service application program, identifies the kind of an operation requested by the second web service application program, and keeps information required for compensation. A protocol manager generates and manages a first sub-transaction object by a request of the second web service application program. A local compensator compensates the first sub-transaction if a global transaction coordinator sends a command to compensate a second sub-transaction already committed. A protocol service unit transmits and receives messages for managing the first sub-transaction. A registration service unit registers the generated first sub-transaction with the global transaction coordinator.

Abstract: A system for testing a processor. The system includes a gold processor and a test access port (TAP). A processor that is a device under test (DUT) is coupled to both the gold processor and the TAP. In the first mode, the TAP provides test signals to both the gold processor and the DUT while they operate in synchronous functional lockstep. In the second mode, the TAP provides signals to the gold processor. In the third mode, the TAP provides test signals to the DUT. A host computer coupled to the interface control unit executes a software application to cause the TAP to drive test signals and to access test output data from the gold processor and the DUT. Test output data accessed from the gold processor may be compared to that accessed from the DUT to determine any differences. The comparison data generated may then be used for further analysis.

Abstract: A system for testing a processor. The system includes a gold processor and a test access port (TAP). A processor that is a under test (DUT) is coupled to both the gold processor and the TAP. Test signals are simultaneously provided to both the gold processor and the DUT such that the gold processor and the DUT operate in synchronous functional lockstep. The TAP may also input test signals into the gold processor and DUT simultaneously and access data from each of these processors through separate test data out (TDO) connections. Test output data accessed from the gold processor may be compared to test output data accessed from the DUT to determine if any differences are present. The comparison data generated may then be used for analysis purposes.

Abstract: A method for surveilling a telecommunications network link includes disposing a link demarcation device (LDD) at a point on a network link, the LLD dividing the network link into a first network link section and a second network link section, the LDD being configured to perform self-monitoring and monitoring of the first a network link sections, operating the LDD to transmit one of a plurality of unique fault-indicating signals based upon a specific detected fault-indicating condition, wherein each of the unique fault-indicating signals corresponds to a detected fault-indicating condition, detecting the unique fault-indicating signal with a link delimiting device (LLD) communicatively coupled to the LDD by one of the first and second network link sections, and unambiguously identifying the unique fault-indicating signal with the LLD, wherein the unique fault-indicating signals are selected to be readily distinguishable by an existing detection and alarming capability of the LLD.

Abstract: A serial advanced technology attachment (SATA) device is provided. The SATA device includes a digital block and an analog black. The digital block is configured to generate and output an out-of-band (OOB) control signal. The analog block is configured to receive the OOB control signal, which has been output from the digital block, to receive the OOB control signal again after outputting it, and then output the OOB control signal to the digital block.

Abstract: A method and system receives test requirements and test settings in order to design a test. An identifier is assigned to the test that was designed and the test is stored in a database using the identifier to identify the test. In addition, the test is printed on at least one sheet or form and a wireless read/write device is programmed with the identifier assigned to the test. The wireless read/write device is attached to the sheet on which the test was printed. Thus, the sheet and the wireless read/write device can be provided to a test operator to allow the test operator to wirelessly read the identifier from the wireless read/write device. Then, the test operator can access the test from the database based on the identifier read from the wireless read/write device. The test instructions (comprising the test requirements and test settings) are provided from the database to the operator to perform the test and potentially produce a physical test output.

Abstract: A system and a method are provided for specifying arbitrary nodes and identifying a section between them on a system diagram of a distribution system. It comprises a system diagram information management portion for managing information on each of nodes and spans constituting the system diagram and ID information given to each of the nodes, an input portion for receiving an input specifying the nodes, a search portion for creating a search condition using the ID information based on the node specification and searching the span between the specified nodes so as to identify the section constituted by the searched span, and an output portion for display-outputting the system diagram visually indicating the section identified by the search portion.

Abstract: One embodiment of the present invention provides a system that facilitates debugging an integrated circuit without probing signal lines within the integrated circuit. During operation the system updates a performance counter within the integrated circuit based on the occurrence of one or more performance events. Note that some integrated circuits already include a performance counter which is used to measure the performance of the integrated circuit. Next, the system triggers a debugging operation based on the content of the performance counter, thereby facilitating debugging of the integrated circuit without probing signal lines within the integrated circuit. By using the performance counter to trigger the debugging operation in addition to measuring performance, the present invention can substantially reduce the amount of additional circuitry required to facilitate debugging of the integrated circuit.

Abstract: A system, method, and product are disclosed for testing multiple threads simultaneously. The threads share a real memory space. A first portion of the real memory space is designated as exclusive memory such that the first portion appears to be reserved for use by only one of the threads. The threads are simultaneously executed. The threads access the first portion during execution. Apparent exclusive use of the first portion of the real memory space is permitted by a first one of the threads. Simultaneously with permitting apparent exclusive use of the first portion by the first one of the threads, apparent exclusive use of the first portion of the real memory space is also permitted by a second one of the threads. The threads simultaneously appear to have exclusive use of the first portion and may simultaneously access the first portion.

Abstract: A process for a prognosis of faults in electronic circuits identifies parameters of a circuit under test. An upper and a lower limit is determined for one or more components of the circuit under test. A population of faulty and non-faulty circuits are generated for the circuit under test, and feature vectors are generated for each faulty and non-faulty circuit. The feature vectors are stored in a fault dictionary, and a feature vector for an implementation of the circuit under test in a field operation is generated. The feature vector for the implementation of the circuit under test in the field operation is compared to the feature vectors in the fault dictionary.

Abstract: Described are methods, apparatus and computer programs for determining run-time dependencies between logical components of a data processing environment. Components of the data processing environment are monitored by monitoring agents accessing run-time activity data via APIs of the managed system. A dependency generator identifies correlations between the run-time activity of the monitored components. For synchronous monitored systems, the dependency generator calculates an activity period for monitored components and determines which component's activity periods contain the activity periods of other components. Containment is used as an indicator of a likely dependency relationship, and a weighting is computed for each dependency relationship based on the consistency of containment.