Bus, I/o Channel, Or Network Path Component Fault Patents (Class 714/43)
  • Patent number: 9465684
    Abstract: A method is used in managing logs of storage systems. Log data is collected in response to receiving a request to diagnose a problem. The log data is stored on a central system. Data analysis techniques are performed automatically on the log data. A result of performing the data analysis techniques is evaluated for diagnosing the problem.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: October 11, 2016
    Assignee: EMC Corporation
    Inventors: Stephen Carter, Gearoid T. Griffin, Killian MacSweeney
  • Patent number: 9454418
    Abstract: A method for testing processors includes generating, from a set of input bits, a first set of machine data bits in a first processor and a second set of machine data bits in a second processor dissimilar to the first processor, and comparing the first and second sets of machine data bits to output a first comparison result. The method also includes generating, from a third set of machine data bits, a first and second sets of machine result bits, and comparing the first and second sets of machine result bits to output a second comparison result. The method further includes generating, from a fourth set of machine data bits, a first and second sets of output bits, and comparing the first and second sets of output bits to output a third comparison result. The method also includes determining whether the first and second processors operate substantially similar to each other based on at least one of the first, second, and third comparison results.
    Type: Grant
    Filed: August 21, 2014
    Date of Patent: September 27, 2016
    Assignee: ROCKWELL COLLINS, INC.
    Inventors: Mark A. Kovalan, Mark Clifford Singer
  • Patent number: 9436562
    Abstract: An apparatus relating generally to an error detection system is disclosed. The apparatus includes a first data bus and a second data bus. A first circuit is coupled for communication via the first data bus. A plurality of storage elements are coupled to the first data bus and the second data bus. A second circuit is coupled for communication via the second data bus. The error detection system is coupled to the first data bus and the second data bus. The error detection system is coupled to compare first data on the first data bus with corresponding second data on the second data bus. The error detection system is configured to generate an error signal responsive to mismatch between the first data and the second data.
    Type: Grant
    Filed: February 3, 2014
    Date of Patent: September 6, 2016
    Assignee: XILINX, INC.
    Inventors: Matthew H. Klein, Chen W. Tseng
  • Patent number: 9430412
    Abstract: A method and system for enabling Non-Volatile Memory express (NVMe) for accessing remote solid state drives (SSDs) (or other types of remote non-volatile memory) over the Ethernet or other networks. An extended NVMe controller is provided for enabling CPU to access remote non-volatile memory using NVMe protocol. The extended NVMe controller is implemented on one server for communication with other servers or non-volatile memory via Ethernet switch. The NVMe protocol is used over the Ethernet or similar networks by modifying it to provide a special NVM-over-Ethernet frame.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: August 30, 2016
    Assignee: CNEX Labs, Inc.
    Inventor: Yiren Ronnie Huang
  • Patent number: 9424221
    Abstract: A method is provided for cabling a plurality of hardware components. A chassis controller establishes a wireless connection to a wireless device. The chassis controller, via a wireless interface, transmits a chassis map to the wireless device over the wireless connection. The chassis controller, via the wireless interface, transmits to the wireless device, an indication of a first port to be cabled over the wireless connection, the first port. The first port is of a first hardware component of the plurality of hardware components. The chassis controller tests the first port to determine whether cabling of the first port has been performed correctly.
    Type: Grant
    Filed: November 19, 2014
    Date of Patent: August 23, 2016
    Assignee: International Business Machines Corporation
    Inventors: Tu T. Dang, Michael C. Elles, Jeffery M. Franke, James A. O'Connor, Alan D. Seid
  • Patent number: 9411771
    Abstract: A server system includes a baseboard management controller and calculation modules. Each calculation module includes a system on chip, slave devices and a switch. The switch is connected with the baseboard management controller, the system on chip and the slave devices. The switch issues an address selection signal to select one of the slave devices to be connected with the switch. The switch switches the baseboard management controller and the system on chip to be connected with one of the slave devices by a control signal.
    Type: Grant
    Filed: January 2, 2014
    Date of Patent: August 9, 2016
    Assignees: Inventec (Pudong) Technology Corporation, INVENTEC CORPORATION
    Inventor: Lan Huang
  • Patent number: 9391833
    Abstract: A method may include receiving a message from a first Ethernet interface in a second Ethernet interface, wherein the message includes a first attribute indicative of an Ethernet service at the first interface according to a first operation, administration, or management (OAM) protocol. The method may further include mapping the first attribute to a second attribute, wherein the second attribute is in accordance with a second OAM protocol different than the first OAM protocol. The method may further include performing an operation at the second interface based on the second attribute.
    Type: Grant
    Filed: November 23, 2011
    Date of Patent: July 12, 2016
    Assignee: VERIZON PATENT AND LICENSING INC.
    Inventors: Roman Krzanowski, Michael U. Bencheck, Vincent Anthony Alesi, Virgil M. Vladescu, Richard L. Wheeler
  • Patent number: 9378368
    Abstract: A system for automatically collecting and analyzing crash dumps to determine if a security exploit was unsuccessful and generating a report.
    Type: Grant
    Filed: April 30, 2014
    Date of Patent: June 28, 2016
    Assignee: Parsons Corporation
    Inventor: Scott Piper
  • Patent number: 9354685
    Abstract: A first device (such as a power supply) may detect a power anomaly and provide a warning to a second device that is powered by the first device. For example, if there are conditions indicating an increased likelihood of a power outage (e.g., a brownout period, one or more voltage spikes, etc.), then the first device may notify the second device, and in response, the second device may take protective action. Examples of protective action may include, but are not limited to, saving certain data (e.g., critical data) to non-volatile data storage, initiating a shut-down procedure, warning a user of the second device, etc. As the warning and/or other communications between the power supply and powered device may be wireless, various example techniques for wirelessly pairing the devices are also disclosed.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: May 31, 2016
    Assignee: Comcast Cable Communications, LLC
    Inventors: Christopher Stone, Ross Gilson, Michael Sallas, Edward R. Grauch
  • Patent number: 9354967
    Abstract: Error-handling in a computing environment at an input/output (I/O) level is facilitated by associating a control element with an input/output (I/O) operation based on a command to perform the I/O operation between an adapter and memory. Based on detection of an error for the I/O operation, the control element is updated to indicate an error state, and completion of any uncompleted I/O request for the I/O operation is blocked, while other I/O requests for one or more other I/O operations are allowed to proceed between the adapter (or adapter function) and the memory. By way of example, the control element may be a cyclic redundancy check (CRC) control element used, for instance, by an I/O hub of the computing environment to accumulate during performance of the I/O operation an accumulated CRC value for the I/O operation to facilitate error checking of the operation.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: May 31, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: David Craddock, John R. Flanagan, Thomas A. Gregg
  • Patent number: 9344323
    Abstract: A method, network element, and network provide detecting a failure on both ports of a major ring at a network element that has an interconnecting sub-ring terminating thereon; causing a block at an associated sub-ring termination port of the interconnecting sub-ring responsive to the failure on both the ports of the major ring; and monitoring the failure and clearing the block responsive to a recovery of one or both ports from the failure. The method, network, and network element include G.8032 multiple concurrent or simultaneous fault recovery mechanisms that traffic being transported between an interconnected major ring and a sub-ring to be successfully delivered in the event of dual concurrent faults on the major ring.
    Type: Grant
    Filed: January 23, 2014
    Date of Patent: May 17, 2016
    Assignee: Ciena Corporation
    Inventors: Geraldine Ruth Civil, Marc Holness
  • Patent number: 9344328
    Abstract: A first port of a network device having a plurality of ports. The first port includes a memory configured to store an identifier of a backup port associated with the first port a redirect circuit, and a loopback circuit. The redirect circuit is configured to, in response to a failure of the first port, redirect first frames of data, to be received from the first port by the network device, to the backup port associated with the first port. The loopback circuit is configured to, in response to the failure of the first port, redirect second frames of data, received by the first port from the network device, to the backup port associated with the first port.
    Type: Grant
    Filed: October 22, 2013
    Date of Patent: May 17, 2016
    Assignee: Marvell International Ltd.
    Inventor: Nafea Bishara
  • Patent number: 9336005
    Abstract: Preempting the execution of a thread is disclosed. Preempting includes receiving an indication that a preemption of the thread is desired and context switching the thread out at a thread safe point in the event that a thread safe point is reached.
    Type: Grant
    Filed: August 9, 2013
    Date of Patent: May 10, 2016
    Assignee: Azul Systems, Inc.
    Inventors: Gil Tene, Michael A. Wolf, Scott Sellers, Jack H. Choquette
  • Patent number: 9336039
    Abstract: Systems and techniques are described for determining the status of migrating virtual machines. A described technique includes initiating a migration of one or more virtual machines from a source host that is located at a source site to a destination host that is located at a destination site. A determination is made that a fault has occurred during the migration of the one or more virtual machines. In response to determining that the error has occurred, a determination is made, for each virtual machine of the one or more virtual machines, whether the virtual machine has been fully migrated from the source host to the destination host.
    Type: Grant
    Filed: June 26, 2014
    Date of Patent: May 10, 2016
    Assignee: VMware, Inc.
    Inventors: Aleksey Pershin, Min Cai, Ilia Langouev, Gabriel Tarasuk-Levin
  • Patent number: 9280433
    Abstract: Described is a headless server appliance configured with a secondary actuation mechanism that when actuated, enters the headless server appliance into a diagnostic mode. For example, the diagnostic mode may correspond to a secondary operating system booted from a BIOS component activated by the secondary actuation mechanism. In the diagnostic mode, primitives may be communicated between a client device coupled (e.g., via a network or USB connection) to the headless server appliance, such as to provide the client device with access to the headless server appliance's hard disk. Other primitives, such as communicated via APIs, may provide the client device with access to the BIOS. The secondary operating system and/or client device may perform diagnostics and recovery operations on the headless server appliance. For example, the client device or similar source may restore or update the primary operating system image to a storage medium of the headless server appliance.
    Type: Grant
    Filed: January 13, 2012
    Date of Patent: March 8, 2016
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Cesare John Saretto, James C. Gray, James M. Lyon
  • Patent number: 9229814
    Abstract: A storage device is described that detects a data error and then notifies a distributed file system, for example, of such error. A data recovery can then be initiated in many ways, one way by the storage device.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: January 5, 2016
    Assignee: Seagate Technology LLC
    Inventor: Sumanth Jannyavula Venkata
  • Patent number: 9201722
    Abstract: A system-on-chip comprising a sender unit and a receiver unit and a method of operating thereof are described. The sender unit comprises a send counter for providing a send counter value. The receiver unit comprises a receive counter for providing a receive counter value. The sender unit is arranged to increment the send counter value by an increment and send a data packet to the receiver unit. The receiver unit is arranged to receive the data packet and increment the receive counter value by the increment. In a challenge operation, the sender unit sends the send counter value to the receiver unit. In a challenge response operation, the receiver unit receives the send counter value, compares the values, and generates a comparison result. Loss of data packets from the sender unit as well as reception of unexpected data packets from a third functional unit may thus be detected.
    Type: Grant
    Filed: July 10, 2014
    Date of Patent: December 1, 2015
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Dirk Moeller, Peter Ludwig Limmer, Clemens Alfred Roettgermann
  • Patent number: 9203715
    Abstract: Systems and methods are disclosed which facilitate the management of host computing devices through the utilization of a host computing device control component. The host computing device control component includes a state monitoring component that monitors operating states of the control component and a group of associated host computing devices. The state monitoring component includes a power supply separate from the control component power supply, a state processing component, a visual indicator interface, and a separate communication component to facilitate communication with other state monitoring components. Utilizing consensus type algorithms, the state monitoring components can decide information related to the set of host computing devices, such as a state monitoring component authoritative for the grouping of the host computing devices.
    Type: Grant
    Filed: September 29, 2014
    Date of Patent: December 1, 2015
    Assignee: Amazon Technologies, Inc.
    Inventors: Jacob Gabrielson, Marvin M. Theimer, Allan H. Vermeulen
  • Patent number: 9195520
    Abstract: An apparatus includes an application module to accept a file transfer request from a client application and a sendfile module, coupled to the application module, which is executable by a processor. The sendfile module assigns a first worker thread to transfer a requested file to the client application and detect an idle time of the first worker thread. In response to detecting the idle time, the sendfile module assigns the file transfer request to a shared poller thread shared by a plurality of file transfer requests and releases the first worker thread.
    Type: Grant
    Filed: May 31, 2013
    Date of Patent: November 24, 2015
    Assignee: Red Hat, Inc.
    Inventor: Mladen Turk
  • Patent number: 9191307
    Abstract: This invention is related to a method for Fast Connectivity Fault Management (CFM) of a service-network in the realm of Carrier Ethernet, comprises steps of: learning spanning tree topology of the service-network, exchanging Fast Connectivity Check Messages (Fast-CCM)s between the adjacent service-nodes of the tree, terminating the Fast-CCMs so received, to learn the fault, in the service-network, upon failure to receive a Fast-CCM through a service-port, and pro-actively notifying the fault by service nodes on either side of the faulty service-network.
    Type: Grant
    Filed: January 7, 2009
    Date of Patent: November 17, 2015
    Assignee: TEJAS NETWORKS LTD
    Inventors: Abhay Karandikar, Madaiah Vinod Kumar
  • Patent number: 9189316
    Abstract: Failover in a clustered system is managed. The clustered system includes sub-clusters connected with one another by a first set of links. Each sub-cluster includes nodes connected with one another by a second set of links. At least one of the second set of links is used to determine that a suspect node within a same sub-cluster has stopped. In response, a lease relinquish message is transmitted on behalf of the suspect node.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: November 17, 2015
    Assignee: International Business Machines Corporation
    Inventor: Henry Esmond Butterworth
  • Patent number: 9183067
    Abstract: A data preserving apparatus includes: a generator generating scenarios that represent presence or absence of occurrence of a failure, presence or absence of a failure symptom, a time point of occurrence of a failure, and a time point of occurrence of a failure symptom; an evaluator calculating the amount of data loss in the case of occurrence of a failure for the scenario based on first and second backup intervals before and after occurrence of a failure symptom; an backup interval evaluator calculating a number of backups performed until earlier one of a time point of occurrence of a failure and a time point after a predetermined time period; a cost evaluator calculating a cost evaluation values for the scenarios based on the amount of data loss and the number of backups; and a calculator calculating the first and second backup intervals based on cost evaluation values for scenarios.
    Type: Grant
    Filed: November 12, 2013
    Date of Patent: November 10, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Minoru Nakatsugawa, Takeichiro Nishikawa
  • Patent number: 9172715
    Abstract: A particular failed connection attempt initiated by a particular source asset in a network is identified and subsequent failed connection attempts initiated by the particular source asset in the network during a time period are tracked. A low frequency sequence of failed connection attempts involving the particular source asset is detected during the time period and the source asset is designated as a potential security risk based on the detected low frequency sequence of failed connection attempts.
    Type: Grant
    Filed: October 22, 2013
    Date of Patent: October 27, 2015
    Assignee: McAfee, Inc.
    Inventors: Vinay Mahadik, Bharath Madhusudan, Shivakumar Buruganahalli, Venu Vissamsetty
  • Patent number: 9167243
    Abstract: Described herein are techniques for allowing a customer support agent to remotely analyze a television receiver. A television receiver is communicatively coupled to a customer support center through a communication network. A customer support agent remotely accesses the television receiver and the television receiver transmits video content to the customer support center through the communication network. The video output is outputted to the customer support agent at the customer support center for analysis of the television receiver.
    Type: Grant
    Filed: August 10, 2012
    Date of Patent: October 20, 2015
    Assignee: EchoStar Technologies L.L.C.
    Inventor: Pamela Margit Tritt
  • Patent number: 9146797
    Abstract: Technologies are described herein for ensuring remediation of hung multiplexer bus channels between a baseboard management controller (BMC), multiplexer, and I2C device such as a sensor. In particular, a BMC, which is in operative communication with one or more sensors via a multiplexer, comprises an I2C interface and general purpose input/output (GPIO) interface. Upon transmitting an I2C command to the I2C device via the multiplexer and subsequently transmitting a stop sequence to the I2C device via the multiplexer, the BMC then immediately transmits a reset signal to the multiplexer's reset input. When the multiplexer receives the reset signal, it resets all registers and deselects all channels, thereby remediating any hung channels and ensuring the next communication from the BMC is successful.
    Type: Grant
    Filed: August 9, 2013
    Date of Patent: September 29, 2015
    Assignee: AMERICAN MEGATRENDS, INC.
    Inventor: Jason Andrew Messer
  • Patent number: 9143415
    Abstract: Machine implemented method and system of detecting a loss of sync at a port of a network device coupled to a port of another device is provided. The port includes logic configured to detect that a special character has not been received by the port for a programmable duration; and generates a signal for a processor of the network device indicating a loss of sync between the port of the network device and the port of the other device.
    Type: Grant
    Filed: March 28, 2013
    Date of Patent: September 22, 2015
    Assignee: QLOGIC, Corporation
    Inventors: David T. Kwak, Oscar L. Grijalva
  • Patent number: 9113358
    Abstract: A network profile describes one or more characteristics of a network including bandwidth, latency, rate of packet loss, duplication, corruption, or reordering, and so forth. Using the network profile, one or more adjustments are made to network traffic between a server device and an application executing on a client device. These adjustments virtualize the profiled network and emulate how the profiled network affects traffic. Such virtualization may enable an application to be tested under different network conditions corresponding to different network profiles.
    Type: Grant
    Filed: November 19, 2012
    Date of Patent: August 18, 2015
    Assignee: Google Inc.
    Inventors: Manish Lachwani, Jay Srinivasan, Pratyus Patnaik
  • Patent number: 9111049
    Abstract: An apparatus is provided for coupling a Universal Serial Bus (USB) device and a USB host. The apparatus includes a memory and a controller. The memory includes one or more descriptor entries. The controller is configured to obtain a descriptor of the USB device upon detection of the USB device on a USB bus, and compare the descriptor to a specific descriptor entry to generate a comparing result. Then the controller enables or disables a link path between the USB host and the USB device according the comparing result.
    Type: Grant
    Filed: December 6, 2012
    Date of Patent: August 18, 2015
    Assignee: VIA TECHNOLOGIES, INC.
    Inventors: Yi-Lin Lai, Hao-Hsuan Chiu, Terrance Shih
  • Patent number: 9104562
    Abstract: Embodiments relate to providing communication over cross-coupled links between independently managed compute and storage networks. An aspect includes coupling an independently managed local subsystem with an independently managed remote subsystem over cross-coupled links, whereby each subsystem includes compute entities and storage entities. Unique identifiers are assigned to all the compute entities and the storage entities in the local network and the remote network. A determination is then made as to whether each entity is in the local subsystem or the remote subsystem. Accordingly, a global broadcast tree is built to bridge the compute entities in the local subsystem to the storage entities in both the local and remote subsystem. Responsive to an error in a layer of the local subsystem external to a cross-coupled link, the cross-coupled link in the local subsystem is disabled. Accordingly, the remote subsystem may detect that the link has failed.
    Type: Grant
    Filed: April 5, 2013
    Date of Patent: August 11, 2015
    Assignee: International Business Machines Corporation
    Inventors: John Dorfner, Casandra H. Qiu, Aruna V. Ramanan, Alison B. White
  • Patent number: 9104572
    Abstract: Various aspects of the performance of computing resources, such as storage volumes, are measured and used to train a probability model. The probability model is used in a query engine that is able to respond receive queries about a computing resource's state. The queries may specify a state of the computing resource and provide a set of measurements of the computing resource's performance. The query engine may use the probability model, which may be in the form of a contingency table, to provide information that indicates one or more most likely causes of the state.
    Type: Grant
    Filed: February 11, 2013
    Date of Patent: August 11, 2015
    Assignee: Amazon Technologies, Inc.
    Inventors: James Michael Thompson, Marc Stephen Olson, Ganesh Viswanathan, Benjamin Arthur Hawks, Bhavesh Anil Doshi
  • Patent number: 9077628
    Abstract: A network device includes multiple ports for accepting network connections, at least one memory for storing a fail-safe device configuration, a normal operational device configuration and one or more triggering events, and one or more processors connected to the memory for controlling the operation of the network device. The processor causes the network device to operate according to the fail-safe configuration in response to the occurrence of a triggering event.
    Type: Grant
    Filed: May 15, 2008
    Date of Patent: July 7, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Olaf Borowski, John F. Lino, Lin A. Nease
  • Patent number: 9068880
    Abstract: An apparatus and method for a monitoring system for operating equipment is provided. The monitoring system includes a first sensor having first operating parameters. A first printed circuit board includes an electrical circuit and signal processing hardware. A first sensor is in electrical communication with a second printed circuit board and the second printed circuit board includes signal processing hardware configured to process the signal. The second printed circuit board is in electrical communication with the first printed circuit board through a connector. The connector is configured to permit insertion and removal of a third printed circuit board to operate a second sensor having second operating parameters that differ from the first operating parameters of the first sensor. In another aspect, the first printed circuit board includes no processing circuit, the first printed circuit board includes an analog-to-digital hardware circuit, processor, controller or microprocessor and an output circuit.
    Type: Grant
    Filed: January 8, 2013
    Date of Patent: June 30, 2015
    Assignee: GENERAL ELECTRIC COMPANY
    Inventors: Parag Vishwanath Acharya, Shriniwas Ananda Neje, Sivanagabhushanam Sajja
  • Patent number: 9053233
    Abstract: Software executed at a data processor unit includes a software debugger. The software debugger can be assigned responsibility for servicing a debug event, and be authorized to allow software control of debug event resources associated with the debug event. An indicator, when asserted, prevents a authorized request by software to control a debug event resource.
    Type: Grant
    Filed: August 15, 2011
    Date of Patent: June 9, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventor: William C. Moyer
  • Patent number: 9054783
    Abstract: Example methods, apparatus, and articles of manufacture to trigger preemptive maintenance of vectored digital subscriber line (DSL) systems are disclosed. An example method includes generating a trouble ticket for a first subscriber loop based on a result of a diagnostic test, the diagnostic test being performed on the first subscriber loop when a value representing crosstalk coupling between the first subscriber loop and a second subscriber loop exceeds a threshold. The first subscriber loop and the second subscriber loop belong to a vectored group of subscriber loops contained in a same cable binder. The example method includes submitting the trouble ticket.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: June 9, 2015
    Assignee: AT&T INTELLECTUAL PROPERTY I, L.P.
    Inventors: Gary Tennyson, Richard D. Hart, Jin Wang
  • Publication number: 20150149832
    Abstract: A bus pressure testing system and method thereof are disclosed, where a peripheral component interconnect express (PCI-E) device is used to initialize a central processing unit (CPU), peripheral component interface express (PCI-E) device interface and memory according to a testing model, generate a data transmission path corresponding to the testing model, produce a pressure data stream by using the PCI-E device, and test a bus for its pressure by flowing the pressure data transmission stream on the data transmission path. As such, the pressure testing may be enhanced in practicability.
    Type: Application
    Filed: March 12, 2014
    Publication date: May 28, 2015
    Applicants: INVENTEC CORPORATION, INVENTEC (PUDONG) TECHNOLOGY CORPORATION
    Inventor: Tian-Chao ZHANG
  • Patent number: 9037917
    Abstract: A method includes identifying, at a computing system executing a line test engine, a line to be tested by comparing a test entry of a test configuration database to a first database. The first database includes line data descriptive of multiple lines of a network. The method includes determining, at the computing system, a test to be performed on the line based on the test entry and sending a message from the computing system to a line test controller. The message indicates the line and the test to be performed on the line. The line test controller causes a test device to perform the test on the line. The method includes receiving a result message from the line test controller, wherein the result message indicates a result of the test.
    Type: Grant
    Filed: December 5, 2012
    Date of Patent: May 19, 2015
    Assignee: AT&T Intellectual Property I, L.P.
    Inventors: Christopher Wilson, Keith Bertelsen, Bruce Losee, Kavitha Shankar
  • Patent number: 9037918
    Abstract: Systems for helping identify faults on a bus, as well as to determine the topology of a bus network, are disclosed. A system according to one embodiment includes a bus interface for connecting to a bus and a switch coupled to the bus interface, the switch configured to alternate between an open state and a closed state. The system is connected to the bus via the bus interface when the switch is in the closed state, and the system is disconnected from the bus via the bus interface when the switch is in the open state.
    Type: Grant
    Filed: August 18, 2014
    Date of Patent: May 19, 2015
    Assignee: OSRAM SYLVANIA Inc.
    Inventors: Marc Hoffknecht, Javier Rojas, Liam John O'Hagan
  • Publication number: 20150121149
    Abstract: Systems and methods that implement communication of error information on a bus, including a bus having a small number of pins are disclosed. In one embodiment, an apparatus includes an interface circuit configured to couple to a bus and one or more sideband signals. The sideband signals may be used to communicate error information such as parity information for a bus that does not otherwise have this capability. In some embodiments, parity information may be driven on the bus during a portion of a bus transaction corresponding to unused address bits.
    Type: Application
    Filed: October 30, 2013
    Publication date: April 30, 2015
    Applicant: Oracle International Corporation
    Inventor: Scott D. Cooke
  • Patent number: 9021310
    Abstract: A policy-driven automatic network remediation service is described, which resides on the network and is triggered when a network fault is detected. Once triggered, the service automatically connects to network devices in the topological locale of the detected fault and collects diagnostic information from the affected area, running diagnostics which are appropriate to the fault type. The service can validate a set of preconditions prior to taking remedial action. For example, the service can empirically validate that the network topology is actually as expected and that automatic remediation would be safe and would not compromise network availability or redundancy. Diagnostic information can be recorded in a trouble ticket to support post-event auditing. Once the preconditions have been validated, the service can automatically take corrective action based on the type of the fault, such as shutting down an interface on a particular network device.
    Type: Grant
    Filed: February 14, 2012
    Date of Patent: April 28, 2015
    Assignee: Amazon Technologies, Inc.
    Inventors: Karl A. McCabe, Brian White, Brian J. Callan, Robert Kennedy
  • Publication number: 20150113333
    Abstract: An operating method of a data processing system includes calculating a test result by performing a test for measuring characteristics of each of lanes included in the data processing system, and selecting one or more operating lanes among the lanes based on the test result.
    Type: Application
    Filed: December 30, 2013
    Publication date: April 23, 2015
    Applicant: SK hynix Inc.
    Inventor: Hyun Wook KIM
  • Patent number: 9015533
    Abstract: Various embodiments are disclosed herein including systems and methods for implementing exception-based error handling in asynchronous, parallel, multi-threaded, and other distributed systems. Embodiments implement exception-based error handling in asynchronous workflow systems, providing try/catch blocks and tree-based cancellation of pending and currently executing activities.
    Type: Grant
    Filed: December 6, 2011
    Date of Patent: April 21, 2015
    Assignee: Amazon Technologies, Inc.
    Inventor: Maxim E. Fateev
  • Patent number: 9009540
    Abstract: A memory subsystem includes logic buffer coupled to a command bus between a memory controller and a memory device. The logic buffer detects that the memory controller places the command bus in a state where the memory controller does not drive the command bus with a valid executable memory device command. In response to detecting the state of the command bus, the logic buffer generates a signal pattern and injects the signal pattern on the command bus after a scheduler of the memory controller to drive the command bus with the signal pattern.
    Type: Grant
    Filed: December 5, 2012
    Date of Patent: April 14, 2015
    Assignee: Intel Corporation
    Inventors: Christopher P. Mozak, Theodore Z. Schoenborn, James M. Shehadi, David G. Ellis, Tomer Levy, Zvika Greenfield
  • Patent number: 9009546
    Abstract: A request is received by a first computer. The first computer delegates the first request to a second computer. The second computer attempts to process the first request and identifies an imminent fault as a result of the attempt. The second computer sends a message to the first computer indicating an imminent fault as a result of the attempted processing of the first request. The first computer sends a message to a third computer indicating that a second request matching the first request should not be processed.
    Type: Grant
    Filed: September 27, 2012
    Date of Patent: April 14, 2015
    Assignee: International Business Machines
    Inventors: Nikolaus K. Brauer, Kenneth E. Brunsen, Daniel C. Gurney, Russell L. Holden, Michael J. Kerrigan, Michael I. Killoran, Peter O. Mierswa, Chester E. Ryder, III, Vinod R. Seraphin
  • Publication number: 20150095714
    Abstract: A server motherboard diagnosis method, system, and related circuit system. A management module of the server motherboard and peripheral devices managed by the management module are capable of being powered by a server power source and a USB port. In response to the management module and the peripheral devices being powered by the USB port, a power supply line of the server power source is isolated, as by: identifying the peripheral devices, in response to the management module and the peripheral devices being powered by the USB port; for each of the identified peripheral devices, initializing the peripheral device, and then shutting down the power supply of the peripheral device; establishing a communication between the management module and a diagnosis host through the USB port; and executing a command in response to the command being received from the diagnosis host.
    Type: Application
    Filed: October 10, 2014
    Publication date: April 2, 2015
    Inventors: He Huang, Mehul Shah, Adam L. Soderlund, Wen Wei Tang, Yun Le Wang
  • Publication number: 20150095713
    Abstract: A server motherboard diagnosis method, system, and related circuit system. A management module of the server motherboard and peripheral devices managed by the management module are capable of being powered by a server power source and a USB port. In response to the management module and the peripheral devices being powered by the USB port, a power supply line of the server power source is isolated, as by: identifying the peripheral devices, in response to the management module and the peripheral devices being powered by the USB port; for each of the identified peripheral devices, initializing the peripheral device, and then shutting down the power supply of the peripheral device; establishing a communication between the management module and a diagnosis host through the USB port; and executing a command in response to the command being received from the diagnosis host.
    Type: Application
    Filed: September 17, 2014
    Publication date: April 2, 2015
    Inventors: He Huang, Mehul Shah, Adam L. Soderlund, Wen Wei Tang, Yun Le Wang
  • Patent number: 8990609
    Abstract: Disclosed are a cipher control method which supports to maintain a cipher mode between a network system and a terminal. The method of controlling an encryption includes: attempting a connection for operating a communication channel between a terminal and a network system; providing cipher information about a cipher algorithm operation of the terminal to the network system; determining whether the terminal is a problematic terminal operating an abnormal cipher algorithm by the networking system; and when the terminal is determined to be operating abnormal, instructing the terminal to perform a communication channel operation based on a normally operable cipher algorithm by the network system.
    Type: Grant
    Filed: October 2, 2012
    Date of Patent: March 24, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sanghyun Lee, Nohsun Kim
  • Patent number: 8983410
    Abstract: A configurable 2-wire/3-wire serial communications interface (C23SCI), which includes start-of-sequence (SOS) detection circuitry and sequence processing circuitry, is disclosed. When the SOS detection circuitry is coupled to a 2-wire serial communications bus, the SOS detection circuitry detects an SOS of a received sequence based on a serial data signal and a serial clock signal. When the SOS detection circuitry is coupled to a 3-wire serial communications bus, the SOS detection circuitry detects the SOS of the received sequence based on a chip select (CS) signal. In response to detecting the SOS, the SOS detection circuitry provides an SOS detection signal to the sequence processing circuitry, which initiates processing of the received sequence using the serial data signal and the serial clock signal. The received sequence is associated with one of multiple serial communications protocols.
    Type: Grant
    Filed: November 4, 2011
    Date of Patent: March 17, 2015
    Assignee: RF Micro Devices, Inc.
    Inventors: William David Southcombe, Christopher Truong Ngo, David E. Jones, Chris Levesque, Scott Yoder, Terry J. Stockert
  • Patent number: 8983409
    Abstract: An automatically configurable 2-wire/3-wire serial communications interface (AC23SCI), which includes start-of-sequence (SOS) detection circuitry and sequence processing circuitry, is disclosed. When the SOS detection circuitry is coupled to a 2-wire serial communications bus, the SOS detection circuitry detects an SOS of a received sequence based on a serial data signal and a serial clock signal. When the SOS detection circuitry is coupled to a 3-wire serial communications bus, the SOS detection circuitry detects the SOS of the received sequence based on a chip select (CS) signal. The SOS detection circuitry provides an indication of detection of the SOS to the sequence processing circuitry, which initiates processing of the received sequence using the serial data signal and the serial clock signal upon the detection of the SOS. As such, the AC23SCI automatically configures itself for operation with some 2-wire and some 3-wire serial communications buses without external intervention.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: March 17, 2015
    Assignee: RF Micro Devices, Inc.
    Inventors: Christopher Truong Ngo, Roman Zbigniew Arkiszewski, Brad Hunkele
  • Publication number: 20150074466
    Abstract: Various examples of techniques for identifying a corrupt data lane and using a spare data lane are described herein. Some examples include a method of coordinating spare lane usage between link partners. One such example comprises analyzing data from a link partner to identify a corrupt lane, and communicating the corrupt lane to the link partner, wherein the communication does not require sideband communication channel. In some embodiments, communicating the corrupt lane to the link partner comprises identifying a transmit lane corresponding to the corrupt lane, transmitting a set of data intended for a corresponding transmit lane using a spare data lane, and transmitting bad data to the link partner using the corresponding transmit lane.
    Type: Application
    Filed: May 1, 2014
    Publication date: March 12, 2015
    Applicant: International Business Machines Corporation
    Inventors: Etai Adar, Yiftach Benjamini, Pavel Granovsky
  • Patent number: 8966322
    Abstract: System and method for automated testing of hot swap scenarios of field replaceable units (FRUs) in a storage system comprises an external automation server that distributes control signals to actuation systems within a number of FRUs. Power for the actuation systems may be provided by the external automation server or by self-contained power supplies with each actuation system. The actuation systems are responsive to the control signals to move the storage devices back-and-forth thereby electrically and physically disconnecting the storage device's mating connector from the backplane connector. This approach provides a high degree of automation while closely emulating customer hot swap scenarios.
    Type: Grant
    Filed: January 8, 2013
    Date of Patent: February 24, 2015
    Assignee: International Business Machines Corporation
    Inventors: Gary I. Dickenson, Richard Hutzler