Peripheral Device Component Fault Patents (Class 714/44)
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Patent number: 8719640Abstract: A mouse motion trajectory testing system includes a testing fixture and an electronic calculator connected to the testing fixture. The testing fixture includes a testing base, a rotatable member under the testing base, and a controlling unit. The testing base is used for fixing the tested mouse thereon. The controlling unit is used for driving the rotatable member to be rotated for a preset number of revolutions at a preset speed, so that the tested mouse generates a motion signal. The electronic calculator has testing program for receiving the motion signal from the tested mouse, thereby judging whether the tested mouse is qualified or not.Type: GrantFiled: September 23, 2011Date of Patent: May 6, 2014Assignee: Primax Electronics Ltd.Inventor: Pei-Ming Chang
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Publication number: 20140082427Abstract: To have a problem of occurrence of the same failure in failure detection of a microcontroller. A microcontroller has a CPU and a data access control circuit. The data access control circuit performs two types of accesses: an individual access in which a data access of the CPU is performed for each thread, and a shared access in which a data access of the CPU is performed by executing two threads. The data access control circuit detects a failure of the CPU by making a comparison between the command and the address, respectively, in the shared access generated by executing the two threads.Type: ApplicationFiled: September 20, 2013Publication date: March 20, 2014Applicant: Renesas Electrics CorporationInventors: Hiromichi Yamada, Tsutomu Yamada, Nobuyasu Kanekawa, Kesami Hagiwara, Yuichi Ishiguro, Takashi Yasumasu, Kazuyoshi Fukuda, Yoshiyuki Nakada
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Publication number: 20140082426Abstract: Provided is a connection detector assembly for detecting a connected state between a keypad and a processor along a flexible circuit. The assembly comprises a keypad with a plurality of buttons, each button including button contacts. A flexible printed circuit having a plurality of electrical traces aligned along a width of the flexible printed circuit and includes a set of two or more button signal traces individually electrically coupled with a first button contact of a corresponding one of the plurality of buttons. A first diagnostic electrical trace and a second diagnostic electrical trace form a diagnostic circuit with one another. A receiving unit receives the flexible printed circuit. A processor electrically couples to the diagnostic electrical circuit performs a diagnostic check of the diagnostic circuit to determine a connected state, the connected state indicating whether or not a failure condition exists along a designated portion of the diagnostic circuit.Type: ApplicationFiled: February 27, 2013Publication date: March 20, 2014Applicants: Delta Electronics, Inc., Rockwell Automation Asia Pacific Business Ctr. Pte., Ltd.Inventors: Yang Yueng Melvin Yap, Scott Miles, Chiu-Ju Teng, Chih Wei Chang, Chingchi Yang
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Patent number: 8677177Abstract: An apparatus and method for automatically recovering a hardware when the hardware is not accessible from the processing unit. The hardware is recovered via a path different from a path which the processing unit uses when the processing unit fails to access to the hardware via the path initially used.Type: GrantFiled: December 15, 2010Date of Patent: March 18, 2014Assignee: NEC CorporationInventor: Yoji Tabuchi
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Patent number: 8661130Abstract: Server management data describes observed operating condition of a pool of spare servers. Based on a demand forecast of a specific target system, a dynamic allocation period is determined as a period during which the target system needs additional server resources to handle an expected demand. Based on the dynamic allocation period and server management data, a set of allocation candidates are nominated from the spare server pool, by eliminating therefrom spare servers which are likely to fail during the dynamic allocation period. An appropriate allocation candidate is then selected for allocation to the target system, such that the selected candidate will satisfy a specified requirement during its allocation period.Type: GrantFiled: March 10, 2009Date of Patent: February 25, 2014Assignee: Fujitsu LimitedInventors: Masataka Sonoda, Satoshi Tsuchiya, Kunimasa Koike, Atsuji Sekiguchi
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Patent number: 8656223Abstract: An information handling system includes a peripheral component interconnect express root complex, a basic input output system, and a root complex mirroring block. The peripheral component interconnect express root complex includes a plurality of peripheral component interconnect express ports. The basic input output system is in communication with the peripheral component interconnect express root complex, and is configured to detect a peripheral component interconnect express adaptor configuration, and to set a peripheral component interconnect express mirroring setting based on the peripheral component interconnect express adaptor configuration. The root complex mirroring block is in communication with the basic input output system, and is configured to mirror data between a first peripheral component interconnect express adaptor and a second peripheral component interconnect express adaptor based on the peripheral component interconnect express mirroring setting.Type: GrantFiled: February 28, 2013Date of Patent: February 18, 2014Assignee: Dell Products, LPInventors: Indrani Paul, Johan Rahardjo, Mukund P. Khatri
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Patent number: 8614620Abstract: In a method for parametering a field device of process automation technology, wherein the field device is connected via a bus system with a control unit, parameter values are packaged in telegrams of cyclic services and transmitted to the field device whose parameter values are to be changed. No acyclic services are required for changing parameter values.Type: GrantFiled: April 13, 2007Date of Patent: December 24, 2013Assignee: Endress + Hauser Flowtec AGInventors: Alain Chomik, Udo Fuchs, Pierre Harnist
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Patent number: 8607101Abstract: An RS-485 port test apparatus includes an RS-485 connector, a micro control unit (MCU), a multiprotocol transceiver, and a display. The RS-485 connector receives a first test code signal from a test RS-485 port of an electronic device. The multiprotocol transceiver receives the first test code signal from the RS-485 connector, converts the first test code signal to a second test code signal which can be identified by the MCU, and transmits the second signal to the MCU. The MCU receives the second test code signal and displays the second test code signal by the display. The MCU sends back the second test code signal to the multiprotocol transceiver. The multiprotocol transceiver converts the second test code signal to the first test code and transmits the first test code to the test RS-485 port of the electronic device through the RS-485 connector.Type: GrantFiled: July 14, 2010Date of Patent: December 10, 2013Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.Inventor: Zhao-Jie Cao
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Patent number: 8578215Abstract: A method for configuring data communication paths between a central controller and a plurality of devices is provided. The method ensures a first appliance is active. For each of the devices, a first communication capability is determined between the first appliance and the device. Signals indicative of the first communication capabilities are transmitted to the central controller. Respective communication paths are mapped between the central controller and the devices via the first appliance as a function of the first communication capabilities. The method ensures an automatic appliance failover is obtained.Type: GrantFiled: November 19, 2001Date of Patent: November 5, 2013Assignee: Hewlett-Packard Development Company, L.P.Inventors: Timothy P. Blair, James S Boyce
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Patent number: 8560895Abstract: Disclosed is a method for archiving provisioning errors that may occur during provisioning of a computing environment having configurable components. The method may comprise distilling a provisioning request, wherein the distilling the provisioning request includes recording, in a provisioning archive, a provisioning request component, and filtering the provisioning request component. The provisioning request component may comprise a component requested to be added to, removed from, and/or updated in the computing environment. The method may further comprise distilling a provisioning target, wherein the distilling the provisioning target includes recording, in the provisioning archive, a target environment, and filtering an existing component of the target environment. Additionally, the method may comprise applying the provisioning request to the provisioning target, including provisioning the target environment, resulting in an updated provisioning target.Type: GrantFiled: May 26, 2011Date of Patent: October 15, 2013Assignee: Tibco Software Inc.Inventor: David J. Kemper
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Patent number: 8527816Abstract: A method, system, and computer usable program product for identifying a defective adapter are provided in the illustrative embodiments. A configuration process of the adapter is initiated, the adapter being coupled with a slot in a data processing system. An indication of the configuration process is activated. A determination is made whether the configuration has completed successfully. The indication is allowed to remain activated responsive to the configuration not completing successfully. The activated indication identifies the defective adapter.Type: GrantFiled: March 10, 2010Date of Patent: September 3, 2013Assignee: International Business Machines CorporationInventors: James A Lindeman, Orlando O'Neill, Gary Lee Ruzek, Chris Alan Schwendiman
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Patent number: 8527817Abstract: Detecting system component failures in a computing system, including: detecting, by an illumination detector, the occurrence of an illumination event in the computing system; determining, by an illumination event identifier, whether the illumination event is associated with a suspected component failure in the computing system; and sending, by a notification system, a failure event notification upon determining that the illumination event is associated with a suspected component failure in the computing system.Type: GrantFiled: November 19, 2010Date of Patent: September 3, 2013Assignee: International Business Machines CorporationInventors: Paul D. Kangas, Daniel M. Ranck
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Patent number: 8514431Abstract: A method for automated call assistance for malfunctions in an image production device may include receiving a signal from a user interface requesting call assistance, transmitting the call assistance request to an automated call assistance processing unit along with customer and image production device identification information, receiving a signal from the automated call assistance processing unit to identify one or more malfunctions, identifying one or more malfunctions, transmitting the one of more identified malfunctions to the automated call assistance processing unit, receiving a signal from the automated call assistance processing unit to perform one or more diagnostic tests on the image production device, performing the one or more diagnostic tests, transmitting the results of the one or more diagnostic tests to at least one of the user interface and the automated call assistance processing unit, receiving instructions from the automated call assistance processing unit concerning one or more remediesType: GrantFiled: December 15, 2008Date of Patent: August 20, 2013Assignee: Xerox CorporationInventors: Tracy E. Thieret, Robert A. Gunther, Frederic Roulland
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Patent number: 8510607Abstract: A method for resetting and reenumerating a Universal Serial Bus (USB) device, an Electrical Fast Transient/Burst (EFTB) unit of a USB device for resetting and reenumerating the USB device and a USB device are described. In one embodiment, a method for resetting and reenumerating a USB device involves detecting a USB reset command from a host device at a USB device, setting a reset flag in the USB device in response to the detecting of the USB reset command, determining if the USB device is in a corrupted state in response to the reset flag, and causing a Single Ended Zero (SE0) signal to be issued to reset the USB device out of the corrupted state and reenumerate the USB device back to the host device if the USB device is determined to be in the corrupted state. Other embodiments are also described.Type: GrantFiled: January 17, 2011Date of Patent: August 13, 2013Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.Inventors: Rizal Jaffar, Kwai Lee Pang, Kevin Len-Li Lim
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Patent number: 8510593Abstract: A control apparatus includes a lower layer control unit configured to perform control of a load, an upper layer control unit configured to control the lower layer control unit, a communication unit configured to perform communication between the upper layer control unit and the lower layer control unit via a communication line, a detection unit configured to detect power supply voltage of the lower layer control unit, wherein the upper layer control unit detects communication abnormality of the communication unit and notifies the communication abnormality, the upper layer control unit notifying abnormality of power supply voltage of the lower layer control unit, in such a manner as to be identified from the communication abnormality of the communication unit.Type: GrantFiled: September 20, 2010Date of Patent: August 13, 2013Assignee: Canon Kabushiki KaishaInventor: Noriaki Adachi
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Patent number: 8510479Abstract: A process control system is provided having a plurality of I/O devices in communication using a bus. A primary redundant I/O device and a secondary redundant I/O device are coupled to the bus, where the secondary redundant I/O device is programmed to detect a primary redundant I/O device fault. The secondary redundant I/O device, upon detecting the primary redundant I/O device fault, publishes a primary redundant I/O device fault message on the bus. The controller may deactivate the primary redundant I/O device and activate the secondary redundant I/O device responsive to the primary redundant I/O device fault message.Type: GrantFiled: September 23, 2011Date of Patent: August 13, 2013Assignee: Fisher-Rosemount Systems, Inc.Inventors: Michael D. Apel, Steve Dienstbier
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Patent number: 8499199Abstract: Disclosed is a method and apparatus for testing devices that will be connected to a computer storage media device by generating a complex test waveform that emulates operation of the computer storage media device using at least one Graphics Processing Unit (GPU) and applying the generated complex test waveform to the device(s) being tested. The complex test waveform may be generated by calculating a plurality of discrete individual portions of the complex test waveform in parallel, in real-time, and continuously using the parallel processing features of the GPU(s). The discrete individual portions of the complex test waveform may be representative of various characteristics of the emulated computer storage media device operation such as operational characteristics of the computer storage media device, environmental effects on the computer storage media device, application of filters to the computer storage media device signal, etc.Type: GrantFiled: September 8, 2010Date of Patent: July 30, 2013Assignee: LSI CorporationInventors: Joshua Alan Johnson, Robert W. Warren, Jr., Kyle L. Nelson
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Patent number: 8479054Abstract: A method and apparatus that creates situations in which insufficient memory is available to store a file created by a computer game device on an SD memory card, or exactly enough memory is available to store a file or sufficient memory is available to store a file. Depending upon the memory condition that is created, software that is being tested behaves in a particular manner.Type: GrantFiled: April 21, 2010Date of Patent: July 2, 2013Assignee: Nintendo of America Inc.Inventors: Sayaka Sogabe Fourcade, Michael Carl Leslie, Randy Lee Shoemake, Brian Robert Silvola, Alexander Abram Youells
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Patent number: 8468392Abstract: A controller and a control method for a controller can simplify application development and can improve the performance of device control processes. When a request is received from an application 1 and the received process request is an initialization request, whether or not the received request is the first initialization request received after the application 1 started running is determined. If the received initialization request is the first initialization request, the request is passed to the device driver 3 and initialization settings information describing the configuration of the device driver 3 after the initialization process ends is stored. If an error has occurred in the device driver 3 when the device driver 3 status is detected, an error handling process is executed according to the device driver 3 state. When the device driver 3 has recovered, a request for setting the device driver 3 state to the state based on the initialization settings information is asserted.Type: GrantFiled: May 27, 2010Date of Patent: June 18, 2013Assignee: Seiko Epson CorporationInventors: Nobuhiko Nishimura, Toshihiro Hagiwara, Eiji Ito, Atsushi Sakai
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Patent number: 8453017Abstract: An electronic device includes: a memory unit; and a control unit which selects, from a set of information corresponding to a plurality of errors, selected information corresponding to an error that occurred, such that at least one of a type and a frequency of the error that occurred satisfies/satisfy a predetermined condition. The control unit also causes the memory unit to store the selected information.Type: GrantFiled: August 26, 2009Date of Patent: May 28, 2013Assignee: Kyocera Document Solutions Inc.Inventors: Masayuki Yamashirodani, Tatsuo Noda, Tetsuya Matsuzaka, Takeshi Hamakawa, Akihiko Ikazaki, Toshihide Higashimori
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Patent number: 8448024Abstract: A firmware assisted error handling scheme in a computer system has been disclosed. In one embodiment, firmware is used to access one or more hardware-specific error registers within the computer system in response to a system management interrupt (SMI) trap. Using the firmware, an error record in a common error record format is constructed. The error record is made available to an operating system (OS) within the computer system.Type: GrantFiled: May 16, 2007Date of Patent: May 21, 2013Assignee: Intel CorporationInventors: Mohan Kumar, Sarathy Jayakumar
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Patent number: 8392751Abstract: A method for recovery from uncorrectable errors in an information handling system including an operating system (OS) and one or more network interface cards (NICs) is provided. The method may include detecting an uncorrectable error; determining whether the uncorrectable error is isolated to a particular NIC; determining whether the particular NIC is teamed with one or more other NICs; and notifying the OS of a successful recovery from the uncorrectable error if it is determined that (a) the uncorrectable error is isolated to a particular NIC, and (b) the particular NIC is teamed with one or more other NICs.Type: GrantFiled: April 1, 2011Date of Patent: March 5, 2013Assignee: Dell Products L.P.Inventors: Mukund Purshottam Khatri, Theodore Stratton Webb, III
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Patent number: 8392764Abstract: Auto-detection and configuring systems and methods for interconnected, position dependent control devices are disclosed. Embedded identification and configuration keys are associated with each of the control devices in a network, such that specific connection nodes for each controller may be determined by electronically reading the identification as the control devices are installed. Hardware and software compatibility issues may be detected and resolved, including self configuring of the control devices with the proper software where possible. Otherwise, error conditions are signaled.Type: GrantFiled: November 16, 2009Date of Patent: March 5, 2013Assignee: Cooper Technologies CompanyInventor: Peter de Buen
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Patent number: 8392144Abstract: A keyboard test program generating method includes the following steps. Firstly, a first key number is received. By pressing a first key, a first key identification code corresponding to the first key is generated. The first key number is assigned to the first key so as to generate a first key conditional expression. By pressing a next key, a next key identification code corresponding to the next key is generated. A second key number following the first key number is assigned to the next key so as to generate a next key conditional expression. Afterwards, these key conditional expressions, a keyboard test program header and a keyboard test program trailer are combined together, thereby generating the keyboard test program.Type: GrantFiled: May 26, 2010Date of Patent: March 5, 2013Assignee: Primax Electronics Ltd.Inventor: Pei-Ming Chang
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Patent number: 8391321Abstract: Aspects of a method and system for patch panel port identification and verification are provided. In this regard, a patch panel may transmit, over a cable that is coupled to the patch panel, a signal that identifies the port of the patch panel to which the cable is coupled. The signal may comprise a common-mode signal communicated over one or more twisted pairs of the cable. The signal may comprise one or more Ethernet frames communicated in accordance with Ethernet standards. A device coupled to the patch panel may receive the signal, recover the patch port identifier from the signal, and store the patch port identifier to memory. The patch panel identifier may comprise, for example, an alphanumeric sequence comprising numbers, letters, or a combination of numbers and letters. The device may compare the received patch port identifier to an expected value.Type: GrantFiled: June 10, 2010Date of Patent: March 5, 2013Assignee: Broadcom CorporationInventor: Wael William Diab
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Patent number: 8381043Abstract: According to an aspect of the invention, an information processing apparatus includes a main body having a top face, a display connected to the main body by a hinge and pivotally moves between a first state where the top face is covered with the display and a second state where the top face is exposed, a counter which stores a number of times the state has changed between the first state and the second state, a monitor which detects a malfunction in the hinge when the number of times reaches a given number, and a data transmitter which sends data corresponding with the detected malfunction.Type: GrantFiled: November 11, 2009Date of Patent: February 19, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Shigeharu Imamura, Tooru Mamata
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Publication number: 20130019127Abstract: A mouse motion trajectory testing system includes a testing fixture and an electronic calculator connected to the testing fixture. The testing fixture includes a testing base, a rotatable member under the testing base, and a controlling unit. The testing base is used for fixing the tested mouse thereon. The controlling unit is used for driving the rotatable member to be rotated for a preset number of revolutions at a preset speed, so that the tested mouse generates a motion signal. The electronic calculator has testing program for receiving the motion signal from the tested mouse, thereby judging whether the tested mouse is qualified or not.Type: ApplicationFiled: September 23, 2011Publication date: January 17, 2013Applicant: PRIMAX ELECTRONICS LTD.Inventor: Pei-Ming Chang
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Patent number: 8326959Abstract: A communications system and method for testing components of an aircraft via Ethernet. The communications system may comprise one or more Ethernet links having software and hardware controls for timing, buffering, and messaging, and a dedicated Ethernet line. The Ethernet links may be configured to communicably link sections of a central communication system of the aircraft, each section being part of a separate aircraft component. The Ethernet links may also communicably link the sections with various databases over the Ethernet line. The databases may comprise loadable software, archived testing data, configuration data, and/or diagnostic data. Any of the central communication system sections and the databases may be located at geographically distant locations from each other, such as at separate production sites. The communications system may allow the aircraft components to test each other, or essentially for the aircraft to test itself prior to its components being physically joined together.Type: GrantFiled: September 4, 2009Date of Patent: December 4, 2012Assignee: Spirit AeroSystems, Inc.Inventor: Mark Kenyon Venskus
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Patent number: 8286034Abstract: A method for accurately tracking fault status in a computer system. The method includes storing a prior state for a sensor associated with a component of the computer system and receiving a sensor reading. When the prior state indicates the sensor was unavailable or unreadable such as when the component was removed, the method includes resending or re-emitting a faulty event to the fault diagnosing module, e.g., after reinsertion of the component in the computer system while it is still faulty. The method may include, prior to the triggering of the resending of the faulty event, determining that the sensor is in a non-nominal state. The method may also include storing in the data storage a definition of a nominal state for the sensor such that the determining the sensor is in the non-nominal state includes comparing one or more sensor readings with the nominal state definition.Type: GrantFiled: July 20, 2010Date of Patent: October 9, 2012Assignee: Oracle America, Inc.Inventors: David A. Rudy, Robert J. Hueston, Michael E. Poh
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Patent number: 8281188Abstract: In a data processing system including a first master operably coupled to a peripheral bus interface and a plurality of peripherals operably coupled to the peripheral bus interface, wherein the first master communicates with each of the plurality of peripherals via the peripheral bus interface, a method includes initiating a write, by the first master, of configuration information to a first peripheral of the plurality of peripherals. In response to initiating the write, the configuration information is provided via the peripheral bus interface for storage into the first peripheral, wherein a first error syndrome of the configuration information is generated by the peripheral bus interface. The provided configuration information is stored in the first peripheral, and the first error syndrome is stored in storage circuitry of the peripheral bus interface. The first error syndrome can be used to check the integrity of configuration information during subsequent error checking.Type: GrantFiled: August 5, 2010Date of Patent: October 2, 2012Inventor: Gary L. Miller
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Patent number: 8261123Abstract: An information processing apparatus which manages a document file to be stored includes a creating unit for creating an output job which is output to an image forming apparatus according to an instruction to an icon of the document file displayed on a display unit, a job management unit for managing the output job by relating a job ID for identifying the output job to a file ID of the document file when the output job is created by the creating unit, an acquirement unit for acquiring from the image forming apparatus the job ID of the output job in which processing ends in error, and a first display control unit for changing an icon display state of an a document file including a file ID specified by the job ID acquired by the acquirement unit and the job ID managed by the management unit, from a normal display state to an error display state.Type: GrantFiled: January 7, 2010Date of Patent: September 4, 2012Assignee: Canon Kabushiki KaishaInventor: Daijiro Miyamoto
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Patent number: 8261128Abstract: A data processing system includes an input/output (I/O) host bridge to which at least one I/O adapter is coupled by an I/O link. In a register of the I/O host bridge, a configuration partitionable endpoint (PE) field is set to identify a PE to be used for an I/O configuration operation. Thereafter, the host bridge initiates the I/O configuration operation on the I/O link and determines if an error occurred for the I/O configuration operation. In response to a determination that an error occurred for the I/O configuration operation, an error state is set in the I/O host bridge only for the PE indicated in the configuration PE field of the register in the I/O host bridge, wherein I/O configuration errors are isolated to particular PEs.Type: GrantFiled: August 4, 2010Date of Patent: September 4, 2012Assignee: International Business Machines CorporationInventors: Eric N. Lais, Steve Thurber
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Patent number: 8253958Abstract: Described herein is a printing system comprising a plurality of print processing modules which selectively transfer print media therebetween during printing and a system controller that tracks process control protocols of each of the plurality of modules and compares to a scheduled job run and selectively alters a control variable of at least one of the process control protocols thereby preemptively altering initiation of at least one process control protocol to process the job run uninterrupted.Type: GrantFiled: April 30, 2007Date of Patent: August 28, 2012Assignee: Xerox CorporationInventors: Alex Scott Brougham, Dusan G. Lysy
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Patent number: 8239708Abstract: A system on a chip (SoC) device verification system comprises: an SoC device model including one or more IPs and a memory controller; an external IP verification model receiving an instruction from the SoC device model and verifying operation of the one or more IPs included in the SoC device model; and a bus select model selecting one of the external IP verification model and an external device in response to a memory control signal received from the memory controller of the SoC device model.Type: GrantFiled: May 29, 2009Date of Patent: August 7, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Jin-kwon Park, Cheon-su Lee, Jae-shin Lee, Min-Joung Lee
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Patent number: 8234526Abstract: A computer system and a monitoring device for a computer system are disclosed. The computer system includes a plurality of electronic modules, a memory module and an embedded controller. The embedded controller is coupled to the electronic modules and the memory module, respectively. The embedded controller collects information of the electronic modules and generates the system information about the electronic modules. The embedded controller selectively writes the system information into the memory module. The system information in the memory module can be provided to the user or the maintenance engineer for system analysis. Besides, the computer system may utilize an application program to monitor the system information, so as to achieve the error prevention and alert function.Type: GrantFiled: September 16, 2010Date of Patent: July 31, 2012Assignee: ASUSTek Computer Inc.Inventors: Li Chien Wu, Pai Ching Huang
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Patent number: 8230261Abstract: A system and method for managing faults in a computer-based system are disclosed herein. For example, a system includes fault management logic, and a plurality of field replaceable units (“FRUs”). In response to a detected fault in the system, the fault management logic is configured to identify each FRU of a sub-plurality of the FRUs as a possible root cause of the fault. The fault management logic is further configured to store information, including an acquittal policy, that individually specifies for each identified FRU whether to dismiss the identified FRU from the sub-plurality based on detection of an event corresponding to the identified FRU.Type: GrantFiled: December 17, 2009Date of Patent: July 24, 2012Assignee: Hewlett-Packard Development Company, L.P.Inventor: Howard Calkin
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Patent number: 8230286Abstract: Techniques are provided herein to dynamically disable a hardware component in a processor device. Notifications for single-bit errors detected in a hardware component are received. The hardware component is disabled for a period of time when a number of single-bit errors exceeds a threshold. In addition, techniques are provided to permanently disable one or more hardware components in order to minimize the number of system malfunctions associated with single event upsets (SEUs).Type: GrantFiled: June 16, 2009Date of Patent: July 24, 2012Assignee: Cisco Technology, Inc.Inventor: John Foley
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Patent number: 8209566Abstract: A system includes an input device having first and second input members configured to be activated by a user. The input device is configured to generate activation signals associated with activation of the first and second input members, and each of the first and second input members are associated with an input function. A processor is coupled to the input device and configured to receive the activation signals. A memory coupled to the processor, and includes a reconfiguration module configured to store the input functions assigned to the first and second input members and, upon execution of the processor, to reconfigure the input functions assigned to the input members when the first input member is inoperable.Type: GrantFiled: January 30, 2009Date of Patent: June 26, 2012Assignee: Honeywell International Inc.Inventors: Jeff Lancaster, Robert E. De Mers
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Patent number: 8209565Abstract: A data processing device includes a computing circuit that accesses a peripheral device connected to through a internal bus, an internal bus connection circuit that is provided between the computing circuit and the internal bus, and switches an enable and a disable state of an access from the computing circuit to the internal bus, an exception notification controller that outputs an exception occurrence notification signal to the computing circuit based on an error occurred in the peripheral device, and a bus disablement controller that instructs the internal bus connection circuit to disable an access from the computing circuit to the internal bus in accordance with the notification of the exception occurrence notification signal, and instructs the internal bus connection circuit to cancel the disablement of the access in accordance with a start of an exception processing based on the exception occurrence notification signal.Type: GrantFiled: December 11, 2008Date of Patent: June 26, 2012Assignee: Renesas Electronics CorporationInventors: Yukihiko Akaike, Hitoshi Suzuki, Junichi Sato
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Patent number: 8205117Abstract: A method and system of migratory hardware diagnostic testing is disclosed. In one embodiment, a method includes performing a diagnostic test of a hardware component of a first partition of a server using a first test module embedded in the first partition in response to a receipt of a test command, and storing context data associated with the diagnostic test of the hardware component in a memory associated with the hardware component, where the context data indicates a current state of the diagnostic test of the hardware component. Further, the method includes analyzing the context data upon a receipt of an instruction for a migration of the hardware component to a second partition of the server, and continuing the diagnostic test of the hardware component using a second test module embedded in the second partition based on the context data if the migration is performed.Type: GrantFiled: April 20, 2009Date of Patent: June 19, 2012Assignee: Hewlett-Packard Development Company, L.P.Inventors: Suhas Shivanna, Meera K. Raghunandan
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Patent number: 8205119Abstract: Provided are a method and apparatus for performing diagnostic functions of an external device such as a printer, connected to a host computer. The apparatus and method receive information about diagnostic functions supported by the external device from the external device; receive one or more of the diagnostic functions which are selected by a user; request the external device to perform the selected diagnostic functions; and receive the results of the requested diagnostic functions from the external device.Type: GrantFiled: November 19, 2010Date of Patent: June 19, 2012Assignee: Samsung Electronics Co., Ltd.Inventor: Jae-kyung Cho
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Patent number: 8185783Abstract: A device driver includes a kernel stub and a user-mode module. The device driver may access device registers while operating in user-mode to promote system stability while providing a low-latency software response from the system upon interrupts. Upon receipt of an interrupt, the kernel stub may run an interrupt service routine and write information to shared memory. Control is passed to the user-mode module by a reflector. The user-mode module may then read the information from the shared memory to continue servicing the interrupt.Type: GrantFiled: November 22, 2007Date of Patent: May 22, 2012Assignee: Microsoft CorporationInventors: Mingtzong Lee, Peter Wieland, Nar Ganapathy, Ulfar Erlingsson, Martin Abadi, John Richardson
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Patent number: 8156367Abstract: An I/O device management table that manages the types of I/O devices connected to an I/O switch is provided, and one or plural unallocated I/O devices are defined and registered as standby I/O devices. When a failure occurs in any of I/O devices, the I/O device management table is used to select an I/O device of the same type as the failed I/O device from the standby I/O devices, and the selected I/O device is allocated to a computer to which the failed I/O device is connected. I/O device management can be eased at failure in a computer including an I/O switch device.Type: GrantFiled: August 31, 2010Date of Patent: April 10, 2012Assignee: Hitachi, Ltd.Inventor: Yoshifumi Takamoto
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Patent number: 8151145Abstract: A method for detecting lack of forward progress in a PCI Express includes a step in which a data flow measurement is received or performed. This data flow measurement provides the capacity of the connected Switch or Endpoint device to receive data packets from a Root Complex transmit channel. An error is logged when the data flow measurement does not substantially change in a predetermined period of time. A recovery protocol is executed after logging of the error. A system implementing the method of the invention is also provided.Type: GrantFiled: April 3, 2008Date of Patent: April 3, 2012Assignee: Oracle America, Inc.Inventor: John R. Feehrer
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Patent number: 8145967Abstract: A system and method for verifying the receive path of an input/output device such as a network interface circuit. The device's operation with various different input sources (e.g., networks) and output sources (e.g., hosts, host buses) is modeled in a verification layer that employs multiple queues to simulate receipt of packets, calculation of destination addresses and storage of the packet data by the device. Call backs are employed to signal completion of events related to storage of packet data by the device and modeling of data processing within the verification layer. Processing of tokens within the verification layer to mimic the device's processing of corresponding packets is performed according to a dynamic DMA policy modeled on the device's policy. The policy is dynamic and can be updated or replaced during verification without interrupting the verification process.Type: GrantFiled: October 12, 2007Date of Patent: March 27, 2012Assignee: Oracle America, Inc.Inventors: Arvind Srinivasan, Rahoul Puri
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Patent number: 8132059Abstract: One aspect can include determining that at least one mote device is operating outside normal operational parameters and should be serviced, and determining at least partially using the at least one mote device that is operationally located within a mote network is not meeting a goal of the at least one mote device with respect to the mote network and should be serviced. Another aspect can include determining that at least one mote device should undergo routine servicing and configuring the at least one mote device to indicate the at least one mote device should undergo the routine servicing.Type: GrantFiled: August 3, 2010Date of Patent: March 6, 2012Assignee: The Invention Science Fund I, LLCInventors: Edward K. Y Jung, Royce A. Levien, Robert W. Lord, Mark A. Malamud, John D. Rinaldo, Jr.
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Patent number: 8122298Abstract: Methods and systems for capturing error information regarding a Serial Advanced Technology Attachment (SATA). An initiator device is enhanced in accordance with features and aspects hereof to detect an error condition in operation of the system and to transmit error information to the SATA target device during a soft reset condition applied to the SATA target device. The SATA target device discards all such frames received during the soft reset condition until the initiator device clears the soft reset condition. The error information may be captured for further analysis and debug of the error condition by suitable error analyzer equipment such as a SATA bus analyzer. The initiator device may be a SATA initiator or a Serial Attached SCSI (SAS) initiator using the SATA Tunneling Protocol (STP). Features and aspects hereof may also include a SAS/SATA bridge device coupling a SAS initiator to the SATA target device.Type: GrantFiled: June 12, 2008Date of Patent: February 21, 2012Assignee: LSI CorporationInventor: Ross J. Stenfort
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Patent number: 8122296Abstract: When an image processing apparatus acquires job log information and error log information from an image forming apparatus, the information processing apparatus identifies a job processing time from a job start time and a job end time of each job which are recorded in the acquired job log information. Subsequently, the information processing apparatus identifies a job suspension time from an occurrence time and a recovery time of an error of each log which is recorded in the error log information. Then, the information processing apparatus calculates a job execution time based on the identified job processing time and the job suspension time.Type: GrantFiled: March 2, 2009Date of Patent: February 21, 2012Assignee: Canon Kabushiki KaishaInventor: Kazunori Kato
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Patent number: 8117504Abstract: An automatic keyboard testing system includes a computer, an automatic testing program and a testing frame. A keyboard circuit board to be tested in placed on the testing frame. The automatic testing program is installed in the computer for generating a testing signal and has a predetermined time period. The testing frame generates a simulating signal according to the testing signal and conducts a key intersection point corresponding to the simulating signal, so that the keyboard circuit board output a key scanning code corresponding to the conducted key intersection point to the computer. The automatic testing program discriminates whether the key scanning code is transmitted to the computer within the predetermined time period.Type: GrantFiled: May 21, 2009Date of Patent: February 14, 2012Assignee: Primax Electronics Ltd.Inventor: Pei-Ming Chang
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Patent number: 8112674Abstract: A diagnostic control methodology provides reduced disruption of device operation when performing diagnostics on devices within a computer system. A diagnostic application notifies a device driver that controls a particular device that diagnostics should be performed during a period of low activity on the device. In response to receiving the notification, the device driver waits for a time of low activity and either notifies the application to unload the device driver and load a diagnostic device driver, or enters a diagnostic mode directly if such operation is supported by the functional device driver. A timeout duration can be specified, and may be set by the notification, so that the diagnostics will be performed within the timeout period even if a time of low activity has not occurred by the expiration of the timeout.Type: GrantFiled: April 1, 2009Date of Patent: February 7, 2012Assignee: International Business Machines CorporationInventors: Rafael Graniello Cabezas, Brandon Dale Nelson, Daniel Patrick Thomas