Peripheral Device Component Fault Patents (Class 714/44)
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Patent number: 8112662Abstract: A smart card comprises a storage unit in which various data are stored, a communication unit to perform data communication with an external apparatus, and a processing unit which executes processing corresponding to a command received via the communication unit. The processing unit of the smart card detects data judged to have data abnormality from the data stored in the storage unit in a case where the command received from the external apparatus is an abnormal data confirmation command, and notifies the external apparatus of response data including information indicating the data in which the data abnormality has been detected by the detection.Type: GrantFiled: March 17, 2010Date of Patent: February 7, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Aki Fukuda, Saori Nishimura
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Patent number: 8099634Abstract: A mechanism is provided for autonomic component service state management for a multiple function component. The mechanism determines whether independent functions within a multiple function service boundary can be serviced. When a single function experiences a failure that requires service, repair, or replacement, the surviving functions notify the service management software of the state of the independent functions. The service management software then determines the state of the overall component and implements the appropriate service method.Type: GrantFiled: September 9, 2008Date of Patent: January 17, 2012Assignee: International Business Machines CorporationInventors: Linda V. Benhase, Basheer N. Bristow, Robert A. Kubo, Gregg S. Lucas
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Patent number: 8090565Abstract: In one embodiment, a system model models characteristics of a real-world system. The system model includes a plurality of sub-portions that each correspond to a component of the real-world system. A plurality of test vectors are applied to the system model and coverage achieved by the test vectors on the sub-portions of the system model is measured. In response to a failure of the real world system, a suspected failed component of the real-world system is matched to a particular sub-portion of the system model. A test vector to be applied to the real-world system to test the suspected failed component is selected in response to coverage achieved on the particular sub-portion of the system model.Type: GrantFiled: January 8, 2008Date of Patent: January 3, 2012Assignee: The MathWorks, Inc.Inventor: Thomas Gaudette
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Patent number: 8090993Abstract: This invention enables setting of a diagnosis algorithm of a safety device to be easily carried out. A slice I/O unit stores a plurality of diagnosis algorithms each corresponding to a different safety device in an ASIC, and stores specifying information for specifying a diagnosis algorithm to use of the plurality of diagnosis algorithms in a register of the ASIC. The slice I/O unit performs diagnosis of a connected safety device using the diagnosis algorithm specified by the specifying information stored in the register of the plurality of diagnosis algorithms. The diagnosis algorithm to use can be selected by selecting a number, and the like, which is preferable as a setting process at a setting tool device can be facilitated and a human error does not occur.Type: GrantFiled: February 25, 2010Date of Patent: January 3, 2012Assignee: Omron CorporationInventors: Katsufumi Yoshida, Toshiyuki Nakamura
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Patent number: 8082464Abstract: Systems, methods and articles of manufacture are disclosed for managing availability of a component executing in a distributed system. The component may have an address space closed to the distributed system. In one embodiment, the component may be initiated. A state of the component may be analyzed to determine the availability of the component. The determined availability may be transmitted to the distributed system. The component may also be restarted responsive to a request from the distributed system to restart the component.Type: GrantFiled: October 13, 2009Date of Patent: December 20, 2011Assignee: International Business Machines CorporationInventors: Harish Deshmukh, Sridhar Rajagopalan, Roger C. Raphael, Chitrang Shah, Paul S. Taylor
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Patent number: 8082472Abstract: A system for testing a video memory reliability of a video card includes an input module, a data read/write module, a data processing module, a data comparison module, and an output module. The input module is capable of activating a testing program which includes an original image file. The data read/write module is capable of writing the original image file in the video memory from the testing program, and reading the image file data stored in the video memory during the writing process for storing the read image file data to form a new image file. The data processing module is capable of calculating hash values of the original and new image files using hash function(s). The data comparison module is capable of comparing hash values, and outputting the comparison result. The output module is capable of indicating whether the video card is normal according to the comparison result.Type: GrantFiled: February 4, 2010Date of Patent: December 20, 2011Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.Inventor: Qing-Hua Liu
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Publication number: 20110271138Abstract: A system and a method for handling a system failure are disclosed. The method is adapted for an information handling system having a basic input and output system and a micro-controller. The method includes the following steps: sending, via the micro-controller, a signal; checking, via the micro-controller, whether an acknowledgement is received from the basic input and output system responsive to the signal; and scanning, via the micro-controller, a type of a system failure in response to the acknowledgement being not received.Type: ApplicationFiled: April 27, 2011Publication date: November 3, 2011Applicant: International Business Machines CorporationInventors: Ameha Aklilu, Hank CH Chung, Jeff HC Yu
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Patent number: 8051220Abstract: A process control system is provided having a plurality of I/O devices in communication using a bus. A primary redundant I/O device and a secondary redundant I/O device are coupled to the bus, where the secondary redundant I/O device is programmed to detect a primary redundant I/O device fault. The secondary redundant I/O device, upon detecting the primary redundant I/O device fault, publishes a primary redundant I/O device fault message on the bus. The controller may deactivate the primary redundant I/O device and activate the secondary redundant I/O device responsive to the primary redundant I/O device fault message.Type: GrantFiled: December 23, 2009Date of Patent: November 1, 2011Assignee: Fisher-Rosemount Systems, Inc.Inventors: Michael D. Apel, Steven L. Dienstbier
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Patent number: 8027827Abstract: Device, system, and method of storage controller having simulated volumes. For example, an apparatus for data storage management includes: a storage controller to manage access to one or more physical volumes, the storage controller including a simulation module to simulate access to one or more simulated volumes.Type: GrantFiled: May 8, 2008Date of Patent: September 27, 2011Assignee: International Business Machines CorporationInventors: Akram Bitar, Aviad Zlotnick
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Patent number: 8001426Abstract: A method for automatically diagnosing malfunction in device is provided. The method includes: acquiring a sort identification code from a hardware code of the malfunctioning device connected to the diagnostic apparatus; determining the access address of the diagnostic program on the server according to the determined sort identification code in a diagnostic program access address table; accessing the diagnostic program from the server according to the determined access address of the diagnostic program; applying the diagnostic program to the malfunctioning device to generate a diagnosis; and generating a diagnostic report of the generated diagnosis.Type: GrantFiled: April 23, 2009Date of Patent: August 16, 2011Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.Inventors: Hua-Dong Cheng, Han-Che Wang
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Patent number: 7999954Abstract: A printer comprising a reception unit for receiving a command or data sent from a host computer, a timer for counting elapsed time after the command or data is received, and an error detection unit for reporting that the host computer is in an error state when the command or data from the host computer is not received within a predetermined time after the timer starts counting the elapsed time.Type: GrantFiled: January 23, 2007Date of Patent: August 16, 2011Assignee: Seiko Epson CorporationInventors: Kenichi Murahashi, Yukiharu Horiuchi, Yuji Yoshida
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Patent number: 8001431Abstract: A control apparatus controls a device to which the control apparatus is connected. The control apparatus includes a storing unit and a linking unit. The storing unit stores an error message that contains information on a failed component in a storage device upon receiving the error message from the device. The linking unit stores the error message and information on a replacement component, which has been installed in the device in place of the failed component, in the storage device in association with each other upon receiving the information on the replacement component.Type: GrantFiled: August 25, 2010Date of Patent: August 16, 2011Assignee: Fujitsu LimitedInventor: Katsuhiko Konno
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Patent number: 7992041Abstract: The peripheral device through an interface cable, and includes a second memory device for storing an evaluation program for evaluating the peripheral device and its integrated circuit. A detection section detects whether the mode indicating signal which is transmitted from the computer indicates a test mode or a normal mode, and a starting means starts the evaluation program on the second memory device when the detection section detects that the mode indicates signal a test mode.Type: GrantFiled: August 3, 2007Date of Patent: August 2, 2011Assignee: Panasonic CorporationInventor: Kazushi Yamamoto
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Patent number: 7975181Abstract: A device is disclosed for testing the function of a display port. The device includes a display port transmitting part, a field programmable gate array, and a memory. The display port transmitting part transmits connecting signals to a display port timing controller mounted on a display panel. The field programmable gate array applies a test signal to the display port timing controller, and controls the connecting signals applied from the display port transmitting part to the display port timing controller. The memory has software that determines acceptance or rejection of the display port function based on data output from the display port timing controller in response to the connecting signals or the test signal.Type: GrantFiled: March 31, 2009Date of Patent: July 5, 2011Assignee: Samsung Electronics Co., Ltd.Inventor: Taek-Young Kim
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Patent number: 7970594Abstract: A mechanism for exploiting the data gathered about a system model during the system design phase to aid the identification of errors subsequently detected in a deployed system based on the system model is disclosed. The present invention utilizes the coverage analysis from the design phase that is originally created to determine whether the system model as designed meets the specified system requirements. Included in the coverage analysis report is the analysis of which sets of test vectors utilized in simulating the system model excited individual components and sections of the system model. The present invention uses the information associated with the test vectors to select appropriate test vectors to use to perform directed testing of the deployed system so as to confirm a suspected fault.Type: GrantFiled: June 30, 2005Date of Patent: June 28, 2011Assignee: The MathWorks, Inc.Inventor: Thomas Gaudette
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Patent number: 7962793Abstract: A method, apparatus, and computer instructions for self-diagnosing remote I/O enclosures with enhanced FRU callouts. When a failure is detected on a RIO drawer, a data processing system uses the bulk power controller to provide an alternate path, rather than using the existing RIO links, to access registers on the I/O drawers. The system logs onto the bulk power controller, which provides a communications path between the data processing system and the RIO drawer. The communications path allows the data processing system to read all of the registers on the I/O drawer. The register information in the I/O drawer is then analyzed to diagnose the I/O failure. Based on the register information, the data processing system identifies a field replacement unit to repair the I/O failure.Type: GrantFiled: October 8, 2008Date of Patent: June 14, 2011Assignee: International Business Machines CorporationInventors: Mike C. Duron, Mark D. McLaughlin
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Patent number: 7958405Abstract: An automatic testing system and method for judging whether a universal serial bus device is configured to a computer are provided. The automatic testing system includes a computer and a testing device for testing the universal serial bus device. By judging whether the universal serial bus device is configured to the computer, the automatic testing system could determine the timing of performing an automatic testing procedure on the universal serial bus device.Type: GrantFiled: February 3, 2010Date of Patent: June 7, 2011Assignee: Primax Electronics Ltd.Inventor: Pei-Ming Chang
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Patent number: 7924446Abstract: A method is provided for error handling in a printer or copier. A plurality of monitoring units detect error states of the printer or copier. A detected error states are transmitted to a controller. A plurality of successively transmitted error states are stored in a storage. The stored error states are evaluated by the controller. The stored error states are compared with predetermined error patterns and at least one error type is determined. Further steps are executed by the controller dependent on the error type.Type: GrantFiled: July 17, 2003Date of Patent: April 12, 2011Assignee: Oce Printing Systems GmbHInventors: Christoph Nemmaier, Peter Bremmer, Hubert Drexler
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Patent number: 7921327Abstract: A method for recovery from uncorrectable errors in an information handling system including an operating system (OS) and one or more network interface cards (NICS) is provided. The method may include detecting an uncorrectable error; determining whether the uncorrectable error is isolated to a particular NIC; determining whether the particular NIC is teamed with one or more other NICs; and notifying the OS of a successful recovery from the uncorrectable error if it is determined that (a) the uncorrectable error is isolated to a particular NIC, and (b) the particular NIC is teamed with one or more other NICs.Type: GrantFiled: June 18, 2008Date of Patent: April 5, 2011Assignee: Dell Products L.P.Inventors: Mukund Purshottam Khatri, Theodore Stratton Webb, III
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Patent number: 7917811Abstract: To improve the maintainability of a virtual machine system, there is provided a mechanism capable of appropriately reporting a failure that occurs in a dedicated PCI device, in a shared PCI device, or in a virtual PCI device. A device for transferring PCI device configuration information between a failure monitoring application and a hypervisor that monitors a PCI device failure is prepared, and the failure monitoring application is operated in a user virtual machine and in a control virtual machine. Based on the above-described PCI device configuration information, the failure monitoring application operating in the user virtual machine monitors a dedicated PCI device failure and a virtual PCI device failure, and the failure monitoring application operating in the control virtual machine monitors a shared PCI device failure, respectively, thereby appropriately reporting a failure of the dedicated PCI device, the shared PCI device, or the virtual PCI device without duplication.Type: GrantFiled: April 18, 2008Date of Patent: March 29, 2011Assignee: Hitachi, Ltd.Inventor: Mitsuo Yamamoto
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Publication number: 20110072311Abstract: Provided are a method and apparatus for performing diagnostic functions of an external device such as a printer, connected to a host computer. The apparatus and method receive information about diagnostic functions supported by the external device from the external device; receive one or more of the diagnostic functions which are selected by a user; request the external device to perform the selected diagnostic functions; and receive the results of the requested diagnostic functions from the external device.Type: ApplicationFiled: November 19, 2010Publication date: March 24, 2011Inventor: Jae-kyung Cho
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Patent number: 7908522Abstract: A network card testing method, used to test if the network card is capable of functioning normally in a computer having Extended Firmware Interface (EFI) system. Wherein, in a protocol assignment table is recorded the connection relations of a network protocol of Extended Firmware Interface, and a driver program corresponding to a network driver interface specification (NDIS) layer. In addition, the driver corresponding to the network card is loaded at the NDIS layer. In implementing the network card test program, though the utilization of an additionally written EFI pseudo program as a medium of transmitting data for the network card testing program, and also though the utilization of an additionally written intermediate filter driver in invoking a driver suitable for the network card, the hardware testing of network card can be realized, thus increasing the category and scope of the network card testing supported by an EFI system.Type: GrantFiled: October 24, 2007Date of Patent: March 15, 2011Assignee: Inventec CorporationInventors: Zhi Wang, Tom Chen, Win-Harn Liu
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Publication number: 20110060949Abstract: A communications system and method for testing components of an aircraft via Ethernet. The communications system may comprise one or more Ethernet links having software and hardware controls for timing, buffering, and messaging, and a dedicated Ethernet line. The Ethernet links may be configured to communicably link sections of a central communication system of the aircraft, each section being part of a separate aircraft component. The Ethernet links may also communicably link the sections with various databases over the Ethernet line. The databases may comprise loadable software, archived testing data, configuration data, and/or diagnostic data. Any of the central communication system sections and the databases may be located at geographically distant locations from each other, such as at separate production sites. The communications system may allow the aircraft components to test each other, or essentially for the aircraft to test itself prior to its components being physically joined together.Type: ApplicationFiled: September 4, 2009Publication date: March 10, 2011Applicant: SPIRIT AEROSYSTEMS, INC.Inventor: Mark Kenyon Venskus
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Patent number: 7895471Abstract: A mechanism for isolating failures in a digital system is provided. In one embodiment, a fault table is defined for each unit in the system. Related faults are ordered within the table to reflect the time-order in which the faults would be activated during operation of the associated unit. When multiple related faults are reported for a given unit in the system, the fault that is first located when a linear search of the corresponding fault table is conducted is considered the source of the failure within the unit. If faults are reported for multiple units, the source of the failure for the system is identified using at least one of primary and second priority values assigned to the faults, timestamps obtained when the faults are reported, and an order in which the faults are logged.Type: GrantFiled: April 28, 2009Date of Patent: February 22, 2011Assignee: Unisys CorporationInventors: Lewis A. Boone, Thomas J. Menart, John A. Miller, Brett W. Tucker
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Patent number: 7890812Abstract: A computer system includes a plurality of buses; a device connected with the plurality of buses and configured to generate an error message when a failure has occurred on a first bus of the plurality of buses; and an IO control circuit connected with the device and configured to close the first bus in response to the error message transaction. The device includes a plurality of bus control sections respectively connected with said plurality of buses. The IO control circuit transfer a first operation transaction to the first bus through a first bus control section, and closes the first bus in response to the error message transaction in a bus failure operation when the failure has occurred on the first bus.Type: GrantFiled: July 13, 2007Date of Patent: February 15, 2011Assignee: NEC Computertechno. Ltd.Inventor: Takayuki Kitahara
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Patent number: 7886197Abstract: A device protection system for a device that operates using a replaceable component provided with a replaceable component, component monitor, and a means for disabling the replaceable component. The component monitor is provided with a storage unit, a sensing unit, a determination unit and a control unit that engages a disabling device for rendering the replaceable component inoperable in, or incompatible with, a device within which the replaceable component is intended to operate such as, an image forming device. In particular, the component monitors the temperature of an environment relating to the replaceable component that if exceeded, will affect performance of the replaceable component. The component will disable the disabling unit to protect the device.Type: GrantFiled: June 14, 2007Date of Patent: February 8, 2011Assignee: Xerox CorporationInventor: Paul Wegman
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Patent number: 7882042Abstract: Embodiments herein provide for the automated printing of a shipping label as part of the software/memory of the customer replaceable unit (CRU). Such printing is controlled by information carried in the module itself. Thus, the embodiments work with exhaustible modules that include their own memory and potentially include their own module processor (that are contained within the exhaustible module and are separate from the memory and processor of the printing device).Type: GrantFiled: November 9, 2007Date of Patent: February 1, 2011Assignee: Xerox CorporationInventors: F. Bruce Meyer, Heiko Rommelmann
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Patent number: 7877643Abstract: A method, system, and computer program product in a logical partitioned data processing system are disclosed for providing a host bridge that implements extended error handling (EEH). If all devices coupled to the host bridge implement EEH, the host bridge is initialized to operate in EEH mode. In EEH mode, the devices handle any error that occurs within the devices without reporting the error to the host bridge. All partitions that share the host bridge continue to operate without being terminated while the devices are handling the error. If at least one device does not implement EEH, the host bridge is initialized to operate in non-EEH mode. In non-EEH mode, a machine check is generated by the host bridge when an error occurs within one of the devices resulting in the termination of all partitions that share the host bridge in response to a receipt of the machine check.Type: GrantFiled: June 23, 2008Date of Patent: January 25, 2011Assignee: International Business Machines CorporationInventors: Ashwini Kulkarni, Douglas Wayne Oliver, Steven Vongvibool, David R. Willoughby
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Patent number: 7870426Abstract: The invention provides an apparatus, system, and method for cluster-wide peer recovery in the event of a computer failure. A failure of a first computer is detected and a recovery module is registered as the first computer. In one embodiment, the recovery module is a peer computer. The recovery module retrieves a privately held undo log data through the authorized assumption of the failure identity associated with the failed first computer, backs out in-flight transaction updates of the first computer, and frees up data resources locked by the first computer.Type: GrantFiled: September 20, 2007Date of Patent: January 11, 2011Assignee: International Business Machines CorporationInventors: Ronald Edward Bretschneider, Marc Kenneth Duquette, Michelle Parks Dais, legal representative, William Stuart Edwards, Ruth Leslie Ferziger, Peter Verl Gibson, Lyle LeRoy Merithew, Jr.
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Patent number: 7859688Abstract: An object of the present invention is to provide a command data conversion device and printing apparatus that can correctly interpret print command data even where the codes or the parameter codes assigned to the commands in the print command data change, or where the data output sequence changes. Using the present invention, print command data including commands used in print control as well as associated data are received, and the contents thereof are interpreted. Multiple commands are rewritably stored in command registers in advance, and if a command included in the print command data matches any of the stored multiple commands, prescribed processing is carried out to at least one of either the command or its associated data.Type: GrantFiled: January 23, 2007Date of Patent: December 28, 2010Assignee: Seiko Epson CorporationInventor: Junya Yada
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Patent number: 7861124Abstract: Provided are a method and apparatus for performing diagnostic functions of an external device such as a printer, connected to a host computer. The apparatus and method receive information about diagnostic functions supported by the external device from the external device; receive one or more of the diagnostic functions which are selected by a user; request the external device to perform the selected diagnostic functions; and receive the results of the requested diagnostic functions from the external device.Type: GrantFiled: August 31, 2005Date of Patent: December 28, 2010Assignee: Samsung Electronics Co., Ltd.Inventor: Jae-kyung Cho
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Patent number: 7836352Abstract: A method and apparatus is described herein for tracking errors for one of a plurality of lanes in a link, tracking errors for the link, and in the case of a root complex, tracking error correction messages. This information is used to determine the suitability for use of a lane and to determine if correction action is needed. In one embodiment, this method and apparatus is used with PCI Express interconnects.Type: GrantFiled: June 30, 2006Date of Patent: November 16, 2010Assignee: Intel CorporationInventors: Debendra Das Sharma, Surena Neshvad, Guru Rajamani, Hanh Hoang
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Patent number: 7823015Abstract: Disclosed is a full error description for a technical system which is described by a system description which can be processed by a computer and stored. The system description contains information on elements available in system and information on the links therebetween. An element error description is determined for each element taken into consideration, using a stored error description which is respectively associated with a reference element. At least one part of the reference elements is grouped into a reference element group and a group error description is determined for the reference elements of a reference element group using a stored group error description which is respectively associated with a reference element group, enabling possible errors of the reference elements of the reference element group to be described. A full error description is determined from the element error descriptions and the group error descriptions, taking into account information on element links.Type: GrantFiled: January 28, 2002Date of Patent: October 26, 2010Assignee: Siemens AktiengesellschaftInventors: Peter Liggesmeyer, Manfred Lohner, Oliver Mäckel, Martin Rothfelder
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Publication number: 20100268994Abstract: An automatic keyboard testing system includes a computer, an automatic testing program and a testing frame. A keyboard circuit board to be tested in placed on the testing frame. The automatic testing program is installed in the computer for generating a testing signal and has a predetermined time period. The testing frame generates a simulating signal according to the testing signal and conducts a key intersection point corresponding to the simulating signal, so that the keyboard circuit board output a key scanning code corresponding to the conducted key intersection point to the computer. The automatic testing program discriminates whether the key scanning code is transmitted to the computer within the predetermined time period.Type: ApplicationFiled: May 21, 2009Publication date: October 21, 2010Applicant: PRIMAX ELECTRONICS LTD.Inventor: Pei-Ming Chang
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Patent number: 7817293Abstract: A printer system stores a trace of a printer job in storage that is either local or accessible to the printer system. A remotely implemented tool accesses the stored printer job trace. The tool includes a graphical interface that displays the printer commands in the printer job trace in a human readable format. The commands may be displayed in a first window of the interface. In one embodiment, the interface includes a second window where details of a command selected or highlighted in the first window are displayed. The tool may be implemented as a secure web browser that requires password verification to access the printer job trace. The tool may include the ability to replace confidential print data with generic or non-confidential data. The tool might further be able to display text that is embedded in a printer job trace command in ASCII and EBCDIC format.Type: GrantFiled: January 7, 2005Date of Patent: October 19, 2010Assignee: Infoprint Solutions Company, LLCInventors: Erin Ann Boyd, Allyn Hugh Nay, Stephen Goddard Price
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Patent number: 7809983Abstract: One or more switches are interposed between a controller portion and a storage device. When transmission of a command to a certain storage device fails, a command is transmitted starting from an upstream side to a downstream side of a path between the controller portion and the switch to which the certain storage device is connected, and when command transmission fails while transmitting a command from a kth switch (k is an integer of 0 or more) which is connected to a (k+1)th switch and is one level upstream of the (k+1)th switch or from any port of the controller portion, it is determined that a failure has occurred in a power source that supplies power to the (k+1)th switch.Type: GrantFiled: February 4, 2008Date of Patent: October 5, 2010Assignee: Hitachi, Ltd.Inventors: Hiroshi Suzuki, Tsutomu Koga, Tetsuya Inoue, Tomokazu Yokoyama, Kenji Jin
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Patent number: 7809977Abstract: An I/O device management table that manages the types of I/O devices connected to an I/O switch is provided, and one or plural unallocated I/O devices are defined and registered as standby I/O devices. When a failure occurs in any of I/O devices, the I/O device management table is used to select an I/O device of the same type as the failed I/O device from the standby I/O devices, and the selected I/O device is allocated to a computer to which the failed I/O device is connected. I/O device management can be eased at failure in a computer including an I/O switch device.Type: GrantFiled: September 20, 2007Date of Patent: October 5, 2010Assignee: Hitachi, Ltd.Inventor: Yoshifumi Takamoto
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Patent number: 7797584Abstract: A serial advanced technology attachment (SATA) interface tester includes a memory, a signal converter, at least one SATA interface, and an indicator. The at least one SATA interface is adapted to connect with SATA interfaces of a motherboard, and is electrically connected to the memory via the signal converter. The signal converter receives serial signals from the motherboard via the at least one SATA interface and converts them to parallel signals and then passes the parallel signals to the memory to perform a writing process. The signal converter receives parallel signals from the memory and converts them to serial signals and passes the serial signals to the motherboard via the at least one SATA interface to perform a reading process. The indicator is electrically connected to the memory for indicating testing result of the SATA interfaces of the motherboard.Type: GrantFiled: August 10, 2007Date of Patent: September 14, 2010Assignee: Hon Hai Precision Industry Co., Ltd.Inventors: Ming-Chih Hsieh, Kuang-Lung Ko
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Patent number: 7793159Abstract: In a tape recording apparatus having a write head and a read head, a data block is stored by writing to a tape via the write head. The tape moves past the write head in a predetermined direction and writes a first data block responsive to transmitting the first data block from the computer system. The read head then reads the written data block from the tape. For reading, the tape moves past the read head in the same, predetermined direction as the writing, and the reading of the first data block occurs without reversing the tape movement after the writing of the first data block. Portions of the transmitted and read data blocks are compared and a corruption indication is sent responsive to the comparing.Type: GrantFiled: June 28, 2007Date of Patent: September 7, 2010Assignee: International Business Machines CorporationInventor: Holger Martens
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Patent number: 7783931Abstract: An enterprise network interface client application and a local, central electronic complex (CEC) in a dual CEC environment implement an alternative method of communication. Upon a send failure of a command to a first CEC in the environment, the command is sent to a second CEC using a CEC to CEC message mechanism. A method of communicating an asynchronous event is implemented between a microcode layer and an enterprise network interface client application in a dual central electronic complex (CEC) environment. A copy of the event is retained. Upon a send failure of the event to a first CEC in the environment, the copy of the event is sent to a second CEC in the environment.Type: GrantFiled: May 4, 2007Date of Patent: August 24, 2010Assignee: International Business Machines CorporationInventors: Juan A. Coronado, Veronica S. Davila, Jack N. Licano, Jr., Brian S. McCain, Beth A. Peterson
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Patent number: 7779293Abstract: A system controlling apparatus includes a renewal detecting unit that acquires FWD data from an FWD of an operations system core I/O device bridge and stores the acquired FWD data in an FWD data storing unit. If an operations system core I/O device bridge fails, an FWD data copy processing unit copies the FWD data to an FWD of a standby system core I/O device bridge; and a system is rebooted after an operations bridge switchover processing unit switches OFF the operations system core I/O device bridge and switches ON the standby system core I/O device bridge.Type: GrantFiled: November 30, 2004Date of Patent: August 17, 2010Assignee: Fujitsu LimitedInventor: Shuei Hatamori
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Patent number: 7774656Abstract: Provided are a method, system, and program for handling a fabric failure. A module intercepts a signal indicating a failure of a path in a fabric providing a connection to a shared device. The module generates an interrupt to a device driver in an operating system providing an interface to the shared device that is inaccessible due to the path failure. The device driver requests information from the module on a status of a plurality of devices that are not accessible due to the path failure and receives information indicating the inaccessible device. The device driver reconfigures to discontinue use of the inaccessible device.Type: GrantFiled: January 7, 2009Date of Patent: August 10, 2010Assignee: International Business Machines CorporationInventors: Yu-Cheng Hsu, John Norbert McCauley, William Griswold Sherman, Cheng-Chung Song
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Patent number: 7774642Abstract: A fault zone definition mechanism groups components of an interconnect environment having a common point of dependence into a logical group defining a fault zone for the interconnect environment. The fault zone definition mechanism may be implemented in software, firmware or hardware, or a combination of two or more of software, firmware and hardware. A method for defining a fault zone is also disclosed.Type: GrantFiled: February 17, 2005Date of Patent: August 10, 2010Assignee: Oracle America, Inc.Inventors: Bjørn Dag Johnsen, David M. Brean, Srinivas Madhur, Julia D. Harper
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Patent number: 7774655Abstract: Systems and methods for analyzing time series data are disclosed. A query including a machine variable identifier may be received. The machine variable identifier may include an identifier pertaining to one or more of a state, a condition and a performance measure for a printer. A first time series data entry may be determined based on the query. The first time series data entry may include a data value and a time entry for the machine variable identifier. One or more second time series data entries may be selected based on the data value associated with the first time series data entry. One or more maintenance operations may be performed based on the one or more second time series data entries.Type: GrantFiled: March 16, 2007Date of Patent: August 10, 2010Assignee: Xerox CorporationInventors: Sankar Virdhagriswaran, John C. Handley
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Patent number: 7770071Abstract: One aspect can include determining that at least one mote device is operating outside normal operational parameters and should be serviced, and determining at least partially using the at least one mote device that is operationally located within a mote network is not meeting a goal of the at least one mote device with respect to the mote network and should be serviced. Another aspect can include determining that at least one mote device should undergo routine servicing and configuring the at least one mote device to indicate the at least one mote device should undergo the routine servicing.Type: GrantFiled: October 19, 2005Date of Patent: August 3, 2010Assignee: The Invention Science Fund I, IncInventors: Edward K. Y. Jung, Royce A. Levien, Robert W. Lord, Mark A. Malamud, John D. Rinaldo, Jr.
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Patent number: 7770066Abstract: A method for testing a USB (universal serial bus) device includes receiving a USB packet trace output from a USB host, at a USB packet trace converting apparatus, generating at least one token corresponding to the USB packet trace received from the USB host, determining a syntax tree corresponding to the at least one token, and generating a code for a USB host model corresponding to the determined syntax tree.Type: GrantFiled: July 23, 2007Date of Patent: August 3, 2010Assignee: Samsung Electronics Co., Ltd.Inventor: Kui-Yon Mun
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Patent number: 7761753Abstract: Memory apparatus and methods utilizing multiple bit lanes may redirect one or more signals on the bit lanes. A memory agent may include a redrive circuit having a plurality of bit lanes, a memory device or interface, and a fail-over circuit coupled between the plurality of bit lanes and the memory device or interface.Type: GrantFiled: June 9, 2008Date of Patent: July 20, 2010Assignee: Intel CorporationInventors: Pete D. Vogt, Dennis W. Brzezinski, Warren R. Morrow
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Patent number: 7757014Abstract: The present invention relates to a method for disconnecting a transceiver from a bus in multipoint/multidrop architecture. A central processing unit (CPU) and a universal asynchronous receiver transmitter (UART) in a system are connected to a controller used for storing and transmitting data, and the controller is further connected with a bus through a transceiver that monitors/records data and a relay that connects or disconnects the transceiver from the bus. The controller comprises a signal comparator used to compare similarities and differences of data and a failure detection controller used to achieve connection or disconnection of the bus with the transceiver. In case of the transceiver's failure, the controller disconnects the transceiver from the bus to ensure that the bus does not fail to work due to breakdown of the transceiver.Type: GrantFiled: May 14, 2008Date of Patent: July 13, 2010Inventors: Tsung-Hsien Ho, Chun-Te Yu
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Patent number: 7747809Abstract: A PCI Express system comprising: a PCI Express adapter; and a PCI Express root complex coupled to the PCI Express adapter, the PCI root complex including: a protocol stack coupled to the PCI express adapter and configured to transmit information to and receive information from the PCI express adapter; an application specific logic module; and a fencing module coupled between the application specific logic module and the protocol stack and configured to, when in operation, block all signals from the application specific logic module from reaching the protocol stack.Type: GrantFiled: February 19, 2008Date of Patent: June 29, 2010Assignee: International Business Machines CorporationInventor: Jeffrey C. Hanscom
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Publication number: 20100162050Abstract: A fault replay system uploads part or all of a log file from a subject system and replays the events detailed within the log file upon physical copies of devices present in the subject system. The replay of the log file events aid the determination of at which event a fault occurred and improves the accuracy of fault determination.Type: ApplicationFiled: December 19, 2008Publication date: June 24, 2010Inventor: Ian A. Cathro