Peripheral Device Component Fault Patents (Class 714/44)
  • Patent number: 7730360
    Abstract: There is provided a method of communicating diagnostic information between a Universal Serial Bus (USB) host and a USB device, the USB host including a host USB controller, a main driver and a host main application. The method comprises establishing a data pipe in a data class interface between the USB host and the USB device for data communication; establishing a diagnostic information pipe in the data class interface between the USB host and the USB device for diagnostic information communication; monitoring the data class interface between the host USB controller and the main driver using a filter driver; intercepting the diagnostic information in the diagnostic information pipe of the data class interface using the filter driver; directing the diagnostic information intercepted by the filter driver to a host diagnostics application; and directing the data in the data pipe of the data class interface to the main driver.
    Type: Grant
    Filed: December 29, 2006
    Date of Patent: June 1, 2010
    Assignee: Conexant Systems, Inc.
    Inventor: Eddie Wai
  • Patent number: 7730361
    Abstract: A method of aggregating events in a PCIe (Peripheral Component Interconnect Express) multifunction device minimizes reported error messages, where several functions share a common PCIe interface logic. A predetermined number of function entities with logical gates, connected in daisy chain configuration, process incoming information, and a decision is made whether each function entity will generate a blocking control or a pass-through control. The error messages are aggregated across the function entities in a single clock cycle with the help of an error controller. The functions can be from IEEE 1394 interface, graphics display controller, sound card, PCIe switch, or PCIe to PCI bridge connection. Each function preferably has a different configuration and security level setting for error reporting and messaging.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: June 1, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Sumit Sadhan Das, Roy D. Wojciechowski
  • Patent number: 7725775
    Abstract: A network system comprises a printing device, and a plurality of management devices that manages the printing device via a network. The printing device comprises a plurality of communication interfaces individually connected to the network, a trouble detecting system that detects troubles caused in the printing device, a trouble notification management information storing system that stores trouble notification management information representing a relationship among information on a management device to be notified of a trouble, information on a communication interface used by the management device, and information on a method of delivering trouble notifying information, and a trouble notifying system that delivers the trouble notifying information to the management device in a corresponding method via a corresponding communication interface by reference to the trouble notification management information.
    Type: Grant
    Filed: September 20, 2006
    Date of Patent: May 25, 2010
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventor: Ryosuke Tsuzuki
  • Patent number: 7716543
    Abstract: A method and system for testing a modular data-processing component. Register information associated with a modular data-processing component to be tested at a test location can be identified and stored. The modular data-processing component can then be tested and removed from said test location. Thereafter, the register information can be retrieved and provided for use with testing of a new data-processing component at said test location without losing said register information during testing of multiple modular data-processing components. The register information can be, for example, PCI configuration data and the modular data-processing component can be an HAB.
    Type: Grant
    Filed: November 2, 2005
    Date of Patent: May 11, 2010
    Assignee: LSI Corporation
    Inventors: Keith Grimes, Todd Jeffrey Egbert, Edmund Paul Fehrman
  • Patent number: 7694187
    Abstract: A method of implementing a circumvention and recovery system comprising conveying peripheral identifiers to a controller, and determining a level of susceptibility of a peripheral to select events based on the peripheral identifier. The method further includes controlling each peripheral based on the level of susceptibility of the peripheral during detection of a select event.
    Type: Grant
    Filed: February 7, 2007
    Date of Patent: April 6, 2010
    Assignee: Honeywell International Inc.
    Inventors: Keith A. Souders, Jamal Haque, James E. Lafferty, Edward R. Prado
  • Patent number: 7694179
    Abstract: A statistically added point calculation unit of the present invention statistically adds a point to a part related to a content of an anomaly in error information received by an error information receiving unit, and sets the added point in an added point table. A suspected place identifying unit refers to the added point table, and if the statistically added point of a target of determination has exceeded a threshold, the suspected place identifying unit identifies the target of the determination as a suspected place. If the configuration information table is referred to and a target of this process is a maintenance part at the suspected place, the suspected place identifying unit compares an initial value, for example, by means of the threshold which has been doubled. Furthermore, the suspected place identifying unit identifies a part having the statistically added point which is the next highest, as a second suspected place. A part isolation processing unit isolates the part at the suspected place.
    Type: Grant
    Filed: July 25, 2006
    Date of Patent: April 6, 2010
    Assignee: Fujitsu Limited
    Inventors: Hiroaki Sato, Koji Yamaguchi
  • Patent number: 7685473
    Abstract: A computer system includes a processor that executes a device driver, and a bus controller that controls an input/output bus that connects a plurality of input/output devices. The bus controller includes a stall detector that detects a stall state of the input/output bus and an error reply generator that transmits an error reply to the processor regarding a transaction transmitted to the input/output bus where the stall state is detected.
    Type: Grant
    Filed: December 8, 2005
    Date of Patent: March 23, 2010
    Assignee: NEC Corporation
    Inventor: Hiroaki Oshida
  • Patent number: 7676694
    Abstract: System components are managed. Based on a first communication path to a component, first identification information for the component is determined. Based on a second communication path to the component, second identification information for the component is determined. Based on the first identification information and the second identification information, an identity for the component is determined. Based on the identity, a set of tests is performed on the component. Based on the failure rate of the set of tests, it is concluded that another component on the first communication path is faulty.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: March 9, 2010
    Assignee: EMC Corporation
    Inventors: Douglas Sullivan, Keith A. Morrissette, Steven D. Sardella
  • Patent number: 7673186
    Abstract: Power supply voltage of a PCI or a similar communication bus interface is separated from one or more other power supply voltages on a backplane, on boards insertable into the backplane, and on the bus interface components of the boards. The power supply of the bus interface (VIO) is provided to cold spare boards inserted into the backplane, while the other voltages are not provided to the cold spare boards. Availability of the VIO on the cold spare boards prevents the VIO clamping diodes on the PCI I/O lines from grounding the PCI bus. Cold spare capability is thus provided to systems with PCI and similar communication buses.
    Type: Grant
    Filed: June 7, 2006
    Date of Patent: March 2, 2010
    Assignee: Maxwell Technologies, Inc.
    Inventor: Robert Allen Hillman
  • Patent number: 7669084
    Abstract: A method, apparatus, and computer instructions for self-diagnosing remote I/O enclosures with enhanced FRU callouts. when a failure is detected on a RIO drawer, a data processing system uses the bulk power controller to provide an alternate path, rather than using the existing RIO links, to access registers on the I/O drawers. The system logs onto the bulk power controller, which provides a communications path between the data processing system and the RIO drawer. The communications path allows the data processing system to read all of the registers on the I/O drawer. The register information in the I/O drawer is then analyzed to diagnose the I/O failure. Based on the register information, the data processing system identifies a field replacement unit to repair the I/O failure.
    Type: Grant
    Filed: October 8, 2008
    Date of Patent: February 23, 2010
    Assignee: International Business Machines Corporation
    Inventors: Mike C. Duron, Mark D. McLaughlin
  • Patent number: 7661187
    Abstract: The present invention relates to providing the manufacturing method for a magnetic disk drive that includes the process steps of detecting and processing in a simplified way the defective sectors causing a reading error at low operating environmental temperatures. In one example, defective sectors are detected by read/write testing at high operating environmental temperatures from, for example, 40° C. to 65° C. Reading the data written on the defective sectors makes it obvious that the gain in a high-frequency band is reduced. After test data has been written onto each sector, the filtering coefficient of an FIR element that is set for a data-reading system is changed from the optimum value. The frequency gain is thus reduced. Next, the test data is read and the sectors that have caused a reading error are registered as defectives.
    Type: Grant
    Filed: December 5, 2005
    Date of Patent: February 16, 2010
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Masato Taniguchi, Michio Nakajima, Kaoru Umemura
  • Patent number: 7664996
    Abstract: A visible diagnostic component for an electronic device having a form factor is described. The electronic component comprises a hardware interface component and a processor. The hardware interface component is configured to physically interface with a computer hardware interface associated with a computing device having an operating system. The processor is configured to perform a first operation that tests the communications with a device driver that is related to the electronic device. The first operation generates a first signal that indicates the result of the first operation. The second operation performed by the processor tests the communications between the wireless device and the operating system of the computing device. The second operation is configured to generate a second signal that indicates the result of the second operation.
    Type: Grant
    Filed: January 19, 2007
    Date of Patent: February 16, 2010
    Assignee: Kyocera Corporation
    Inventors: Kotaro Matsuo, Won Sik Kim, Eugene Chekal, Haribalaji Kumar
  • Patent number: 7664993
    Abstract: Systems and methods are described for implementing automation of testing in remote sessions. In an implementation, a test agent is deployed at a remote server to automate testing of various components in a remote session between the remote server and a remote client. The test agent enables automation, synchronization and monitoring of test commands between the remote client and the remote server. The test agent communicates with test applications deployed at the remote client to test the components in the remote session.
    Type: Grant
    Filed: February 27, 2007
    Date of Patent: February 16, 2010
    Assignee: Microsoft Corporation
    Inventors: Mahadeva Alladi, Thirunavukkarasu Elangovan
  • Patent number: 7660915
    Abstract: A process control system is provided having a plurality of I/O devices in communication using a bus. A primary redundant I/O device and a secondary redundant I/O device are coupled to the bus, where the secondary redundant I/O device is programmed to detect a primary redundant I/O device fault. The secondary redundant I/O device, upon detecting the primary redundant I/O device fault, publishes a primary redundant I/O device fault message on the bus. The controller may deactivate the primary redundant I/O device and activate the secondary redundant I/O device responsive to the primary redundant I/O device fault message.
    Type: Grant
    Filed: March 19, 2008
    Date of Patent: February 9, 2010
    Assignee: Fisher-Rosemount Systems, Inc.
    Inventors: Michael D. Apel, Steven L. Dienstbier
  • Patent number: 7650553
    Abstract: An interface test can be performed by, for example, only a self apparatus when interface operation specifications are different between the self apparatus and an original connection partner apparatus. An LSI has a plurality of interfaces (IFs) for transmission/reception of data with an external device, and the LSI includes an emulation control unit for allowing one of the two of the plurality of IFs to perform an operation of emulating an IF of a connection partner device having operation specifications different from those of the LSI, when two IFs are connected to each other via a transmission line.
    Type: Grant
    Filed: December 29, 2005
    Date of Patent: January 19, 2010
    Assignee: Fujitsu Microelectronics Limited
    Inventor: Kazufumi Komura
  • Patent number: 7647534
    Abstract: A method for assisting a user to connect a problem with a device, such as a printer includes extracting, from records comprising user actions on the device, string of user actions on the device. The string of user action is compared with at least one predetermined sequence of user actions for correction of predefined problem with the device. Based on the comparison, an evaluation is made as to whether at least one prior user has attempted the predetermined sequence and, if so, a procedure is implemented to avoid a user repeating the prior attempt.
    Type: Grant
    Filed: March 17, 2006
    Date of Patent: January 12, 2010
    Assignee: Xerox Corporation
    Inventors: Stefania Castellani, Nicola Cancedda, Maria Antonietta Grasso, Jacki O'Neill
  • Patent number: 7647531
    Abstract: Having detected an anomalous fault in a peripheral I/O slot, a processor entity may need to perform some remedial action, wherein the peripheral slot may have a fault line. First a voltage may be detected on the slot. Processor entity may set a fault if a voltage is found. A hotplug controller which may provide outputs that the processing entity may store as a fault syndrome word. The service processor or operating system, either during initial program load, or at another time, may detect that the fault could be a false fault depending on a set of predefined conditions and following the mechanism described here can then clear the fault earlier set. If an action from a previous device list is set, then there may be a clearing of the voltage fault based on determining that the action is set.
    Type: Grant
    Filed: June 18, 2008
    Date of Patent: January 12, 2010
    Assignee: International Business Machines Corporation
    Inventors: John Daniel Upton, Madeline Vega
  • Publication number: 20100005343
    Abstract: The peripheral device of the present invention is connected to a computer 200 through an interface cable 3, and is provided with a second memory device 13 for storing an evaluation program for 22 for evaluating the peripheral device 100 and its integrated circuit 400, a detection section 10 for detecting whether the mode indicating signal which is transmitted from the computer 200 indicates the test mode or the normal mode, and a starting means 15 which starts the evaluation program 22 on the second memory device 13 when the detection section 10 has detected that the mode indicating signal has shown the test mode. Thereby, the failure analysis of the peripheral device and its integrated circuit can be carried out in a state where the integrated circuit is mounted on the peripheral device.
    Type: Application
    Filed: August 3, 2007
    Publication date: January 7, 2010
    Inventor: Kazushi Yamamoto
  • Patent number: 7644304
    Abstract: Certain ones of a plurality of SAS hard disk drives are assigned to different SAS zones using a SAS zoning expander(s). A processor and SAS RAID controller have access to only those SAS hard disk drives assigned to the same zone(s) as the processor and SAS RAID controller. Each SAS RAID controller determines when a RAID hard disk drive in its zone fails, and then notifies the RAID hard disk drive failure to a service enclosure processor (SEP) of the SAS zoning expander. The SEP re-allocates an available hot-spare hard disk drive to the zone of the failed RAID hard disk drive. When the SAS RAID controller detects that a functional hard disk drive is now available in its zone, the RAID image is rebuilt using the zone reassigned hot-spare hard disk drive that then becomes one of the RAID hard disk drives of that zone.
    Type: Grant
    Filed: August 28, 2006
    Date of Patent: January 5, 2010
    Assignee: Dell Products L.P.
    Inventors: Gary B. Kotzur, Kevin Marks
  • Patent number: 7644309
    Abstract: The invention relates to a recovery of a hardware module of an electronic device from a malfunction state. The hardware module is connected via a signal line to a recovery component of the device, a state of the signal line being controlled by the hardware module. The recovery component monitors a state of the signal line. Whenever the signal line is detected not to assume a predetermined state during a predetermined period of time, the recovery component causes a hardware reset of the hardware module.
    Type: Grant
    Filed: May 20, 2005
    Date of Patent: January 5, 2010
    Assignee: Nokia Corporation
    Inventors: Juha Nurmi, Kaj Saarinen
  • Patent number: 7631226
    Abstract: The present invention provides a PCI bus controller to prevent system down caused by a PCI bus fault and to enable a PCI device driver to handle all PCI bus faults. A bus signal controlling portion controls a transaction with a PCI device on a PCI bus according to a PCI bus protocol, treats the PCI bus as in a degradation state by lighting up a bus fault indicator when a bus fault is detected, and accepts a request of instructing the PCI device. A configuration portion has the bus fault indicator, updates a configuration register, and sends a reply transaction to an inbound controller portion. An arbitration portion arbitrates for a PCI bus and masks a request of use a bus from PCI device when the bus is in a degradation state.
    Type: Grant
    Filed: January 13, 2005
    Date of Patent: December 8, 2009
    Assignee: NEC Corporation
    Inventor: Toshio Oohira
  • Patent number: 7617426
    Abstract: A method for verifying whether a recording/reproducing apparatus properly produces disc management information and records the disc management information on a disc includes preparing a test disc; issuing reading commands to a recording/reproducing apparatus to be tested on which the test disc is loaded and verifying the disc in order to verify the reading operation; and issuing recording commands to the recording/reproducing apparatus to be tested on which the test disc is loaded and checking whether a temporary disc management area (TDMA) structure is properly updated on the disc in order to verify the modification operation.
    Type: Grant
    Filed: December 22, 2006
    Date of Patent: November 10, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-hee Hwang, Hyo-jin Sung, Sung-ryeul Rhyu, Jung-wan Ko
  • Patent number: 7613949
    Abstract: A mechanism for isolating failures in a digital system is provided. In one embodiment, a fault table is defined for each unit in the system. Related faults are ordered within the table to reflect the time-order in which the faults would be activated during operation of the associated unit. When multiple related faults are reported for a given unit in the system, the fault that is first located when a linear search of the corresponding fault table is conducted is considered the source of the failure within the unit. If faults are reported for multiple units, the source of the failure for the system is identified using at least one of primary and second priority values assigned to the faults, timestamps obtained when the faults are reported, and an order in which the faults are logged.
    Type: Grant
    Filed: July 21, 2006
    Date of Patent: November 3, 2009
    Inventors: Lewis A. Boone, Thomas J. Menart, John A. Miller, Brett W. Tucker
  • Patent number: 7600158
    Abstract: An electronic apparatus includes a memory for rewritably storing data and a processor for performing an operation of rewriting the data in the memory in response to a rewrite instruction signal. The processor checks each predetermined unit of data for rewriting received in response to the rewrite instruction signal to perform a rewriting operation for each predetermined unit and checks the amount of rewritten data to perform a data rewriting operation.
    Type: Grant
    Filed: August 23, 2004
    Date of Patent: October 6, 2009
    Assignee: Canon Kabushiki Kaisha
    Inventor: Akihiro Nakamura
  • Patent number: 7596724
    Abstract: A mechanism to obtain a quiescence state for a component coupled to a bidirectional communications interface is obtained. A transition to quiescence may be may by activating a first defeature in the component to cause messages received over a communication bus coupled between the component and another component to be ignored, and activating a second defeature in the component to prevent messages from being sent over the communication bus by the component. Operations may then be performed on the component while the defeatures are activated.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: September 29, 2009
    Assignee: Intel Corporation
    Inventor: Kyle Markley
  • Patent number: 7594144
    Abstract: Methods and apparatus are disclosed for handling fatal computer hardware errors on a computer that include halting data processing operations of the computer upon occurrence of a fatal hardware error; signaling by a source chip of a chipset to the programmable logic device the occurrence of a fatal hardware error; signaling by the programmable logic device to an embedded system microcontroller the occurrence of a fatal hardware error; reading by the embedded system microcontroller through at least one sideband bus from registers in chips of the chipset information regarding the cause of the fatal hardware error; and storing by the embedded system microcontroller the information in non-volatile random access memory of the embedded system microcontroller.
    Type: Grant
    Filed: August 14, 2006
    Date of Patent: September 22, 2009
    Assignee: International Business Machines Corporation
    Inventors: Mark A. Brandyberry, Shiva R. Dasari, Daniel E. Hurlimann, Bruce J. Wilkie, Lee H. Wilson, Christopher L. Wood
  • Patent number: 7594145
    Abstract: In one embodiment, a method for improving performance of a processor having a defective cache includes accessing first object code and generating second object code from the first object code. The generation of the second object code takes into account one or more locations of one or more defects in a cache on a processor such that one or more instructions in the second object code are written only to nondefective locations in the cache.
    Type: Grant
    Filed: May 31, 2006
    Date of Patent: September 22, 2009
    Assignee: Fujitsu Limited
    Inventors: Tohru Ishihara, Farzan Fallah
  • Patent number: 7587523
    Abstract: The master/slave arbitration process includes a voting process that allows cards within the system to use voting to determine the health of each of the individual cards. The voting process thereby allows the system to determine whether a bad card is present and to make sure that a bad card has not been selected to be the master card for the system. By preventing a bad or malfunctioning card from being selected as the master, the systems and methods described herein guard against a system failure that may arise from appointing a malfunctioning card as the master card.
    Type: Grant
    Filed: December 2, 2003
    Date of Patent: September 8, 2009
    Assignee: Cedar Point Communications, Inc.
    Inventors: Paul Miller, Daniel W. English
  • Patent number: 7577864
    Abstract: Provided is a technology for increasing reliability of communication carried out by OSes and application programs operating on logical partitions set on a computer. The computer has multiple logical partitions constructed therein by a control program, the physical interfaces are shared by virtual interfaces respectively set for the multiple logical partitions, and the memory module stores management information indicating correspondences between the physical interface and the virtual interface.
    Type: Grant
    Filed: September 1, 2006
    Date of Patent: August 18, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhide Horimoto, Toshiomi Moriki, Yuji Tsushima, Takuichi Hoshina
  • Patent number: 7577877
    Abstract: A system includes proxy logic which detects situations which, unless action is taken, would result in undesirable bus behavior. In one embodiment, the target device of a bus cycle includes proxy logic which determines when the target device is unable to respond correctly to a bus cycle. In this situation, the proxy logic blocks a bus signal from being received by the addressed logic in the target device, thereby preventing the target device from responding at all. In another embodiment, proxy logic is located external to the target device and determines when the target device has not responded to a cycle intended for it. When this condition has occurred, the proxy logic responds to the cycle before the bus's subtractive decode agent has a chance to claim the cycle. The proxy logic's response may be to return bogus data or terminate or abort the cycle.
    Type: Grant
    Filed: May 22, 2003
    Date of Patent: August 18, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Theodore F. Emerson, Phyllis L. Bongain, Cesar Buentello, Jennifer C. Kleiman, Doron Chosnek, Robert L. Noonan, David F. Heinrich
  • Patent number: 7565580
    Abstract: Method and system for testing a network device is provided. The system includes, a test program running on a host system that communicates with the network device through a bus functional module; and a test module that includes a packet counter that counts test packets that are received from a buffer and written in a memory of the test module; and an idle timer that counts time that has expired after a last test packet has been received by the memory module of the test module; wherein if the packet counter value exceeds a threshold value then all test packets residing in the memory of the test module are sent for testing network device logic and if the idle timer expires at any given instance, then all the test packets in the memory of the test module are sent for testing network device logic.
    Type: Grant
    Filed: August 10, 2005
    Date of Patent: July 21, 2009
    Assignee: QLOGIC, Corporation
    Inventors: Bradley S. Sonksen, Aklank H. Shah, James M. Hamada, Jr.
  • Patent number: 7562163
    Abstract: A method is disclosed to locate a data storage device disposed in a data storage system. The method selects a target data storage device, identifies a target adapter port in communication with the target data storage device, and determines one or more target addresses, and determines one or more target World Wide Port Names (“WWPNs”). The method selects an enclosure, and a communication pathway disposed in that enclosure, and determines if any storage device ports interconnected with the communication pathway comprise a WWPN that matches any of said target WWPNs. If any storage device ports interconnected with the communication pathway comprise a WWPN that matches any of the target WWPNs, the method then identifies an adapter port in communication with that communication pathway, and determines if that any storage device ports in communication with the identified adapter port have claimed an address that matches a target address.
    Type: Grant
    Filed: August 18, 2006
    Date of Patent: July 14, 2009
    Assignee: International Business Machines Corporation
    Inventors: Paul Nicholas Cashman, Lokesh Mohan Gupta, Michael John Jones, Kenney Nian Gan Giu
  • Patent number: 7555544
    Abstract: A system includes a cluster having a plurality of nodes wherein at least one of the nodes is a candidate node, a plurality of resource groups, a clustering mechanism executing on the cluster configured to activate a first resource group of the plurality of resource groups on the candidate node, and a resource group affinity of the plurality of resource groups, wherein the resource group affinity comprises a unidirectional association between the first resource group of the plurality of resource groups and a second resource group of the plurality of resource groups.
    Type: Grant
    Filed: March 17, 2004
    Date of Patent: June 30, 2009
    Assignee: Sun Microsystems, Inc.
    Inventors: Martin H. Rattner, Nicholas A. Solter
  • Patent number: 7555754
    Abstract: An information collection method for collecting information about an event occurred in a peripheral device, comprising: preparing an e-mail for notifying about the event, sending the e-mail to a server, analyzing the e-mail by the server and collecting information about the event.
    Type: Grant
    Filed: June 14, 2004
    Date of Patent: June 30, 2009
    Assignee: Fuji Xerox Co., Ltd.
    Inventors: Osamu Fujinawa, Katsuya Yamasaki
  • Patent number: 7552362
    Abstract: In a bridge which connects between an expansion bus of a primary system and that of a secondary system, a local error such as an expansion bus error and CPU hang-up which occurs in the secondary system is recognized. The primary system is notified of the local error as a system error.
    Type: Grant
    Filed: August 24, 2006
    Date of Patent: June 23, 2009
    Inventors: Akitomo Fukui, Shunichi Fujise
  • Patent number: 7552371
    Abstract: A method and a system for automatically diagnosing disability of computer peripheral devices are provided. In the method, a set of interrupt configuration data relevant to a disabled PCI peripheral device, including relevant setting values of a hardware IRQ routing, is input and compared with a PCI IRQ routing table pre-stored in a boot control unit. Then, whether errors exist in the current setting values of the relevant control parameters and flags of all the relevant control units are automatically checked. If an incorrect setting value is found, a corresponding diagnosis result message is displayed for informing the user to make a modification. Therefore, users can know the reasons that cause the computer peripheral device to operate abnormally and make the modification quickly and effectively.
    Type: Grant
    Filed: February 15, 2007
    Date of Patent: June 23, 2009
    Assignee: Inventec Corporation
    Inventors: Ying-Chih Lu, Chi-Tsung Chang
  • Patent number: 7549091
    Abstract: In accordance with the present invention a system for detecting transaction errors in a system comprising a plurality of data processing devices using a common system interconnect bus, comprises a node controller operably connected to said system interconnect bus and a plurality of interface agents communicatively coupled to said node controller. Error corresponding to transactions between said interface agents and other processing modules in said system are directed to said node controller; and wherein transaction errors that would not normally be communicated to said system interconnect bus are communicated by said node controller to said system interconnect bus to be available for detection. In an embodiment of the present invention, the interface agents operate in accordance with the hypertransport protocol. A system control and debug unit and a trace cache operably connected to the system bus can be used to diagnose and store errors conditions.
    Type: Grant
    Filed: October 14, 2003
    Date of Patent: June 16, 2009
    Assignee: Broadcom Corporation
    Inventors: Joseph B. Rowlands, Laurent Moll
  • Patent number: 7543190
    Abstract: False positive error warnings associated with hot insertion or removal of a device with an SAS link are filtered by comparing the timing of error warnings with the timing of hot insertion or removal of the device. An SCSI Enclosure Processor monitors physical device presence events through a side band bus, such as an I2C bus interfaced with physical devices. Upon detection of an error associated with the SAS link, an error filter module retrieves time stamped physical device presence events from the SCSI Enclosure Processor, compares the time stamp of the physical device presence event and suppresses the warning if the time stamp falls within a predetermined time of the error.
    Type: Grant
    Filed: June 28, 2006
    Date of Patent: June 2, 2009
    Inventor: Don H. Walker
  • Patent number: 7536596
    Abstract: A method and a system to emulate a mainframe data channel for testing and diagnostics of mainframe peripheral devices and for remote control and configuration of the testing and diagnostics. The system includes an emulator central processing unit communicably attached to at least one of the mainframe peripheral devices. First driver software is resident in the emulator central processing unit to initialize and start an adaptor for at least one mainframe peripheral device. Second channel program software is resident in the emulator central processing unit having commands to the emulator central processing unit and to the mainframe peripheral devices. Third application software is resident in the emulator central processing unit to test and diagnose the mainframe peripheral devices. Fourth software resident in the emulator central processing unit validates remote access to the emulator central processing unit.
    Type: Grant
    Filed: August 25, 2006
    Date of Patent: May 19, 2009
    Inventor: R. Brent Johnson
  • Patent number: 7536608
    Abstract: A method for providing an indication from a network interface controller to a microcontroller is disclosed wherein upon occurrence of a particular condition within the network interface controller, an indication is provided from a reset pin of the network interface controller to the microcontroller unit. Upon receipt of the indication by the microcontroller unit, communications between the network interface controller and the microcontroller unit are inhibited.
    Type: Grant
    Filed: November 2, 2007
    Date of Patent: May 19, 2009
    Assignee: Silicon Laboratories Inc.
    Inventors: Thomas Saroshan David, Randall Kent Sears
  • Patent number: 7526676
    Abstract: A slave device adapted to couple to a master processor and including an error handler and a communication controller. The error handler is configured to detect errors internal to the slave device and, in response to detecting at least one error and independent of the master processor, configured to select an error recovery operation based on the at least one detected error and to initiate and perform the selected error recovery operation. The communication controller is configured to communicate with the master processor according to a master/slave protocol, and configured to maintain the master/slave protocol during performance of the selected error recovery operation by the error handler.
    Type: Grant
    Filed: September 3, 2004
    Date of Patent: April 28, 2009
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Norman C. Chou, Whitney Li
  • Patent number: 7519866
    Abstract: A method utilizes targeted boot diagnostics in connection with a boot operation to automate the handling of hardware failures detected during startup or initialization of a computer. In particular, in response to detection of a failure after initiation of and during performance of a boot operation, a targeted diagnostic operation is initiated on at least one hardware device in the computer in response to detecting the failure, such that after the targeted diagnostic operation is initiated, the boot operation may be completed.
    Type: Grant
    Filed: June 21, 2007
    Date of Patent: April 14, 2009
    Assignee: International Business Machines Corporation
    Inventors: Daniel Morgan Crowell, Matthew Scott Spinler
  • Patent number: 7506214
    Abstract: Method, apparatus, system and computer program product for analyzing and reporting the status of an adapter in a data processing system. The system includes a service application having the capability of providing a variety of service functions to permit data to be captured regarding the status of the adapter, and a communication structure to permit data to be transmitted to and received from the service application. The analyzing and reporting system of the invention facilitates the reporting and diagnosis of adapter problems so that encountered problems can be better understood and more easily corrected.
    Type: Grant
    Filed: April 22, 2004
    Date of Patent: March 17, 2009
    Assignee: International Business Machines Corporation
    Inventors: Debbie Ann Anglin, Howard Neil Anglin
  • Patent number: 7487403
    Abstract: Provided is a method for handling a fabric failure. A module intercepts a signal indicating a failure of a path in a fabric providing a connection to a shared device. The module generates an interrupt to a device driver in an operating system providing an interface to the shared device that is inaccessible due to the path failure. The device driver requests information from the module on a status of a plurality of devices that are not accessible due to the path failure and receives information indicating the inaccessible device. The device driver reconfigures to discontinue use of the inaccessible device.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: February 3, 2009
    Assignee: International Business Machines Corporation
    Inventors: Yu-Cheng Hsu, John Norbert McCauley, William Griswold Sherman, Cheng-Chung Song
  • Patent number: 7484156
    Abstract: An apparatus for automatic testing of a PS/2 interface includes a micro controller unit, a PS/2 port, and a plurality of LEDs. The micro controller unit is coupled with both a data pin and a clock pin of the PS/2 interface. The LEDs coupled to the micro controller unit simulate functions of a keyboard. A related method for testing the PS/2 interface is also provided.
    Type: Grant
    Filed: June 26, 2006
    Date of Patent: January 27, 2009
    Assignees: Hong Fu Jin Precision Industry (Shenzhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Yong-Xing You, Feng-Long He, Yan-Feng Luo, Qian-Sheng Liu
  • Patent number: 7461301
    Abstract: A manner of resolving printer driver incompatibility problems is described. Print data is received from a printer driver. The print data reflects an incompatibility between the application program used to create the print data and the printer driver. Next, updated print data is generated that corrects the incompatibility between an application program and the printer driver. Thereafter, the updated print data is sent to the printer. The electronic document is printable by the printer such that the printed copy does not reflect the incompatibility between an application program and a printer driver.
    Type: Grant
    Filed: March 2, 2006
    Date of Patent: December 2, 2008
    Assignee: Ricoh Company, Ltd.
    Inventor: Zhongming Yu
  • Patent number: 7454657
    Abstract: A method for self-diagnosing remote I/O enclosures with enhanced FRU callouts. When a failure is detected on a RIO drawer, a data processing system uses the bulk power controller to provide an alternate path, rather than using the existing RIO links, to access registers on the I/O drawers. The system logs onto the bulk power controller, which provides a communications path between the data processing system and the RIO drawer. The communications path allows the data processing system to read all of the registers on the I/O drawer. The register information in the I/O drawer is then analyzed to diagnose the I/O failure. Based on the register information, the data processing system identifies a field replacement unit to repair the I/O failure.
    Type: Grant
    Filed: September 2, 2004
    Date of Patent: November 18, 2008
    Assignee: International Business Machines Corporation
    Inventors: Mike Conrad Duron, Mark David McLaughlin
  • Patent number: 7444558
    Abstract: A serial point to point link that communicatively couples an integrated circuit (IC) device to another IC device is initialized by transferring a training sequence of symbols over the link. Registers of the IC device are programmed, to set a symbol data pattern and configure a lane transmitter for the link. A start bit in a register of the IC device is programmed, to request that the link be placed in a measurement mode. In this mode, the IC device instructs the other IC device to enter a loopback mode for the link. The IC device transmits a sequence of test symbols over the link and evaluates a loopback version of the sequence for errors. The sequence of test symbols have a data pattern, and are transmitted, as configured by the registers. Other embodiments are also described and claimed.
    Type: Grant
    Filed: December 31, 2003
    Date of Patent: October 28, 2008
    Assignee: Intel Corporation
    Inventors: Suneel G. Mitbander, Cass A. Blodgett, Andrew W. Martwick, Lyonel Renaud, Theodore Z. Schoenborn
  • Publication number: 20080263407
    Abstract: To improve the maintainability of a virtual machine system, there is provided a mechanism capable of appropriately reporting a failure that occurs in a dedicated PCI device, in a shared PCI device, or in a virtual PCI device. A device for transferring PCI device configuration information between a failure monitoring application and a hypervisor that monitors a PCI device failure is prepared, and the failure monitoring application is operated in a user virtual machine and in a control virtual machine. Based on the above-described PCI device configuration information, the failure monitoring application operating in the user virtual machine monitors a dedicated PCI device failure and a virtual PCI device failure, and the failure monitoring application operating in the control virtual machine monitors a shared PCI device failure, respectively, thereby appropriately reporting a failure of the dedicated PCI device, the shared PCI device, or the virtual PCI device without duplication.
    Type: Application
    Filed: April 18, 2008
    Publication date: October 23, 2008
    Inventor: Mitsuo YAMAMOTO
  • Patent number: 7436291
    Abstract: A network communication device is provided, comprising a control processor for controlling operation of the device, a reset module which is controllable independently of the control processor for performing a reset operation of the device, and a reset control interface for receiving a reset signal, the reset module being responsive to the reset signal for performing the reset operation. A monitor is provided for monitoring the status of the control processor and an interface is adapted to transmit information relating to the monitored status from the device. A second, inactive device is provided to protect the communication device in the event of a control fault which renders the communication device unreachable. The protection device includes a reset interface for transmitting a reset signal to the reset module to enable the communication device to release activity.
    Type: Grant
    Filed: January 3, 2006
    Date of Patent: October 14, 2008
    Assignee: Alcatel Lucent
    Inventors: Terry Sellars, Dale Aiken, Mark Horwood