Peripheral Device Component Fault Patents (Class 714/44)
  • Patent number: 6901539
    Abstract: A method and system for passively validating an advanced configuration and power interface (ACPI) name space are provided. A filter driver may be adapted for use as a verification tool that intercepts requests by the ACPI driver to evaluate objects in the ACPI name space. Prior to the ACPI driver evaluating the object in the ACPI name space, the verification tool validates the object by looking up and validating a corresponding object in a test name space created from the ACPI name space. When the object validates, control is returned to the ACPI driver. When the object does not validate, the verification tool may either log the error to a log file, initiate a debugger to fix the problem, or both.
    Type: Grant
    Filed: April 10, 2002
    Date of Patent: May 31, 2005
    Assignee: Microsoft Corporation
    Inventor: Dieter Achtelstetter
  • Patent number: 6885469
    Abstract: An image processing device detects errors within its functions, and reports these errors to a client device. The client device then instructs the image processing device to disable problem functions, while allowing functions that are properly working to still be used.
    Type: Grant
    Filed: June 1, 2000
    Date of Patent: April 26, 2005
    Assignee: Murata Kikai Kabushiki Kaisha
    Inventor: Yoshifumi Tanimoto
  • Patent number: 6868510
    Abstract: The terminal deals effectively with an error occurrence in accordance with a selected one of modes that comprise a normal mode and a debug mode. The terminal comprises a mode information holder, an error detector, a mode judge unit and a initializer. The mode information holder holds mode information that indicates which mode is the selected mode. For example, the holding of the mode information is carried out ahead of supplying power to the terminal. When an error occurs in the terminal, the error detector detects the error. Then the mode judge unit judges which mode is the selected mode, by referring to the mode information so as to produce an initialization request if the normal mode is the selected mode. The initializer initializes the terminal in response to the initialization request. On the other hand, the mode judge unit does not produce the initialization request if the debug mode is the selected mode.
    Type: Grant
    Filed: September 22, 2000
    Date of Patent: March 15, 2005
    Assignee: NEC Corporation
    Inventor: Takashi Nozu
  • Patent number: 6845469
    Abstract: A method and system for managing uncorrectable data error (UE) conditions as the UE passes through a plurality of devices in a central electronic complex (CEC) is disclosed. The method and system comprises detecting a UE-RE by at least one device in the CEC; and providing an attention signal by at least one device to a diagnostic system to indicate the UE-RE condition. The method and system further includes analyzing the UE-RE attention signal by the diagnostic system to produce an error log with a list of failing parts and a record of the log. A method and system in accordance with the present invention provides a new fault isolation methodology and algorithm, which extends the current capability of a service processor runtime diagnostic code (PRD). The method and system in accordance with the present invention allows for correct error isolation and for surfacing of appropriate service action messages on a processing system that has successfully recovered from an uncorrectable data error (UE) condition.
    Type: Grant
    Filed: March 29, 2001
    Date of Patent: January 18, 2005
    Assignee: International Business Machines Corporation
    Inventors: Raymond Leslie Hicks, Alongkorn Kitamorn
  • Patent number: 6834363
    Abstract: A method for prioritizing bus errors for a computing system is provided. A subsystem test is executed on a first subsystem from a plurality of subsystems on a bus system, wherein the subsystem test on the bus system is specific to the first bus subsystem. An output is received in response to executing the subsystem test. In response to the output indicating an error on the first subsystem, a severity level is assessed based on the error. For all subsystems from the plurality of subsystems on the bus system, a subsystem test is executed on each remaining subsystem, wherein each subsystem test on the bus system is specific to each remaining subsystem. An output is received in response to executing each subsystem test. In response to the output indicating an error on any of the remaining subsystems, a severity level is assessed based on the error.
    Type: Grant
    Filed: March 22, 2001
    Date of Patent: December 21, 2004
    Assignee: International Business Machines Corporation
    Inventors: Christopher Harry Austen, Michael Anthony Perez, Mark Walz Wenning
  • Patent number: 6832343
    Abstract: The present invention relates to an apparatus for controlling safety-critical processes. The apparatus includes at least one safe control unit for controlling the safety-critical processes and at least two safe signal units which are connected via I/O channels to the safety-critical processes. The safe control unit and the safe signal units are connected to a common fieldbus. The safe signal units communicate with the safe control unit, but not with one another, when the apparatus is in the control mode. The safe signal units have an evaluator for evaluating a fault message which is broadcasted across the fieldbus, as well as a switching device which autonomously change the safety-critical process to a safe state when a fault message which is evaluated as being relevant occurs.
    Type: Grant
    Filed: February 8, 2002
    Date of Patent: December 14, 2004
    Assignee: Pilz GmbH & Co.
    Inventors: Roland Rupp, Klaus Wohnhaas, Hans Schwenkel
  • Patent number: 6829729
    Abstract: A method and system for managing uncorrectable data error conditions from an I/O subsystem as the UE passes through a plurality of devices in a central electronic complex (CEC) is disclosed. The method and system comprises detecting a I/O UE by at least one device in the CEC; and providing an SUE-RE (Special Uncorrectable Data Error-Recoverable Error) attention signal by at least one device to a diagnostic system that indicates the I/O UE condition. The method and system further includes analyzing the SUE-RE attention signal by the diagnostic system to produce an error log with a list of failing parts and a record of the log. A method and system in accordance with the present invention provides a new fault isolation methodology and algorithm, which extends the current capability of a service processor runtime diagnostic code (PRD). The method allows for the accurate determination of an error source and provides appropriate service action if and when the system fails to recover from the UE condition.
    Type: Grant
    Filed: March 29, 2001
    Date of Patent: December 7, 2004
    Assignee: International Business Machines Corporation
    Inventors: Raymond Leslie Hicks, Alongkorn Kitamorn, Sheldon Ray Bailey
  • Patent number: 6826706
    Abstract: An apparatus for evaluating at least one timer in the event of a timeout condition in a system includes circuitry that generates an indication that certain system conditions have occurred, clock circuitry, enabled by the indication, that generates a timeout counter enable signal, and a number of timer units, coupled to the clock circuitry, where each of the timer units is incremented an incrementing signal and reset by a monitored signal that represents conditions in the system. The apparatus includes comparison circuitry coupled to the timeout units, such that when at least one of the timer units reaches a predetermined count, the count, or the maximum count reached to this point, of each of the timer units is stored.
    Type: Grant
    Filed: June 12, 2001
    Date of Patent: November 30, 2004
    Assignee: International Buniess Machines Corporation
    Inventor: Stephen Dale Hanna
  • Patent number: 6823480
    Abstract: Processing functions in a communication device are partitioned into a sequence of operational levels having corresponding status indications which are captured prior to a fault or other abnormal condition and retained during re-cycling of the sequence of operations for use in status monitoring or fault diagnosis. In a modem performing a sequence of operations including groups of one or more individual operations having an associated status indication, a method is used for capturing an indication of system status. The method involves generating hierarchically ordered status indications reflecting the status of completion of sequentially performed groups of operations in which individual status indications are associated with corresponding groups of operations. The generated status indications are captured and retained following initiation of repetition of the groups of operations and are provided as identification of an attained operational status of the system for operation diagnosis (e.g.
    Type: Grant
    Filed: September 25, 2000
    Date of Patent: November 23, 2004
    Assignee: Thomson Licensing S.A.
    Inventor: Larry Cecil Brown
  • Patent number: 6807596
    Abstract: A system for removal and replacement of core I/O devices while the rest of the computer system is powered-up and operational. The system comprises a custom form-factor core I/O card that contains a plurality of I/O devices, including a processor for managing the card's I/O functions. A command is sent to an operating system, running on a system processor external to the core I/O card, that notifies the system to stop using, and de-configure, the hardware on the core I/O card. Once the OS receives this notification, an indication that the card is ready to be removed is sent to the user. The user then removes the card from its slot and inserts a replacement card into the same slot. The system software then discovers the I/O components on the core I/O card to determine what components are available, and then configures the new I/O device(s).
    Type: Grant
    Filed: July 26, 2001
    Date of Patent: October 19, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Michael John Erickson, Daniel V. Zilavy, Bradley D. Winick, Paul J. Mantey
  • Patent number: 6782495
    Abstract: A method of diagnosing a printer problem includes correlating a wide range of printer data types with suggested solutions. Printer diagnostic data, which may include usage information and printer status information collected over a period of time, is parsed into individual components. The components are then input into a set of rules. Each rule compares each component with a corresponding reference value to generate a comparison result, correlates the comparison result with a set of actions including solutions, and if there is a correlation between the comparison result and a solution, providing the solution.
    Type: Grant
    Filed: June 19, 2001
    Date of Patent: August 24, 2004
    Assignee: Xerox Corporation
    Inventor: David I. Bernklau-Halvor
  • Patent number: 6779128
    Abstract: A control system has a first module that includes a memory and diagnostic logic. The diagnostic logic periodically tests at least selected locations in the memory and, in connection with such testing, reads data from those locations and writes that data back to the locations. A second module is coupled to the first module such that the written back data is transferred to the second module, as well as to the memory of the first. Mapping or other conversion logic can translate addresses or other data identifiers, as necessary, to insure that the transferred data is properly identified upon its receipt by the second module.
    Type: Grant
    Filed: February 18, 2000
    Date of Patent: August 17, 2004
    Assignee: Invensys Systems, Inc.
    Inventors: Alan Gale, Christain Bourdin, Gene Cummings
  • Patent number: 6763482
    Abstract: A method of diagnosing a printer includes performing a series of parametric tests on the printer at the time of manufacture to generate a set of baseline values for the printer and storing the baseline results. The baseline results may be stored remotely or with the printer, or both. A set of maximum parametric test variations for the printer type is generated, such that each maximum parametric test variation is associated with a particular printer fault event. At the time of a suspected printer fault, the same parametric tests are performed and a set of suspected fault values generated. The difference between the suspected fault value and the baseline value is calculated for each parametric test. If the difference for a particular parametric test is greater than the maximum parametric test variation for that particular parametric test, the print fault event associated with the parametric test value may be indicated.
    Type: Grant
    Filed: June 19, 2001
    Date of Patent: July 13, 2004
    Assignee: Xerox Corporation
    Inventor: David I. Bernklau-halvor
  • Patent number: 6757849
    Abstract: The present disclosure relates to systems and methods for generating and performing custom peripheral device integration tests on a network. A method for developing a peripheral device integration test suite entails performing the following steps: developing a set of generic tests designed to exercise the various functions of a particular peripheral device; auditing a network where the peripheral device is designated for installation; and applying parameters responsive to the audit to the set of generic tests. A method for optimizing a customer's peripheral device configuration is also disclosed. Another method contains the following steps: developing a knowledge base associated with a peripheral device of interest; monitoring a customer's administration and configuration of the peripheral device; and applying parameters collected during the monitoring step to the knowledge base to generate an expected performance measure associated with the peripheral device.
    Type: Grant
    Filed: August 3, 2001
    Date of Patent: June 29, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Jeffrey A. Balluff
  • Publication number: 20040123188
    Abstract: A method and apparatus for diagnosing and repairing hardware and software problems relating to computer peripheral devices and their software drivers. The method and apparatus enumerate the devices, identify devices having errors, detect replacement software drivers and then un-install possibly defective software drivers so that they may be replaced automatically by the operating system, run hardware tests and attempt repairs on hardware devices.
    Type: Application
    Filed: December 20, 2002
    Publication date: June 24, 2004
    Inventors: Karamadai Srinivasan, Rajpal Gill, Thomas M. Tripp
  • Patent number: 6754855
    Abstract: Aspects of the invention provide methods and architectures for enhancing the reliability of computer appliances and reducing the possibilities that human intervention is necessary in the event of a system failure or failure condition. The provided architecture is extensible and provides a generalized framework that is adaptable to many different types of computer appliances. One aspect of the invention provides a boot up redundancy component to ensure that a computer appliance can be appropriately booted. In the described embodiment, the appliance hard drive is configured with multiple partitions that can be utilized to boot the appliance thereby reducing the chances that the appliance will not boot. In addition, an architecture is disclosed that comprises one or more resource monitoring components that monitor an associated appliance resource for a failure condition. The resource monitoring components are programmed to attempt to remedy certain failure conditions that they detect.
    Type: Grant
    Filed: December 1, 1999
    Date of Patent: June 22, 2004
    Assignee: Microsoft Corporation
    Inventors: Karl L. Denninghoff, Todd L. Paul
  • Patent number: 6731206
    Abstract: A voice system for announcing the type of failure when the basic input/output system (BIOS) program in the computer discovers an error during start-up. The voice system includes a pre-recorded voice integrated circuit and a voice output device. The BIOS program tests a plurality of peripheral devices. When errors are found in any peripheral device, a warning signal is sent to the pre-recorded voice integrated circuit. A corresponding error signal message is looked up in the pre-recorded voice integrated circuit and then the error signal message is transferred to the voice output device. A verbal failure message is announced through the voice output device. The error signal message includes all kinds of failures recorded in voice data format.
    Type: Grant
    Filed: December 28, 2001
    Date of Patent: May 4, 2004
    Assignee: First International Computer Inc.
    Inventors: Stephen Yang, Chung-Fu Tsai, Wen-Bin Liu
  • Publication number: 20040064762
    Abstract: An interactive multimedia system for remote diagnostics of, maintenance of, and assistance pertaining to a multifunction peripheral preferably includes a multifunction peripheral, a remote service endpoint, and a network system over which the multifunction peripheral communicates with the remote service endpoint. An audio/visual capture device and a display are preferably communicatively associated with the multifunction peripheral communication entity. The remote service endpoint provides assistance based on the audio/video data over the display in such exemplary forms as text, images, multimedia presentation, audio presentations, video presentations, or live interactive communications. The present invention is also directed to a method performed by a multifunction peripheral that provides interactive multimedia for remote diagnostics of, maintenance of, and assistance regarding a multifunction peripheral.
    Type: Application
    Filed: September 30, 2002
    Publication date: April 1, 2004
    Applicant: Sharp Laboratories of America, Inc.
    Inventors: Sachin Govind Deshpande, John Calvin Thomas, Michael Douglas Baker
  • Patent number: 6711702
    Abstract: The method defines steps and sequences for dealing with peripheral units reported as defective in a communications system. A repetition counter for counting a number of start-up attempts is provided for a restarting procedure. During a locked phase, the peripheral unit that is affected is temporarily taken out of service. After that, a monitoring phase with a temporary start-up is initiated during which tests for faults are carried out. If the unit is determined to be free from faults, a final start-up takes place following the monitoring phase. In the case of a fault during the monitoring phase, the count of the repetition counter is compared with a threshold value. A final taking-out-of-service takes place if the count of the repetition counter exceeds the threshold value. Otherwise, the repetition counter is incremented and another transition into the locked phase takes place. The duration of the locked phase is dependent on the count of the repetition counter.
    Type: Grant
    Filed: October 2, 2000
    Date of Patent: March 23, 2004
    Assignee: Siemens Aktiengesellschaft
    Inventor: Walter Oberhauser
  • Patent number: 6708312
    Abstract: A method for multi-threshold voltage CMOS process optimization. The method includes the steps of: providing a semiconductor substrate with a plurality of devices of different threshold voltages; establishing a plurality of types of timing models for a timing calculation; obtaining a static timing analysis report through the timing calculation; defining a large and a small setup time margin as a Tl and a Ts; changing the devices whose setup time margins are less than Ts to low threshold devices; changing the devices whose setup time margins are greater than Tl to high threshold devices; checking a setup time of each device; changing the devices whose setup time margin does not meet the enhanced static timing analysis report; performing a first pocket implant process for the normal threshold devices; performing a second pocket implant process for the low threshold devices and performing a third pocket implant process for the high threshold devices.
    Type: Grant
    Filed: August 22, 2002
    Date of Patent: March 16, 2004
    Assignee: Silicon Integrated Systems Corp.
    Inventors: Ming-Mao Chiang, Ching-Chang Shih, Chin-Cho Tsai, Tien-Yueh Liu, Kuo-Chung Huang
  • Patent number: 6681347
    Abstract: A method for testing a keyboard complied with a language code table comprises the steps of reading an embedded language code of the keyboard to be tested through a central processing unit (CPU), comparing the read language code with the language code table stored in memory in order to determine whether there is a matched one, reading an application program interface (API) function from the keyboard to be tested by the CPU, identifying a type of the keyboard to be tested by a “Get Keyboard Type” of the API function, reading exchange codes of special keys from the keyboard to be tested by the CPU, identifying a model of the keyboard to be tested, selecting a keyboard test software corresponding to the language code, the type, and the model of the keyboard to be tested from a test software database stored in memory, and performing a test on each key on the keyboard by the selected keyboard test software.
    Type: Grant
    Filed: November 6, 2000
    Date of Patent: January 20, 2004
    Assignee: Inventec Corp.
    Inventors: S-Tong Chen, Kuang-Shin Lin
  • Patent number: 6678839
    Abstract: In a system using a looped interface, a faulty device and a disconnected location respectively causing a link fault are specified. Plural devices 200 are connected to the looped interface 120 and a port bypass circuit 210 detaches the faulty device from the looped interface. A port bypass circuit controller 100 controls port bypass circuits and sequentially detaches a device from the looped interface when a link of the looped interface is disconnected. It is checked whether a loop fault continues or not after the device is detached. The operation is repeated by the number of the devices to acquire the result of the check and a device causing the loop fault is specified based upon the result of the check.
    Type: Grant
    Filed: January 31, 2001
    Date of Patent: January 13, 2004
    Assignee: NEC Corporation
    Inventor: Yoshiaki Mori
  • Patent number: 6671831
    Abstract: One aspect of the present invention concerns an apparatus comprising a circuit that may be configured to present a connection signal. The connection signal may be configured to automatically disconnect and reconnect a peripheral device from a host in response to one or more errors. In another aspect of the present invention the connection signal may be configured to shift a configuration of a peripheral device in response to one or more errors.
    Type: Grant
    Filed: June 13, 2000
    Date of Patent: December 30, 2003
    Assignee: Cypress Semiconductor Corp.
    Inventors: Ronald H. Sartore, Steven P. Larky
  • Patent number: 6658599
    Abstract: A method, system, and apparatus for managing a failed input/output adapter within a data processing system is provided. In one embodiment, an operating system handler receives an indication that one of a plurality of input/output adapters has failed. The operating system handler consults an error log to determine which input/output adapter has failed. Once the bad input/output adapter has been determined, the operating system handler disables the bad input/output adapter and deallocates any processes bound for the bad input/output adapter without powering down the data processing system. A user is then notified of the bad input/output adapter so that the bad input/output adapter can be replaced. The input/output adapter may be replaced without powering down the data processing system. Once the bad input/output adapter has been replace, the new input/output adapter is enabled.
    Type: Grant
    Filed: June 22, 2000
    Date of Patent: December 2, 2003
    Assignee: International Business Machines Corporation
    Inventors: Stephen Dale Linam, Michael Anthony Perez, Louis Gabriel Rodriguez, Mark Walz Wenning
  • Patent number: 6651184
    Abstract: The present invention relates to the attachment of latency-intolerant devices, such as CD-RW devices to a well supported high bandwidth interface on a host computer. A preferred high bandwidth interface is the Universal Serial Bus (USB) which is commonly installed in personal computers manufactured in the late 1990's. A need for both high pre-allocated bandwidth makes use of the Isochronous transfer mode desirable for communication with CD-RW and other devices requiring continuous data transmission. One of a range of data reliability mechanisms is preferably implemented on the connection to the USB to ensure accuracy in data transmission to the various devices connected to the USB.
    Type: Grant
    Filed: November 3, 1999
    Date of Patent: November 18, 2003
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: David H Hanes, Lawrence N Taugher, Stephen F Bayless
  • Patent number: 6643727
    Abstract: A method, system, and apparatus for isolating an input/output (I/O) bus error, received from an I/O adapter, from the other I/O adapters that may be in different partitions within a logically partitioned data process system is provided. In one embodiment, the logically partitioned data processing system includes a system bus, a processing unit, a memory unit, a host bridge, a plurality of terminal bridges, and a plurality of input/output adapters. The processing unit, memory unit, and the host bridge are all coupled to each other through the system bus. Each of the plurality of terminal bridges is coupled to the host bridge through a first bus. Each of the input/output adapters is coupled to one of the plurality of terminal bridges through a one of a plurality of second buses, such that each input/output adapter corresponds to a single terminal bridge. Each of the input/output adapters are assigned to one of a plurality of logical partitions within the data processing system.
    Type: Grant
    Filed: June 8, 2000
    Date of Patent: November 4, 2003
    Assignee: International Business Machines Corporation
    Inventors: Richard Louis Arndt, Steven Mark Thurber
  • Patent number: 6631427
    Abstract: When a device is removed during recording, there is a possibility such that a fatal error may be caused in the device. Information for device control is read out from the device. When it is detected that a cover which covers the device is opened or that a power voltage is equal to or less than a predetermined value during the operation with a battery, a control unit invalidates the read-out control information for the device. Therefore, when the device is erroneously taken out during the recording or when a battery output drops during the recording, a fatal error is not caused in the device.
    Type: Grant
    Filed: July 18, 1997
    Date of Patent: October 7, 2003
    Assignee: Canon Kabushiki Kaisha
    Inventor: Ryoji Kubo
  • Patent number: 6625761
    Abstract: One aspect of the present invention concerns an apparatus comprising a circuit that may be configured to present a connection signal. The connection signal may be configured to automatically disconnect and reconnect a peripheral device from a host in response to one or more errors. In another aspect of the present invention the connection signal may be configured to shift a configuration of a peripheral device in response to one or more errors.
    Type: Grant
    Filed: June 13, 2000
    Date of Patent: September 23, 2003
    Assignee: Cypress Semiconductor Corp.
    Inventors: Ronald H. Sartore, Steven P. Larky
  • Patent number: 6622266
    Abstract: A user interface is provided to receive electronic mail addresses for printer alert notification recipients. The alert notifications to be received by each individual recipient are designated based on the underlying alert condition prompting the alert. Once all desired recipients and corresponding alert notifications have been specified, this alert notification configuration is implemented for one or more printers within a group of monitored printers.
    Type: Grant
    Filed: June 9, 2000
    Date of Patent: September 16, 2003
    Assignee: International Business Machines Corporation
    Inventors: Joan Stagaman Goddard, Thomas Michael Ruehle, Susan Ruth Scruggs
  • Patent number: 6601186
    Abstract: The present invention provides a computer system having a modular control process, and a modular device driver process that works in conjunction with the control process. The device driver process is capable of continuing operation even if the control process is terminated, for example, upon detection of a fault. In one aspect, the invention provides a network device that includes a control plane and a data plane. The control plane includes a modular control application for establishing and terminating network connections, and the data plane has an independent, modular device driver process for transmitting data over network connections established by the control application. The device driver process is capable of continuing to transmit data over established network connections even if the control application is terminated.
    Type: Grant
    Filed: May 20, 2000
    Date of Patent: July 29, 2003
    Assignee: Equipe Communications Corporation
    Inventors: Barbara A. Fox, Nicholas A. Langrind, Peter Pothier, Daniel J. Sullivan, Jr.
  • Patent number: 6598178
    Abstract: The present invention provides an architecture for a peripheral device to activate a breakpoint in a processor or other device under emulation. A peripheral breakpoint active signaler allows the peripheral to signal the occurrence of a breakpoint to the processor using a halt or trap line to the processor. This invention provides developers with increased code development capabilities by allowing them to set breakpoints in a peripheral device for the benefit of a processor interfaced with the peripheral to detect when a certain external event has occurred based on the perspective of a peripheral. A breakpoint control register individually enables breakpointing capability of each peripheral with respect to having the capability to halt the processor. Each peripheral has the capability to output a breakpoint request signal to set a bit in a breakpoint status register for readback by the processor, through an external port such as a JTAG test port, or other device.
    Type: Grant
    Filed: June 1, 1999
    Date of Patent: July 22, 2003
    Assignee: Agere Systems Inc.
    Inventors: Oceager P. Yee, Zhigang Ma
  • Patent number: 6594787
    Abstract: A system and method thereof for monitoring elapsed time for a transaction. A computer system executes an application to initiate a transaction. An input/output device communicatively coupled to the computer system receives the transaction from the computer system. The input/output device is adapted to have a timer for measuring time until, for example, a response to the transaction is generated. The input/output device monitors the timer to identify when a time period allotted for the response to the transaction is exceeded (e.g., a timeout condition). The input/output device generates a signal to indicate the timeout condition.
    Type: Grant
    Filed: September 17, 1999
    Date of Patent: July 15, 2003
    Assignee: Silicon Graphics, Inc.
    Inventor: Gregory L. Chesson
  • Patent number: 6584585
    Abstract: A standalone virtual device driver that is not a mouse driver replacement or a mouse minidriver examines mouse data packets received from the mouse hardware for data packets that are obviously or likely to be faulty. When such a data packet is detected, the virtual device driver also removes the suspected faulty data by returning a null mouse packet to the mouse driver in its place. The virtual device driver may also initiate resynchronization procedures or reset the mouse hardware if necessary.
    Type: Grant
    Filed: March 27, 2000
    Date of Patent: June 24, 2003
    Assignee: Gateway, Inc.
    Inventor: John L. Patterson, Jr.
  • Patent number: 6581114
    Abstract: A first embodiment of the present invention includes a decoder 320 and a detection circuit 330. The decoder 320 receives data at a packet rate. Each packet includes more than one word so that the packet rate is less than a word rate. The detector circuit 330 monitors a data valid signal from the decoder 320 and asserts an output signal (send idle) upon determination that the data valid signal changes values at a rate higher than the packet rate.
    Type: Grant
    Filed: July 14, 2000
    Date of Patent: June 17, 2003
    Assignee: Texas Instruments Incorporated
    Inventor: Gordon L. Sturm
  • Patent number: 6571360
    Abstract: A multiprocessing computer system provides the hardware support to properly test an I/O board while the system is running user application programs and while preventing a faulty board from causing a system crash. The system includes a centerplane that mounts multiple expander boards. Each expander board in turn connects a microprocessor board and an I/O board to the centerplane. Prior to testing, the replacement I/O board becomes a part of a dynamic system domain software partition after it has been inserted into an expander board of the multiprocessing computer system. Testing an I/O board involves executing a process using a microprocessor and memory on a microprocessor board to perform hardware tests on the I/O board. An error cage, address transaction cage, and interrupt transaction cage isolate any errors generated while the I/O board is being tested.
    Type: Grant
    Filed: October 19, 1999
    Date of Patent: May 27, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Daniel P. Drogichen, Eric Eugene Graf, Don Kane, Douglas B. Meyer, Andrew E. Phelps, Patricia Shanahan, Steven F. Weiss
  • Patent number: 6557121
    Abstract: Method and system aspects for fault isolation on a bus are provided. In a method aspect, a method for isolating a fault condition on a bus of a computer system, the computer system including an input/output (I/O) subsystem formed by a plurality of I/O devices communicating via the bus, includes categorizing, in a recursive manner, the I/O subsystem, and isolating a source of an error condition within the I/O subsystem. Further, the I/O subsystem communicates via a peripheral component interconnect, PCI, bus. In a system aspect, a computer system for isolating a fault condition on a PCI bus includes a processing mechanism, and an input/output mechanism, coupled to the processing mechanism, comprising a plurality of input/output devices and bridges coupled to a PCI bus and communicating according to a PCI standard. In addition, the system includes a fault isolation mechanism within the processing mechanism for identifying a source of an error condition in the input/output mechanism.
    Type: Grant
    Filed: March 31, 1997
    Date of Patent: April 29, 2003
    Assignee: International Business Machines Corporation
    Inventors: Charles Andrew McLaughlin, Alongkorn Kitamorn
  • Patent number: 6539451
    Abstract: A data storage system wherein a host computer is coupled to a bank of disk drives through a system interface. The interface has a memory with a high address memory section and a low address memory section. A plurality of directors control data transfer between the host computer and the bank of disk drives as such data passes through the memory. A pair of high address busses electrically is connected to the high address memory and a pair of low address busses is electrically connected to the low address memory. Each one of the directors is electrically connected to one of the pair of high address busses and one of the pair of low address busses. A front-end portion of the directors is electrically connected to the host computer and a rear-end portion of the directors is electrically connected to the bank of disk drives.
    Type: Grant
    Filed: December 30, 1998
    Date of Patent: March 25, 2003
    Assignee: EMC Corporation
    Inventors: Mark Zani, Scott Romano, Alfred Dellicicchi
  • Patent number: 6532547
    Abstract: A redundant peripheral device subsystem in a computer system is disclosed including first and second peripheral device controllers. First and second peripheral device busses are coupled to the first and second peripheral device controllers, respectively. A controllable switch is coupled between the first and second peripheral device busses. The controllable switch either isolates the first and second peripheral device busses from each other, or joins them into a single peripheral device bus.
    Type: Grant
    Filed: June 16, 1995
    Date of Patent: March 11, 2003
    Assignee: EMC Corporation
    Inventor: Jeffrey A. Wilcox
  • Patent number: 6530042
    Abstract: A method and apparatus for monitoring an internal queue within a processor, such as an instruction completion table or instruction re-order buffer, is presented. The performance monitoring unit of the processor contains multiple counters, and each counter counts occurrences of specified events. An internal queue of the processor may be specified to be monitored. A count of event signals indicating a successful allocation request for an entry in the internal queue is divided by a count of event signals indicating a passage of units of time to obtain the average rate for allocation requests for queue entries in the specified internal queue. A count of event signals indicating an occupation of a specific entry in the internal queue during a unit of time is divided by a count of event signals indicating an allocation of a specific entry in the internal queue to obtain the average time spent in the internal queue.
    Type: Grant
    Filed: November 8, 1999
    Date of Patent: March 4, 2003
    Assignee: International Business Machines Corporation
    Inventors: Joel Roger Davidson, Judith E. K. Laurens, Alexander Erik Mericas
  • Patent number: 6530034
    Abstract: Method and apparatus are described for recovery from temporary errors in a disk drive resulting from excessive temperature or the like. After a first error recovery procedure has been executed and failed, a waiting time is selected after which a second error recovery procedure will be performed. The length of the waiting time can be determined by the measured temperature if a sensor is included in the drive. If the error still cannot be recovered after the waiting period, the location where the error had occurred is temporarily registered as defective. Subsequently the drive will retest the failing location and remove the temporary defect registration if the error has been removed by, for example, the temperature having gone down.
    Type: Grant
    Filed: November 5, 1999
    Date of Patent: March 4, 2003
    Assignee: International Business Machines Corporation
    Inventors: Kenji Okada, Hideo Asano, Kazushige Okutsu
  • Patent number: 6526525
    Abstract: A PCI debugging device, method and system. The PCI interface includes a request signal, a grant signal and a target ready signal. The system has a debugging mode such that current grant signal will be retained as long as the request signal remains activated. Using a decoding comparator circuit, the debugging device decodes an instantaneous command signal from the PCI interface and compares with a user-defined wait-to-debug command signal so that an identical command signal for activating the request signal can be generated. Due to the continuous activation by the request signal on the PCI interface, the system halts to display system data via a display circuit so that debugging is facilitated.
    Type: Grant
    Filed: December 13, 1999
    Date of Patent: February 25, 2003
    Assignee: Via Technologies, Inc.
    Inventor: Wen-Ching Chang
  • Patent number: 6523140
    Abstract: A method and implementing computer system is provided in which specific device identification information is acquired when a faulty condition is detected during an information transfer transaction, and the condition is reported to the device driver of the identified device for corrective action without initiating a system shut-down. In one example, PCI adapter sequence information, including tag number, requester bus number, requester device number and requester function number is captured and used in reporting an error condition in order to identify and isolate the adapter in a recovery operation.
    Type: Grant
    Filed: October 7, 1999
    Date of Patent: February 18, 2003
    Assignee: International Business Machines Corporation
    Inventors: Richard Louis Arndt, Danny Marvin Neal, Steven Mark Thurber
  • Patent number: 6519713
    Abstract: A magnetic disk drive permits control to a particular one of the magnetic disk medium among a plurality of magnetic disk media on a SCSI bus and does not influence the other magnetic media, and a SCSI system employing the same. The magnetic disk drive performing exchange of data between a plurality of magnetic disk media and an external circuit through a common SCSI bus, has a plurality of reset control circuits respectively connected to the plurality of magnetic disk media by individual SCSI buses connected to the common SCSI bus, and responsive to an externally applied command data directed to own circuit, for making a reset signal on a reset signal line of the individual SCSI bus connected to the own circuit active.
    Type: Grant
    Filed: January 18, 2000
    Date of Patent: February 11, 2003
    Assignee: NEC Corporation
    Inventor: Yoshikatsu Wada
  • Publication number: 20030028826
    Abstract: The present disclosure relates to systems and methods for generating and performing custom peripheral device integration tests on a network. A method for developing a peripheral device integration test suite entails performing the following steps: developing a set of generic tests designed to exercise the various functions of a particular peripheral device; auditing a network where the peripheral device is designated for installation; and applying parameters responsive to the audit to the set of generic tests. A method for optimizing a customer's peripheral device configuration is also disclosed. Another method contains the following steps: developing a knowledge base associated with a peripheral device of interest; monitoring a customer's administration and configuration of the peripheral device; and applying parameters collected during the monitoring step to the knowledge base to generate an expected performance measure associated with the peripheral device.
    Type: Application
    Filed: August 3, 2001
    Publication date: February 6, 2003
    Inventor: Jeffrey A. Balluff
  • Patent number: 6516427
    Abstract: The invention is utilized in the context of a peripheral device that is coupled to a network via a firewall which blocks unwanted incoming message traffic, except for incoming message traffic that is responding to a message dispatched from the peripheral device. A remotely located diagnostic device, which includes code for diagnosis of causes of peripheral device malfunctions, is connected to communicate via the network. The peripheral device includes a memory for storing a diagnostic application that is adapted to execute one or more diagnostic subroutines for diagnosing a cause of a device malfunction. The peripheral device is enabled to dispatch an event message to the remote diagnostic device and to receive a response message from the remote diagnostic device (all via the firewall and the network). The response message causes a diagnostic application to execute a subroutine on the peripheral device in an attempt to determine the cause of the event.
    Type: Grant
    Filed: November 5, 1999
    Date of Patent: February 4, 2003
    Assignee: Hewlett-Packard Company
    Inventors: Charles K. Keyes, James M. Sangroniz, James E. Obert, William A. Cox
  • Patent number: 6510532
    Abstract: A localized bus and/or interface condition capture module (26, 26) is incorporated at the interface (24, 34) of a bus (21) with a peripheral device (22,32), for example embedded in an interface ASIC (41), discretely to track locally bus and/or interface signal condition, and the operational state or phase of an associated peripheral device, for subsequent access, remote analysis and diagnosis.
    Type: Grant
    Filed: October 14, 1999
    Date of Patent: January 21, 2003
    Assignee: Hewlett-Packard Company
    Inventors: Simon James Pelly, Lynne Haper
  • Publication number: 20030005369
    Abstract: A method triggers a printer (106) to receive a trigger to initiate an embedding algorithm (220), receive the print data (228); read the printer configuration data (230); encode the configuration data (230); insert the configuration data (230) into the print data (228); send the print data (228) to a printhead (206); and print the data. The printed data is then scanned, run through analysis software, and the embedded data is returned. The embedded data can then be used to diagnose printer problems or as a digital notary.
    Type: Application
    Filed: June 27, 2001
    Publication date: January 2, 2003
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jennifer Q. Trelewicz, Eric W. Jepsen, Patrick M. McCarthy
  • Patent number: 6487684
    Abstract: When the user performs input seeking a message that pertains to the status of the device, the message display device of the present invention selects and displays based on the data generated by a data generator comprising a counter and/or a sensor an appropriate message from a group of messages, each of which corresponds to various input contents.
    Type: Grant
    Filed: June 30, 1999
    Date of Patent: November 26, 2002
    Assignee: Minolta Co., Ltd.
    Inventor: Hirotomo Ishii
  • Publication number: 20020144189
    Abstract: An automatic delay detection and receiver adjustment method for a synchronous communications bus system sends a test pattern to the receivers of the system during a detection phase, uses the test pattern to determine a longest delay time for each bus line, and adjusts a receiver for each bit line to receive incoming signals at a time based on the determined longest delay time.
    Type: Application
    Filed: April 2, 2001
    Publication date: October 3, 2002
    Applicant: International Business Machines Corporation
    Inventor: Jonathan Yang Chen
  • Patent number: 6460107
    Abstract: Real-time performance monitoring facility in an integrated circuit (IC) data processor for monitoring events related to different bus activity. The monitoring facility is accessible via a bus connection the IC. Events include device acquisition and ownership time, and the number of requests and grants on a given bus. The events are counted as occurrences and durations by a number of event counters integrated in the IC. The IC can notify software when the counters overflow. The IC may feature multiple clock domains, including, for instance, multiple bus interfaces operating at different clock frequencies, in which events from different clock domains may be tracked by the same counter. In one embodiment, the performance monitoring facility is integrated into an I/O processor (IOP) die that complies with the popular intelligent I/O (I2O) and Peripheral Components Interconnect (PCI) specifications.
    Type: Grant
    Filed: April 29, 1999
    Date of Patent: October 1, 2002
    Assignee: Intel Corporation
    Inventors: Ravi S. Rao, Byron R. Gillespie, Elliot Garbus, Dinesh Ranganathan