Access Processor Affected (e.g., I/o Processor, Mmu, Or Dma Processor, Etc.) Patents (Class 714/5.11)
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Patent number: 12174703Abstract: Methods and systems for managing operation of data processing systems are disclosed. To manage operation of the data processing systems, the data processing systems may host management controllers that manage the operation of the data processing systems. The management controllers may be programmable, and may initiate recoveries for the management controllers when operation management software becomes corrupted or is unavailable for other reasons. During the recoveries, new copies of the operation management software may be obtained and used to initiate desired operation of the management controllers.Type: GrantFiled: March 17, 2023Date of Patent: December 24, 2024Assignee: Dell Products L.P.Inventors: Prashanth Giri, Murali K. Somarouthu, Babu Krishna Chandrasekhar
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Patent number: 12130752Abstract: A protocol chip transmits the request from the host apparatus to a first processor through a first address translation unit. A first processor transmits a response to the request from the host apparatus, to the protocol chip through the first address translation unit. When the first processor stops processing, an instruction to transmit the request from the host apparatus to a second processor is transmitted to the protocol chip. When receiving the instruction to transmit the request from the host apparatus to the second processor, the protocol chip transmits the request from the host apparatus to the second processor through a second address translation unit. The second processor transmits the response to the request from the host apparatus to the protocol chip through the second address translation unit.Type: GrantFiled: March 13, 2023Date of Patent: October 29, 2024Assignee: Hitachi, Ltd.Inventors: Kentaro Shimada, Masanori Takada
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Patent number: 12101183Abstract: Methods, systems, and devices for enhanced negative acknowledgment control (NAC) frame are described. A device may generate and communicate an enhanced NAC frame that includes additional error information to indicate to the device a cause for the error. The device may receive a data frame and determine an error condition associated with a set of layers of a protocol stack. The device may generate feedback indicating a cause for the determined error condition and transmit the feedback indicating the error cause. The feedback may be a NAC that includes a first quantity of bits configured for indicating an existence of an error and a second quantity of bits configured for indicating the error cause. A format of the NAC frame may include bits configured to identify multiple types of error causes associated with the different layers of the protocol stack.Type: GrantFiled: July 28, 2022Date of Patent: September 24, 2024Assignee: Micron Technology, Inc.Inventors: Zhanqiang Su, Junjun Wang
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Patent number: 12052326Abstract: A proxy server (700) receives, from a sending device, a packet intended for a receiving device (600). The proxy sewer (700) sends, to the receiving device (600), a promise frame (300) indicating that the proxy server (700) will deliver the packet to the receiving device (600) later. The receiving device (600) receives the promise frame (300) from the proxy server (700), and sends an acknowledgement of the packet to the sending device via the proxy sewer (700). The proxy server (700) forwards the acknowledgement of the packet from the receiving device (600) to the sending device, and delivers the packet to the receiving device (600) after having forwarded the acknowledgement to the sending device. The receiving device (600) receives the packet from the proxy server (700) after having sent the acknowledgement of the packet to the sending device via the proxy server (700).Type: GrantFiled: June 25, 2020Date of Patent: July 30, 2024Assignee: Telefonaktiebolaget LM Ericsson (publ)Inventors: Marcus Ihlar, Zaheduzzaman Sarker, Simone Ferlin, Mirja Kuehlewind
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Patent number: 11954332Abstract: Embodiments of the present disclosure provide a data processing method, a controller, a storage device, and a storage system. The controller adds an execution time of an IO request to the IO request, and the execution time is used to instruct the storage device to complete the IO request before the execution time expires. The controller sends, to the storage device, the IO request to which the execution time is added. When receiving the IO request, the storage device can execute the IO request based on the execution time of the IO request.Type: GrantFiled: June 14, 2021Date of Patent: April 9, 2024Assignee: Huawei Technologies Co., Ltd.Inventors: Liming Wu, Guoxia Liu, Jizhuo Tang, Po Zhang
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Patent number: 11934270Abstract: One or more data blocks of a write command can be written to memory devices independently of other data blocks that are grouped together for an error correction operation with the data blocks. Further, data blocks of different write commands can be executed together and simultaneously rather than being executed separately at different times, which can reduce the latencies associated with executing the write commands.Type: GrantFiled: June 2, 2022Date of Patent: March 19, 2024Assignee: Micron Technology, Inc.Inventors: Nicola Del Gatto, Marco Sforzin, Paolo Amato
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Patent number: 11797217Abstract: Various implementations described herein relate to systems and methods for collecting Solid State Drive (SSD) statistics. A controller, in response to receiving a start command from a host, creates a slot area in a storage device of the SSD corresponding to a slot, collects first statistics data from one or more modules of the SSD, and stores the first statistics data in the slot area. Further, the controller, in response to receiving a stop command, collects second statistics data from the one or more modules and sends the first statistics data and the second statistics data to the host.Type: GrantFiled: January 6, 2020Date of Patent: October 24, 2023Assignee: KIOXIA CORPORATIONInventor: Kadam Manish Manohar
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Patent number: 11749370Abstract: A method of testing a three dimensional (3D) memory cell array includes writing data to each layer of memory cells in the 3D memory cell array, simultaneously performing a read operation of each memory cell in at least a first pillar of the 3D memory cell array, determining whether a memory cell in the 3D memory cell array has failed in response to the read operation, and replacing at least one failed memory cell in the 3D memory cell array with a spare memory cell in response to determining that the memory cell in the 3D memory cell array has failed. The first pillar includes memory cells on each corresponding layer of the 3D memory cell array.Type: GrantFiled: March 11, 2021Date of Patent: September 5, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chao-I Wu, Shih-Lien Linus Lu, Sai-Hooi Yeong
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Patent number: 11663089Abstract: Example embodiments relate generally to systems and methods for continuous data protection (CDP) and more specifically to an input and output (I/O) filtering framework and log management system to seek a near-zero recovery point objective (RPO).Type: GrantFiled: April 30, 2019Date of Patent: May 30, 2023Assignee: Rubrik, Inc.Inventors: Benjamin Travis Meadowcroft, Li Ding, Shaomin Chen, Hardik Vohra, Arijit Banerjee, Abhay Mitra, Kushaagra Goyal, Arnav Gautum Mishra, Samir Rishi Chaudhry, Suman Swaroop, Kunal Sean Munshani, Mudit Malpani
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Patent number: 11561869Abstract: Methods, computer program products, and systems are presented. The methods include, for instance: analyzing a dataset associated with a service provided by the data protection service provider in order to determine a policy for when and how to replicate the respective components of the dataset corresponding to the service from a source site to a target site, such that the target site may perform the service with a minimum cost.Type: GrantFiled: July 30, 2019Date of Patent: January 24, 2023Assignee: Kyndryl, Inc.Inventors: Tom Hagan, Robin H Lewis, Jeff N Marinstein, Ramani Ranjan Routray, Yang Song
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Patent number: 11561895Abstract: Systems, apparatuses, and methods for dynamically adjusting cache policies to reduce execution core wait time are disclosed. A processor includes a cache subsystem. The cache subsystem includes one or more cache levels and one or more cache controllers. A cache controller partitions a cache level into two test portions and a remainder portion. The cache controller applies a first policy to the first test portion and applies a second policy to the second test portion. The cache controller determines the amount of time the execution core spends waiting on accesses to the first and second test portions. If the measured wait time is less for the first test portion than for the second test portion, then the cache controller applies the first policy to the remainder portion. Otherwise, the cache controller applies the second policy to the remainder portion.Type: GrantFiled: September 5, 2019Date of Patent: January 24, 2023Assignee: Advanced Micro Devices, Inc.Inventor: Paul James Moyer
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Patent number: 11544011Abstract: Methods and systems for a networked storage system are provided. One method includes: receiving, by a first storage node, a request to modify data stored using a logical storage object presented by the first storage node, the first storage node communicating with a second storage node configured as a failover partner of the first storage node; transmitting, by the first storage node, an invalidation request to the second storage node to invalidate an entry in a storage location cache of the second storage node, the entry indicating a storage location where data is stored by the first storage node, before modification; and responding, by the first storage node, to the request after modifying the data and upon receiving a response from the second storage node indicating successful invalidation of the entry.Type: GrantFiled: July 28, 2021Date of Patent: January 3, 2023Assignee: NETAPP, INC.Inventors: Sumith Makam, Rahul Thapliyal, Kartik R, Roopesh Chuggani, Abhisar Lnu, Maria Josephine Priyanka S
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Patent number: 11513697Abstract: A control system for a storage apparatus includes two input/output modules (IOMs), and two non-volatile memory (NVM) devices that are electrically connected to the IOMs, respectively, and that each store a firmware code. Each of the IOMs is configured to execute a firmware corresponding to the firmware code stored in the corresponding NVM device, and to enter an active mode or a passive mode after executing the firmware. The IOMs are configured such that when one IOM operating in the passive mode detects abnormal operation of the other IOM operating in the active mode, the one IOM sends, to the other IOM, the firmware code stored in the NVM device electrically connected to the one IOM, in order to update the firmware code in the NVM device electrically connected to the other IOM.Type: GrantFiled: September 3, 2021Date of Patent: November 29, 2022Assignee: MITAC COMPUTING TECHNOLOGY CORPORATIONInventors: Jyun-Jie Wang, Cheng-Tung Wang, Yen-Lun Tseng
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Patent number: 11513828Abstract: A system and method is provided for managing virtualized computing resources. An exemplary method includes executing a computing service comprised of virtualized computing resources including a first virtual machine and a network address mapping module. The method further includes, responsive to receiving an indication that additional virtualized computing resources are needed to handle one or more requests from a client and directed to the computing service, generating a second virtual machine that can handle requests for the computing service by performing a linked cloning operation of the first virtual machine. The method includes, configuring the network address mapping module to modify requests for the second virtual machine, such that the second virtual machine has the same network address as the first virtual machine.Type: GrantFiled: April 3, 2017Date of Patent: November 29, 2022Assignee: Parallels International GmbHInventors: Anton Zelenov, Nikolay Dobrovolskiy, Serguei M. Beloussov
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Patent number: 11507507Abstract: In one or more embodiments, one or more systems, one or more methods, and/or one or more processes may: determine that a power loss to an information handling system (IHS) has occurred; utilize one or more batteries to power the IHS; enable a predicable latency mode of a non-volatile memory medium of the IHS to enter a deterministic window; transfer data from a volatile memory medium of the IHS to a data repository of a namespace of the non-volatile memory medium; determine that power is provided to the IHS; in response to determining that power is provided to the IHS, transfer the data from the data repository to the volatile memory medium; and after transferring the data from the data repository to the volatile memory medium, disable the predicable latency mode of the non-volatile memory medium to exit the deterministic window of the non-volatile memory medium.Type: GrantFiled: July 24, 2020Date of Patent: November 22, 2022Assignee: Dell Products L.P.Inventor: Kurtis Wayne Dorsey
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Patent number: 11481241Abstract: Systems, apparatuses, and methods related to a virtual machine register in a computer processor are described. For example, a memory coupled to the computer processor can store instructions of routines of predefined, non-hierarchical domains. The computer processor can store, in the virtual machine register, an identifier of a virtual machine for which the processor is currently executing instructions in a current domain in the set of domains. For example, the processor can implement resource restriction/mapping and/or perform address translation for the virtual machine based on the identifier stored in the virtual machine register.Type: GrantFiled: July 23, 2019Date of Patent: October 25, 2022Assignee: Micron Technology, Inc.Inventor: Steven Jeffrey Wallach
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Patent number: 11477912Abstract: An autonomous vehicle is disclosed which can map a facility and navigate its way to a particular liquid cooling system. The vehicle can be in communication with a central server, which can control the vehicle. The vehicle can align itself against the liquid cooling system and receive a computing device on a platform of the vehicle. The platform can be lowered and secured in an enclosure of the vehicle. Then, the vehicle can transport the computing device to a storage facility.Type: GrantFiled: August 3, 2021Date of Patent: October 18, 2022Assignee: TMGCore, INC.Inventors: John David Enright, Jacob Mertel, Taylor Monnig, William Hadala
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Patent number: 11455289Abstract: A method for data storage, in a system that includes multiple servers, multiple multi-queue storage devices and at least one storage controller that communicate over a network, includes receiving in a server, from an application running on the server, a request to access data belonging to one or more stripes. The stripes are stored on the storage devices and are shared with one or more other servers. In response to the request, the following are performed at least partially in parallel: (i) requesting one or more global locks that prevent the other servers from accessing the stripes, and (ii) reading at least part of the stripes from the storage devices speculatively, irrespective of whether the global locks are granted. Execution of the request is completed upon verifying that the speculatively-read data is valid.Type: GrantFiled: June 12, 2020Date of Patent: September 27, 2022Assignee: Amazon Technologies, Inc.Inventors: Alex Friedman, Sergei Dyshel, Ofir Dahan, Alex Liakhovetsky
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Patent number: 11424001Abstract: Apparatuses, systems, and methods for error correction. A memory device may have a number of memory cells each of which stores a bit of information. A first latch may hold the encoded bit and provide it as a write parity bit to the memory array as part of a write operation. A second latch may hold a parity bit read from the memory array and the ECC circuit may generate a command signal based on that parity bit. A multiplexer latch may hold the encoded bit and provide a syndrome bit based on the command signal and the encoded bit. The syndrome bit may indicate if there is mismatch between the parity bit and the encoded bit. The logic which handles generating the syndrome bit may be separated from the logic tree.Type: GrantFiled: February 7, 2020Date of Patent: August 23, 2022Assignee: MICRON TECHNOLOGY, INC.Inventors: Keisuke Fujishiro, Yoshifumi Mochida
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Patent number: 11422908Abstract: During a storage redundancy giveback from a first node to a second node following a storage redundancy takeover from the second node by the first node, the second node is initialized in part by receiving a node identification indicator from the second node. The node identification indicator is included in a node advertisement message sent by the second node during a giveback wait phase of the storage redundancy giveback. The node identification indicator includes an intra-cluster node connectivity identifier that is used by the first node to determine whether the second node is an intra-cluster takeover partner. In response to determining that the second node is an intra-cluster takeover partner, the first node completes the giveback of storage resources to the second node.Type: GrantFiled: March 14, 2019Date of Patent: August 23, 2022Assignee: NetApp Inc.Inventors: Amit V. Panara, Chaitanya V. Patel, Hrishikesh Keremane, Pankti Vinay Majmudar, Santhosh Unnikrishnan, Sravan Kumar Elpula, Susan M. Coatney
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Patent number: 11422907Abstract: While connected to cloud storage, a computing device writes data and metadata to the cloud storage, indicates success of the write to an application of the computing device, and, after indicating success to the application, writes the data and metadata to local storage of the computing device. The data and metadata may be written to different areas of the local storage. The computing device may also determine that it has recovered from a crash or has connected to the cloud storage after operating disconnected and reconcile the local storage with the cloud storage. The reconciliation may be based at least on a comparison of the metadata stored in the area of the local storage with metadata received from the cloud storage. The cloud storage may store each item of data contiguously with its metadata as an expanded block.Type: GrantFiled: August 19, 2013Date of Patent: August 23, 2022Assignee: MICROSOFT TECHNOLOGY LICENSING, LLCInventors: James W. Mickens, Jeremy E. Elson, Edmund B. Nightingale, Bin Fan, Asim Kadav, Osama Khan
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Patent number: 11403213Abstract: A method for transparently moving a block of memory with respect to an application using the block of memory, includes inserting, by a compiler, in an application that includes a memory allocation call, instructions for transparently moving a block of memory with respect to an application using the block of memory. The instructions include obtaining a first pointer returned by a memory allocator, where the first pointer points to an internal data structure, the internal data structure includes a read-write lock and a second pointer, and the second pointer points to an actual memory block. The instructions further include acquiring a read lock on a read-write lock in the internal data structure, before the first pointer is used by the application, obtaining the second pointer to the actual memory block, and dereferencing the second pointer to access the actual memory block for the application data.Type: GrantFiled: June 28, 2019Date of Patent: August 2, 2022Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Wenqi Cao, Arun Iyengar, Gong Su, Zehra Sura, Qi Zhang
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Patent number: 11380415Abstract: A memory device includes: a memory cell array comprising a plurality of memory cells, the plurality of memory cells comprising a plurality of data memory cells including a first data memory cell and a plurality of backup memory cells including a first backup memory cell; a storage storing an error table configured to record errors in the plurality of data memory cells, the error table including a plurality of error table entries, each error table entry corresponding to one of the plurality of data memory cell and having an address and a failure count; and a controller configured to replace the first data memory cell with the first backup memory cell based on the error table.Type: GrantFiled: December 22, 2020Date of Patent: July 5, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hiroki Noguchi, Ku-Feng Lin, Yih Wang
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Patent number: 11368506Abstract: The objective of the present invention is to provide a method, apparatus, computing node and computer program product for fault handling in a stream computing system. Here, at a computing node, recording arrival sequences of respective original data from a upstream computing node; performing persistence operation on the respective original data according to a predetermined period; in the case of failure and restart, restoring to-be-computed data in internal storage from the original data subjected to the persistent operation and/or the upstream computing node, and replaying and computing the restored to-be-computed data according to the respective previous arrival sequences; continuing encoding each completely computed result data according to offset of the result data in the last persistent operation period before the failure and transmitting the encoded result data to a next node.Type: GrantFiled: January 17, 2018Date of Patent: June 21, 2022Assignee: BEIJING BAIDU NETCOM SCIENCE AND TECHNOLOGY CO., LTD.Inventors: Ran Shi, Yi Cheng, Jianwei Zhang, Weikang Gao
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Patent number: 11347594Abstract: A computer-implemented method and system for inter-processor communications fault handling in high performance computing networks. The method includes detecting that an InfiniBand (IB) queue pair has transitioned into an error state based on an unsuccessful completion status that relates to unsuccessful delivery of a message from an initiator endpoint at a first server device to at least one target endpoint at a second server device. The initiator and target endpoints are associated with at least one application under execution. An embodiment includes inferring, when the unsuccessful completion status is indicated as flushed, that the message was in a send queue of the IB queue pair when the IB queue pair transitioned into the error state. An embodiment includes establishing an IB Direct Connect queue pair connection between the target and initiator endpoints. An embodiment includes re-queueing the message in the IB queue pair for dispatch to the target endpoint.Type: GrantFiled: November 26, 2019Date of Patent: May 31, 2022Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: William P. LePera, Sameh Sherif Sharkawi
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Patent number: 11321174Abstract: A method for execution by a computing device of a dispersed or distributed storage network begins or continues by, for a data access request, accessing a plurality of estimated efficiency models of a plurality of processing units of the storage network, where an estimated efficiency model of the plurality of estimated efficiency models includes a list of estimated efficiency probabilities, and the list of estimated efficiency probabilities corresponds to a list of data access request types for a processing unit of the plurality of processing units. The method continues by selecting one of the processing units from the plurality of processing units based on the plurality of estimated efficiency models to produce a selected processing unit. The method continues by sending the data access request to the selected processing unit for execution.Type: GrantFiled: May 31, 2020Date of Patent: May 3, 2022Assignee: Pure Storage, Inc.Inventors: Ravi V. Khadiwala, Jason K. Resch
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Patent number: 11314703Abstract: Methods and apparatus for processing timedly-published data are provided. After receiving an operation request for the timedly-published data, at least one of an append-file and a delete-file can be written according to the operation request. The append-file corresponds to to-be-appended timedly-published data or post-updated timedly-published data. The delete-file corresponds to to-be-deleted timedly-published data or pre-updated timedly-published data. Each of the append-file and the delete-file uses a publishing time of the timedly-published data as an index.Type: GrantFiled: May 3, 2018Date of Patent: April 26, 2022Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITEDInventors: Xiongfeng Zhu, Xiaopeng Cai, Yang Liu, Wu Hu, Jiewen Lin
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Patent number: 11307932Abstract: Writing to a storage system with data striping includes storing blocks of data in local memory until one or more full-stripe write operations can be performed, thus reducing write amplification on the data striped storage system. Crash recovery information includes storing the data associated metadata to respective persistent storage devices. Metadata associated with data from several clients is combined into fixed-size data blocks and stored on the respective persistent storage device.Type: GrantFiled: July 9, 2020Date of Patent: April 19, 2022Assignee: VMware, Inc.Inventors: Wenguang Wang, Vamsi Gunturu, Eric Knauft
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Patent number: 11301137Abstract: An object is to construct a storage system with a configuration with a high degree of freedom while ensuring a certain fault tolerance. The storage system includes a plurality of nodes that process an I/O processing request of data. The node has a storage device and a processor that performs the I/O processing on the storage device. The processor constitutes a data redundancy configuration in which data stored in different storage devices is combined as a data set. A management unit for managing the storage system performs a fault tolerance calculation of calculating fault tolerance information for a failure of each component by using component information that is information of a component including at least the and the storage device, and by using data redundancy configuration information related to the data redundancy configuration, and determines a data arrangement by applying the data redundancy configuration related to the calculated fault tolerance information.Type: GrantFiled: July 1, 2020Date of Patent: April 12, 2022Assignee: HITACHI, LTD.Inventors: Takeru Chiba, Masakuni Agetsuma, Takahiro Yamamoto, Hiroto Ebara
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Patent number: 11294781Abstract: The present disclosure provides a redundancy method for a flash memory device. The flash memory device comprises multiple storage areas in which at least one storage area is configured as a temporary storage area for redundant operations. The method comprises: performing redundant operations to a first set of pages stored in one of the plurality of storage areas in a cache to generate an intermediate result; storing the intermediate result to the storage area of the at least one temporary storage area for redundant operation from the cache; performing redundant operations to the (m+1)th set of pages stored in one storage area the redundant operation result of and the first set of pages stored in the at least one temporary storage area for redundant operation to produce a final result in the cache; storing the final result to the corresponding pages in the (m+1)th set of pages from the cache.Type: GrantFiled: February 18, 2020Date of Patent: April 5, 2022Assignee: RAYMX MICROELECTRONICS, CORP.Inventors: Yufeng Zhou, Shuangxi Chen
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Patent number: 11290486Abstract: The disclosure relates to provisioning honeypot computing services using computing resources in a defective computing resource pool. In one example, a computing system can generate a maliciousness score for a received resource allocation request, determine that the generated maliciousness score exceeds a maliciousness threshold and identify a computing resource in a defective resource pool that is eligible to satisfy the request. The system can then provision honeypot computing services to fulfill the request, using the identified computing resource in the defective resource pool.Type: GrantFiled: December 28, 2015Date of Patent: March 29, 2022Assignee: Amazon Technologies, Inc.Inventor: Nicholas Alexander Allen
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Patent number: 11290099Abstract: An integrated communications subsystem (ICSS) includes a pulse-width modulator which drives a power stage, such as a motor. The pulse-width modulator is configured shut off the power stage when the pulse-width modulator receives a trip signal from a logic circuit of the ICSS. The logic circuit can easily be reprogrammed to send a trip signal only when certain error conditions are detected. Moreover, the ICSS contains one or more filters which can adjust the sensitivity of the logic circuit to error signals, enabling the ICSS to distinguish between true errors which require shutdown and glitches, which can be ignored during operation of the ICSS.Type: GrantFiled: October 9, 2020Date of Patent: March 29, 2022Assignee: Texas Instruments IncorporatedInventors: Thomas Anton Leyrer, Martin Staebler, William Cronin Wallace
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Patent number: 11281774Abstract: Disclosed herein are systems and methods for optimizing antivirus scanning of files on virtual machines. In one aspect, an exemplary method comprises, determining whether there is a record about a file in a verdict cache, when there is, assigning the verdict found in the verdict cache to the file, and when no record is found in the verdict cache, determining whether the file is currently being scanned in a parallel thread, when the file is currently being scanned in a parallel thread, blocking the scanning of the file until the scanning in the parallel thread is completed, and placing a result of the scanning in the parallel thread in the verdict cache, and when the file is not currently being scanned in a parallel thread, performing the scanning of the file on a current thread, and placing a result of the scanning on the current thread in the verdict cache.Type: GrantFiled: June 26, 2019Date of Patent: March 22, 2022Assignee: AO Kaspersky LabInventors: Denis O. Vlaznev, Alexander S. Saliev, Alexander V. Sizov, Ilya B. Godunov, Igor O. Pavlov, Evgeny S. Semenov
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Patent number: 11281546Abstract: A method for managing a persistent storage system includes obtaining, by a first node in a node cluster, a write request, wherein the node cluster comprises the first node and a second node, processing the write request, storing data associated with the write request in a persistent storage system, updating a block-based change list based on the storing, making a first determination that a synchronization schedule is triggered, and in response to the first determination: initiating a block-based change list synchronization to the second node.Type: GrantFiled: May 28, 2020Date of Patent: March 22, 2022Assignee: EMC IP Holding Company LLCInventors: Sunil Yadav, Manish Sharma, Aaditya Rakesh Bansal, Shelesh Chopra
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Patent number: 11269722Abstract: An operation method is used for a memory system including at least one memory device and a controller handling an operation in the at least one memory device. The method can include performing a write operation to a first region of the at least one memory device in response to a first write command set, outputting read data through reading the first region programmed in response to the first write command set, reorganizing plural write command data regarding the first write command set, based on the read data, arranging reorganized write command data based on an index of each reorganized write command data, generating estimated read data based on arranged write command data; and comparing the read data with the estimated read data to verify an operation result of the first write command set.Type: GrantFiled: July 29, 2019Date of Patent: March 8, 2022Assignee: SK hynix Inc.Inventors: Ho-Ryong You, In-Ho Choi
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Patent number: 11249895Abstract: A memory controller for preventing the storage area of a flash memory being reduced is provided. The memory controller controlling access to a flash memory based on a command provided from a host system, the memory controller includes: a processor, a RAM (random access memory), and a mask ROM (read only memory) in which a first firmware is written, wherein the memory controller is configured to: perform a search for a second firmware written in the flash memory based on the first firmware at a start-up time; and write a third firmware provided from the host system in the RAM when the second firmware is not found through the search and perform an initialization based on the third firmware written in the RAM.Type: GrantFiled: September 3, 2019Date of Patent: February 15, 2022Assignee: TDK CORPORATIONInventors: Naoki Mukaida, Kenichi Takubo
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Patent number: 11249863Abstract: Certain embodiments disclosed herein reduce or eliminate a communication bottleneck at the storage manager by reducing communication with the storage manager while maintaining functionality of an information management system. In some implementations, a client obtains information for enabling a secondary storage job (e.g., a backup or restore) from a storage manager and stores the information (which may be referred to as job metadata) in a local cache. The client may then reuse the job metadata for multiple storage jobs reducing the frequency of communication with the storage manager. When a configuration of the information management system changes, or the availability of resources changes, the storage manager can push updates to the job metadata to the clients. Further, a client can periodically request updated job metadata from the storage manager ensuring that the client does not rely on out-of-date job metadata.Type: GrantFiled: May 2, 2018Date of Patent: February 15, 2022Assignee: Commvault Systems, Inc.Inventors: Manoj Kumar Pradhan, Hemant Mishra, Dmitriy Borisovich Zakharkin, Sanath Kumar, Hetalkumar N. Joshi, Sunil Babu Telagamsetti, Divakar Radhakrishnan, Jayasree Yakkala, Rohit Sivadas, Pavan Kumar Reddy Bedadala, Gopikannan Venugopalsamy
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Patent number: 11249905Abstract: A parallel processing unit (PPU) can be divided into partitions. Each partition is configured to operate similarly to how the entire PPU operates. A given partition includes a subset of the computational and memory resources associated with the entire PPU. Software that executes on a CPU partitions the PPU for an admin user. A guest user is assigned to a partition and can perform processing tasks within that partition in isolation from any other guest users assigned to any other partitions. Because the PPU can be divided into isolated partitions, multiple CPU processes can efficiently utilize PPU resources.Type: GrantFiled: September 5, 2019Date of Patent: February 15, 2022Assignee: NVIDIA CORPORATIONInventors: Jerome F. Duluk, Jr., Gregory Scott Palmer, Jonathon Stuart Ramsey Evans, Shailendra Singh, Samuel H. Duncan, Wishwesh Anil Gandhi, Lacky V. Shah, Eric Rock, Feiqi Su, James Leroy Deming, Alan Menezes, Pranav Vaidya, Praveen Joginipally, Timothy John Purcell, Manas Mandal
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Patent number: 11237904Abstract: A method for execution by a dispersed storage and task (DST) processing unit that includes a processor includes receiving an access request from a requesting entity via a network indicating an original data object. At least one read request is generated for transmission to at least one storage unit indicating a plurality of encoded original data slices associated with the original data object. A regenerated original data object is generated by utilizing a decoding scheme on the plurality of encoded original data slice. A transformed data object is generated for transmission to the requesting entity via the network by utilizing a transformation function on the first regenerated original data object based on an entity identifier associated with the requesting entity.Type: GrantFiled: July 31, 2018Date of Patent: February 1, 2022Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Trent William Johnson
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Patent number: 11237910Abstract: This disclosure provides a method and apparatus for saving and restoring state information of a wireless device with varying amounts of available power, such as wireless devices that may harvest power from radio-frequency signals. The wireless device may save and restore varying amounts of state information based at least in part on the amount of power available. In some embodiments, some of the stored state information may be lost as the available power decreases.Type: GrantFiled: April 25, 2019Date of Patent: February 1, 2022Assignee: Atmosic Technologies Inc.Inventors: Steven Thomas Stoiber, David Kuochieh Su
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Patent number: 11238025Abstract: Provided are devices and methods for repairing corrupt data using a secure environment in a productive system. In one example, the method includes receiving a request to modify a base table stored in a productive environment, generating a child table corresponding to the base table within a secure environment of the productive system, modifying the one or more table entries from the base table and storing the modified table entries in the child table, executing one or more operations on the child table within the secure environment to determine if the one or more modified table entries repair the base table, and outputting a determined result of the one or more operations to a user interface. As a result, corrupt data can be modified locally via inheriting tables within a secured environment without any further damage being done to productive data in a productive environment.Type: GrantFiled: May 13, 2020Date of Patent: February 1, 2022Assignee: SAP SEInventors: Sebastian Mietke, Toni Fabijancic
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Patent number: 11237892Abstract: Example techniques for obtaining data for identifying a fault are described. In response to receiving a fault message corresponding to a first device, a computing device determines a first set of data to be obtained for identifying the fault. The first set of data to be obtained is determined based on a workload of the computing device. The first set of data is then obtained.Type: GrantFiled: April 19, 2021Date of Patent: February 1, 2022Assignee: Hewlett Packard Enterprise Development LPInventors: Naveena Kedlaya, Tushar Bajpai
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Patent number: 11233739Abstract: A system and method for load balancing using a rendezvous hashing load balancer. The method includes generating a lookup table, the lookup table having cells that define a row and a column, wherein each of the row of the lookup table corresponds to an index, and each of the column corresponding to an identifier of a resource of a plurality of resources towards which the load balancer provides access, generating, for each of the cells, a first hash result based on an index of the each of the cells, and a corresponding resource identifier, each of the corresponding resource identifier associated with a unique resource of the plurality of resources, sorting the column of the lookup table for each of the row, based on the first hash result, and storing the sorted lookup table in a memory of the load balancer.Type: GrantFiled: July 15, 2020Date of Patent: January 25, 2022Assignee: Qwilt, Inc.Inventors: Adan Alper, Oren Shemesh
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Patent number: 11221786Abstract: Data protection operations based on direct storage access. Data protection operations that involve large data transfers are optimized or improved by transferring the data using a communication path that includes direct access to disks of a storage array. This avoids latencies associated with transferring data through the layers of the storage array. The locations of the data to be transferred are identified and provided to an appliance. The appliance can then read and transfer the data over a communication path that includes direct disk access.Type: GrantFiled: March 30, 2020Date of Patent: January 11, 2022Assignee: EMC IP HOLDING COMPANY LLCInventors: Alex Solan, Jehuda Shemer, Gabi Benhanokh
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Patent number: 11182149Abstract: A computer-implemented method and related system for runtime code patching comprises determining, by a runtime, that a runtime event occurred. In response to the determination, performing by the runtime blocking processing of the runtime event, and runtime patching a method in response to an executing thread associated with the method yielding. Each executing thread receives runtime patching and only methods currently executing are runtime patched. Unblocking the runtime event allows execution to continue.Type: GrantFiled: September 30, 2019Date of Patent: November 23, 2021Assignee: International Business Machines CorporationInventor: Andrew James Craik
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Patent number: 11150984Abstract: Systems and methods for increasing the endurance of a solid state drive are disclosed. The disclosed systems and methods can assign different levels of error protection to a plurality of blocks of the solid state drive. The disclosed methods can provide a plurality of error correction mechanisms, each having a plurality of corresponding error correction levels and associate a first plurality of blocks of the solid state drive with a first zone and a second plurality of blocks of the solid state drive with a second zone. The disclosed methods can assign a first error correction mechanism and a first corresponding error correction level to the first zone and can assign a second error correction mechanism and a second corresponding error correction level to the second zone.Type: GrantFiled: March 19, 2020Date of Patent: October 19, 2021Assignee: Western Digital Technologies, Inc.Inventors: Ashish Singhai, Vijay Karamcheti, Ashwin Narasimha
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Patent number: 11138229Abstract: Techniques are provided for dependency aware parallel splitting of operations. For example, a first operation and a second operation may be replicated in parallel from a first device to a second device if the operations only target a single common inode that is an access control list inode referenced by the operations. An operation that dereferences the access control list inode can be replicated in parallel with other operations if the operation does not have the potential to delete the access control list inode from the second device. In another example, operations may be replicated to the second device in parallel if the operations only affect a single common parent directory inode and where timestamps are only moved forward in time at the second device.Type: GrantFiled: September 20, 2019Date of Patent: October 5, 2021Assignee: NetApp Inc.Inventor: Krishna Murthy Chandraiah setty Narasingarayanapeta
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Patent number: 11128578Abstract: A storage system switching mediators within a storage system synchronously replicating data, where the switching between mediators includes: determining, among one or more of the plurality of storage systems, a change in availability of a first mediator service, wherein one or more of the plurality of storage systems are configured to request mediation from the first mediator service; communicating, among the plurality of storage systems and responsive to determining the change in availability of the first mediator service, a second mediator service to use in response to a fault; and switching, in dependence upon the change in availability of the first mediator service, from the first mediator service to the second mediator service.Type: GrantFiled: July 31, 2018Date of Patent: September 21, 2021Assignee: Pure Storage, Inc.Inventors: David Grunwald, Ronald Karr, Thomas Gill
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Patent number: 11128415Abstract: A device that comprises a plurality of distributed transceivers, a central processor and a network management engine may be configured to function as relay device, relaying an input data stream from a source device to at least one other device. The relaying may include configuring one or more of the plurality of distributed transceivers to particular mode of relay operation and receiving the input data stream from the source device via at least one of the configured one or more of the plurality of distributed transceivers. The relaying may also include transmitting at least one relay data stream corresponding to the input data stream to the at least one other device, via at least one of the configured one or more of the plurality of distributed transceivers.Type: GrantFiled: June 25, 2019Date of Patent: September 21, 2021Assignee: GOLBA LLCInventor: Mehran Moshfeghi
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Patent number: 11126513Abstract: A customer may use a disaster recovery service to generate a disaster recovery scenario in order to make certain resources available to the customer in the event of a data region failure. The customer may specify a recovery point objective, a recovery time objective and a recovery data region for the scenario. Accordingly, the disaster recovery service may coordinate with one or more other services provided by the computing resource service provider to reproduce the customer resources and other resources necessary to support the customer resources. These reproduced resources may be transferred to the recovery data region based at least in part on the parameters specified by the customer. In the event of a data region failure, the disaster recovery service may update the domain name system to resolve any customer requests for the customer resources to the recovery data region.Type: GrantFiled: July 16, 2018Date of Patent: September 21, 2021Assignee: Amazon Technologies, Inc.Inventors: Vikram Garlapati, Craig Keith Carl