Abstract: A technique for verifying the consistency of slice allocation metadata includes accessing, from user space of an operating system running on the data storage apparatus, a set of drivers running in kernel space of the operating system to obtain slice allocation metadata from the set of drivers, and identifying discrepancies in slice allocation metadata returned from the set of drivers on a per-file-system basis.

Abstract: A memory degeneracy method is executed by an information processing device in which a plurality of virtual machines operate. The memory degeneracy method includes storing, in a storage unit, a physical address or address information of a memory module, which corresponds to a virtual physical address relevant to a fault, in response to detecting the fault in a memory area assigned to a first virtual machine; changing an association relationship between virtual physical addresses and physical addresses relevant to the first virtual machine, before an operating system operating on the first virtual machine is rebooted in response to detecting the fault; and removing, from a usage target of the operating system, the virtual physical address corresponding to the physical address or the address information of the memory module stored in the storage unit.

Abstract: Techniques for predicting multiple disk failures are described herein. According to one embodiment, first values of a predetermined diagnostic parameter collected from a set of known failed disks of a storage system are received. A quantile distribution graph of the first values against percentiles of a number of known failed disk is generated. In response to second values of the predetermined diagnostic parameter collected from a set of target disks, each of the second values is applied to the quantile distribution graph to determine a corresponding percentile for each of the target disks, which represents a failure probability of a corresponding one of the target disks. A failure probability of two or more of the target disks is calculated based on the determined percentiles of the target disks.

Abstract: Techniques for tenant-bases storage security and service level assurances in a cloud environment are presented. A Tenant Storage Machine (TSM) for each tenant uses a unique identifier. The TSM is dynamically allocated with operating system resources to run processes based on agreed service level assurances. The service level assurances are stored in a Service Level Assurance (SLA) policy store. The TSM communicates with the SLA policy store via a TSM bus to acquire a SLA policy configured for the tenant and based on which resources are dynamically allocated. Processes running under the TSM run with root privileges to provide security.

Abstract: A calibrating memory interface circuit is described wherein prior to a calibration operation at least a portion of application information contained in a memory circuit is moved or copied to an alternate location to preserve that information. At the completion of the calibration operation, the information is restored to the same location of the memory circuit. Thus, the calibration operation can be performed from time to time during normal operation of a system containing the memory circuit. Non-limiting examples of calibration operations are described including operations where a capture clock for a memory read circuit is calibrated, and operations where CAS latency compensation is calibrated for a DDR memory interface.

Abstract: A processor copies first information stored in a first storage to a backup volume. The processor stores management information when a first piece of the first information is updated to second information after the copy. The processor executes, when a failure occurs in the first storage, first restoration based on the management information and reference information stored in reference storages other than the first storage. The first restoration restores the second information to a spare storage. The processor executes second restoration based on the management information and the reference information. The second restoration restores third information to the spare storage. The processor stops the second restoration when a failure occurs in a second storage while the second restoration is being executed. The processor executes third restoration based on the first information stored in the backup volume and the management information. The third restoration restores fourth information to the spare storage.

Abstract: Storage system comprises a second storage apparatus, which is coupled to multiple first storage apparatuses and is of a different type from the first storage apparatuses, and a first control device, which exists either inside or outside of the second storage apparatus. Row of stripes comprising multiple data elements obtained by segmenting a prescribed data unit, and a redundancy code for rebuilding the data elements, is distributively stored in multiple first storage apparatuses, which are more numerous than the total number of stripe data elements, which are either the data elements or redundancy code, in the row of stripes. The row of stripes is configured to enable the rebuilding of the stripe data elements even when a failure has occurred in up to a prescribed allowable number, which is two or more, of the first storage apparatuses storing the stripe data elements of the relevant row of stripes.

Abstract: A control device manages a plurality of storage devices so that data to be recorded is redundantly recorded in different storage devices. An error monitoring unit monitors an occurrence of an error in each of the plurality of storage devices to register information indicative of error occurrence conditions in an error information storage unit for each storage device. When the use of one of the plurality of storage devices is stopped, a rebuild controller determines a timing to perform rebuild processing based on past error occurrence conditions in the storage devices other than the one storage device of the plurality of storage devices by referring to information registered in the error information storage unit.

Abstract: A memory system includes a memory controller configured to replace a memory block including a failed memory cell with a unit cache block of a cache memory in response to detection of the failed memory cell in the memory block. The unit cache block is smaller than a minimum size of a memory cell array capable of being blocked by an operating system, and the unit cache block has substantially the same storage capacity as the memory block.

Abstract: Certain embodiments herein are directed to an online game system, computer-readable medium, and a method comprising: providing a network system comprising a central device and a plurality of remote devices, each said remote device being connected to the central device; providing a plurality of data objects in the network system; and, for running an online game session in the network system, implementing a mode of operation, comprising: assigning each of said data objects to at least one of the remote devices, thereby, giving the at least one remote device control over the assigned data object, and excluding the central device from control over each of said data objects; and, for the plurality of remote devices, limiting data object related game data exchange to a direct data exchange with the central device only.

Abstract: A system, method, and computer program product for performing a bare-metal restore, the system including a target storage device, and a target computer configured to boot independent of the target storage device, expose the target storage device to a restoring computer after the target computer has booted, and act as a conduit for the restoring computer to perform a bare-metal restore of backup data onto the target storage device, and the method including booting a target computer independent of a target storage device, exposing the target storage device to a restoring computer after the target computer has booted, and causing the target computer to act as a conduit for the restoring computer to perform a bare-metal restore of backup data onto the target storage device.

Abstract: A method and system for recovering data written onto a storage device when system failure and/or damage occur during use is provided. A memory of the storage device is divided into a plurality of information zones, for storing data as a codeword set, and a plurality of check zones, for storing checksums, of equal size selected from different parts of the storage device. A computing unit calculates etalon checksums with an established formula during each write data operation for each codeword set in the information zones. If failure, damage or data corruption occurs, computing unit calculates current checksums using an established formula. The values of the stored etalon checksums and the current checksums are used for data recovery, which is performed by solving the system of equations, received from the formula for computing the checksums. Parallel calculation schemes are used in checksum computing and for data recovery.

Abstract: An imminent state reset of a data storage device is detected. In response to determining volatile data of the data storage device could be lost in response to the state reset, the volatile data of the data storage device is stored to a backup memory of the data storage device together with first header data that facilitates recovering the volatile data. The backup memory includes non-volatile, solid-state memory. In response to determining the volatile data would not be lost in response to the state reset, second header data is stored in the backup memory. After the state reset, a recovery of the volatile data from in the backup memory is attempted if the first header data is detected, or a host device is alerted if neither the first header data or second header data is detected.

Abstract: Method and apparatus for managing data in a memory, such as a flash memory. In accordance with some embodiments, a memory has a plurality of solid-state non-volatile memory cells. A processing circuit is connected to the memory and configured to direct the execution of a plurality of read error recovery routines in response to at least one uncorrectable read error in a data set retrieved from the memory. The recovery routines are executed in a selected order based on an elapsed recovery time parameter for each of the recovery routines and an estimated probability of success of each of the recovery routines.

Abstract: A memory controller is provided between a CPU and a main memory, controls access from the CPU to the main memory, and includes a data storage area and a controller. In a case where error information indicating that an error occurs is included in write data from the CPU to the main memory, the controller stores the write data in a data storage area in association with a writing destination address. Therefore, even in a case where the error information is not written in the main memory, the error information can be recorded.

Abstract: A method, system and computer program product are provided for implementing ECC (Error Correction Codes) memory module communications with a host processor in multi-ported memory configurations in a computer system. Each of multiple memory modules operating in unison is enabled to identify which memory module is the one required to communicate module specific information back to the host processor. All of the multiple memory modules operating in unison are enabled to generate back to the host processor a valid ECC word, while other multiple memory modules individually being unaware of data contents of the one memory module required to communicate back to the processor.

Abstract: Mechanisms for handling multiple data errors that occur simultaneously are provided. A processing device may determine whether multiple data errors occur in memory locations that are within a range of memory locations. If the multiple memory locations are within the range of memory locations, the processing device may continue with a recovery process. If one of the multiple memory locations is outside of the range of memory locations, the processing device may halt the recovery process.

Abstract: A processor includes a plurality of processing sections, each of which executes a predetermined process. A plurality of fault detecting circuits are respectively provided for the plurality of processing sections, to detect a fault in one of the plurality of processing sections as a fault processing section to generate a fault detection signal. A fault monitoring and control section controls a normal processing section as at least one of the plurality of processing sections other than the fault processing section to execute a relieving process in response to the fault detection signal. The relieving process is determined based on a process load of the fault processing section, a process load of the normal processing section, and priority levels of processes to be executed by the fault processing section and the normal processing section.

Abstract: A computer-implemented method of debugging computer code includes: obtaining state information corresponding to a first machine at a checkpoint initiated during execution of the computer code on the first machine; and configuring the second machine to a same operating state as the first machine at the checkpoint to create a mirrored version of the first machine. The method also includes receiving a notification that execution of the program on a first machine has failed, and in response to receiving the notification: triggering a processor of the second machine to initiate execution of a copy of the code from a specific code execution point at which the checkpoint was; activating a debugger module to run concurrently with the execution of the program on the second machine and collect and store the debug data as corresponding to execution failure of the computer code at the first machine.

Abstract: A serial advanced technology attachment dual in-line memory module (SATA DIMM) device includes a circuit board. A storage chip is arranged on the circuit board and stores a first firmware. A memory is arranged on the circuit board and stores a second firmware. A control chip is arranged on the circuit board and connected to the memory, to read the second firmware from the memory and load the second firmware in the storage chip when the first firmware stored in the storage chip is damaged. The control chip is also connected to the storage chip, to control the storage chip to read or to write data.

Abstract: A reshift unit within a computer system is configured to store repair information associated with random-access memory (RAM) modules that reside in different power regions. When one or more RAM modules in a given power region need to be repaired, the reshift unit identifies a portion of the repair information that is relevant to those RAM modules. The reshift unit then transmits that portion to the RAM modules, thereby repairing those RAM modules. Accordingly, RAM modules in a given power region can be repaired independently of RAM modules in other power regions. Advantageously, RAM modules can be repaired between cold boots without implementing the slow repair procedure performed by the fuse block during cold boot.

Abstract: A technique of managing thin pool logical unit (TLU) recovery is performed in a data storage array that forms TLUs from a slice storage pool of logical unit (LUN) slices. The technique involves allocating a set of LUN slices of the slice storage pool to support TLU recovery. The technique further involves, after the set of LUN slices has been allocated, taking offline a TLU which currently requires TLU recovery. The technique further involves, while the TLU is offline, performing a TLU recovery procedure to recover the TLU. The TLU recovery procedure utilizes the set of LUN slices that was allocated to support TLU recovery.

Abstract: Method and system for performing recovery for a replicated copy of a storage space presented as a logical object is provided. An attribute associated with the logical object for enabling the recovery is set and when the storage space is replicated the attribute is stored as metadata for the replicated copy of the storage space. Based on the attribute, a clone of the logical object is presented as a writable option to write to the first replicated copy. After the write operation where information is written to the clone, a second replicated copy with the clone information is created. The clone is deleted after the second copy is generated.

Abstract: A method and a system are provided for partitioning a system data bus. The method can include partitioning off a portion of a system data bus that includes one or more faulty bits to form a partitioned data bus. Further, the method includes transferring data over the partitioned data bus to compensate for data loss due to the one or more faulty bits in the system data bus.

Abstract: A memory device includes a boot-up control unit configured to control a start of boot-up operation by starting the boot-up operation when an initialization signal is activated, and ignore the initialization signal after a complete signal is activated, a nonvolatile memory unit configured to store repair data, and output the stored repair data during the boot-up operation, a plurality of registers configured to store the repair data outputted from the nonvolatile memory unit, a plurality of memory banks configured to replace a normal cell with a redundant cell, using the repair data stored in the corresponding registers among the plurality of resistors, and a verification unit configured to generate the complete signal to notify that the boot-up operation is completed.

Abstract: Since the whole storage device is blocked according to the conventional data saving method when failure occurs to the storage device in a storage subsystem, so that when failure occurs to two storage devices at the same time within a same RAID group, double failure is caused and data loss occurs. In order to solve the problem, the present invention divides a storage device into storage areas of predetermined units, constructs RAID groups from two or more storage areas, and when failure occurs to the storage area, selects a data migration destination storage area from either the RAID group in which failure has occurred or the RAID group other than the RAID group in which failure has occurred, migrates the data stored in the storage area where failure has occurred to the selected data migration destination storage area, and blocks only the storage area where failure has occurred.

Abstract: A storage control device includes a processor. The processor is configured to detect medium error regions in a first memory device. A medium error has occurred in each of the medium error regions. The processor is configured to conduct, on a first medium error region, data recovery processing for recovering data stored therein. The processor is configured to conduct copy processing for copying first data of a peripheral region of the first medium error region from the first memory device to a second memory device other than the first memory device.

Abstract: A storage device includes at least one nonvolatile memory device; and a memory controller configured to control the nonvolatile memory device, wherein the memory controller includes, at least one processor configured to control an overall operation of the memory controller; a buffer memory configured to store input/output data according to a control of the processor when an input/output request from an external device occurs; an error correction circuit configured to detect and correct an error of the input/output data; a garbage collector configured to selectively generate a first global garbage collection command in response to the input/output request and configured to perform a global garbage collection according to a second global garbage collection command received from the external device; and a storage interface configured to transmit the first global garbage collection command to another storage device.

Abstract: Embodiments described herein are directed to a virtual repair of digital media using a virtual repair service. Digital media stored on a digital media device is read using a media player. A request is received by a virtual repair unit from the media player to perform a virtual repair of a segment of unreadable digital content of the digital media. The virtual repair unit retrieves a readable copy of the digital content corresponding to the segment of unreadable digital content identified in the request from a media repository using the virtual repair unit. The virtual repair unit transmits the readable copy of the digital content to the media player for insertion into a buffer of the media player.

Abstract: A method for data storage includes storing data in a memory including multiple analog memory cells arranged in blocks. A first subset of the blocks is defined for storing first data with a first storage density, and a second subset of the blocks is defined for storing second data with a second storage density, larger than the first storage density. In each of the first and second subsets, one or more blocks are allocated to serve as spare blocks and blocks that become faulty are replaced with the spare blocks. Upon detecting that a number of the spare blocks in the second subset has decreased below a predefined threshold, the data is copied from at least one block in the second subset to the first subset, and the at least one block is added to the spare blocks of the second subset.

Abstract: An approach is provided for integrating data. Data is collected from one or more source systems and workflow data is extracted from the collected data. One or more predetermined tasks associated with execution of a workflow based on the workflow data are identified. Status information relating to progress of the workflow towards completion is estimated by correlating the workflow data with the one or more predetermined tasks.

Abstract: As regards a hardware fault which has occurred in a computer, a hypervisor notifies an LPAR which can continue execution, of a fault occurrence as a hardware fault for which execution can be continued. Upon receiving the notice, the LPAR notifies the hypervisor that it has executed processing to cope with a fault. The hypervisor provides an interface for acquiring a situation of a notice situation. It is made possible to register and acquire a situation of coping with a hardware fault allowing continuation of execution through the interface, and it is made possible to make a decision as to the situation of coping with a fault in the computers as a whole.

Abstract: Management apparatus and method to prevent a drop in the service quality of data. In a computer system which replicates and holds data which is stored in a storage apparatus by a communication terminal in other storage apparatuses, physical position information of the storage apparatuses and the communication terminal is collected and, at the time of the disaster recovery processing, a storage apparatus for which the data of the secondary system is to be switched to the primary system is selected from among the storage apparatuses which hold the data of the secondary system on the basis of physical position information in a first predetermined period among the collected physical position information of the communication terminal, and a policy preconfigured for the data, and an instruction is issued to the selected storage apparatus to switch the data of the secondary system held by the storage apparatus to the primary system.

Abstract: Dynamic graduated memory device protection in redundant array of independent memory (RAIM) systems that include a plurality of memory devices is provided. A first severity level of a first failing memory device in the plurality of memory devices is determined. The first failing memory device is associated with an identifier used to communicate a location of the first failing memory device to an error correction code (ECC). A second severity level of a second failing memory device in the plurality of memory devices is determined. It is determined that the second severity level is higher than the first severity level. The identifier from the first failing memory device is removed based on determining that the second severity level is higher than the first severity level. The identifier is applied to the second failing memory device based on determining that the second severity level is higher than the first severity level.

Abstract: Dynamic graduated memory device protection in redundant array of independent memory (RAIM) systems that include a plurality of memory devices is provided. A first severity level of a first failing memory device in the plurality of memory devices is determined. The first failing memory device is associated with an identifier used to communicate a location of the first failing memory device to an error correction code (ECC). A second severity level of a second failing memory device in the plurality of memory devices is determined. It is determined that the second severity level is higher than the first severity level. The identifier from the first failing memory device is removed based on determining that the second severity level is higher than the first severity level. The identifier is applied to the second failing memory device based on determining that the second severity level is higher than the first severity level.

Abstract: Some embodiments include apparatuses and methods having a memory structure included in a memory device and a control unit included in the memory device. The control unit can provide information obtained from the memory structure during a memory operation to a host device (e.g., a processor) in response to a command from the host device. If the control unit receives a notification from the host device indicating that the host device has detected an error in the information obtained from the memory structure, then a repair unit included in the memory device performs a memory repair operation to repair a portion in the memory structure.

Abstract: A method for maintaining applications may include: (1) receiving a request to recover a first application, (2) identifying a first production topology of the first application that identifies a set of resources upon which the application depends, (3) maintaining a template for transforming the first production topology of the first application into a first recovery topology for the first application, the template comprising information for mapping the first production topology to the first recovery topology, (4) applying the template to the first production topology at a first point in time to create the first recovery topology, and (5) recovering the first application to a first computing system using the first recovery topology. Various other methods, systems, and computer-readable media are also disclosed herein.

Abstract: Some embodiments of the invention provide techniques whereby a user may perform a system reset (e.g., to address system performance and/or reliability degradation, such as which may be caused by unused applications that unnecessarily consume system resources, an attempted un-install of an application that left remnants of the application behind, and/or other causes). In some embodiments, performing a system reset replaces a first instance of an operating system on the system with a new instance of the operating system, and removes any applications installed on the system, without disturbing the user's data.

Abstract: A storage integrity system in a dispersed storage network scans an address range of data slices to identify errors in one of a plurality of encoded data slices, wherein the plurality of encoded data slices are generated from a data segment using an error encoding dispersal function. When the storage integrity system detects an error, it identifies one of the encoded data slices for rebuilding. The identified data slice is rebuilt in response to the type of error. For example, when the type of the error includes a temporary error, the storage integrity system waits a predetermined time period to determine whether the error still exists prior to rebuilding the identified data slice.

Abstract: A display apparatus and a method for updating a micom code thereof are provided. According to the display apparatus, if an error occurs while a CPU is updating a micom code, a micom may drive the CPU using a system code. Accordingly, even if an error occurs in the process of updating the micom code, the display apparatus may be restored automatically without a jig apparatus.

Abstract: Memory devices and methods are described that include serially chained memory devices. In one or more of the configurations shown, a serial chain of memory devices includes a number of memory devices, and an error recovery device at an end of the chain. In one configuration shown, the serial chain of memory devices includes a chain of devices where each device is a stacked die memory device. Methods are described that show using the error recovery device in write operations and data recovery operations.

Abstract: A remote management module receives a command from a support server in response to the remote management module initiating a first secure, authenticated connection with the support server, wherein the remote management module is integrated with, and monitors a condition of, a processing system. The remote management module executes the command to generate a result that provides diagnostic data about the processing system. The remote management module reports the result to the support server upon the remote management module initiating a second secure, authenticated connection with the support server.

Abstract: A method begins by creating a vault as a virtual memory block within memory of a dispersed storage network (DSN). A segment of data is encoded into a set of encoded data slices and stored in the vault. The method continues by dividing the virtual memory block into a set of vault regions. The method continues by determining, for each vault region of the set of vault regions, vault parameters to produce a set of vault parameters. Vault parameters include a decode threshold number of encoded data slices and a total number of encoded data slices for encoding the segment of data. The method continues by facilitating data access to the vault in accordance with the set of vault parameters.

Abstract: An application instance identifier is employed with various systems and methods in order to provide a requestor with continuous access to a resource when operating in a client clustered environment. A requestor residing on a first client may attempt to access a resource. The first client sends a request to access the resource. The request may be associated with an application instance identifier that identifies the requestor. At some point, the first client fails and the requestor is associated with a second client via a failover mechanism. The second client sends a second request to access the resource on behalf of the requestor. The second request is associated with the requestor's application instance identifier. The application instance identifier is used to identify the second request as belonging to the same requestor as the first request, thereby granting the second request to access the resource while avoiding a conflict situation.

Abstract: The present invention discloses a method and device for reading a memory card comprising a primary partition and at least one backup partition. The method comprises the following steps that: after writing a first file into the primary partition of the memory card, a read/write device writes the first file into the at least one back partition; and when reading a second file from the memory card, the read/write device reads the second file from the at least one backup partition or from the primary partition if an error occurs in the reading of the second file from the backup partition. The method and device provided herein address the problems existing in the prior art that an embedded system is unstable because of the low error tolerance of a memory card.

Abstract: Providing heterogeneous recovery in a redundant memory system that includes a memory controller, a plurality of memory channels in communication with the memory controller, an error detection code mechanism configured for detecting a failing memory channel, and an error recovery mechanism. The error recovery mechanism is configured for receiving notification of the failing memory channel, for performing a recovery operation on the failing memory channel while other memory channels are performing normal system operations, for bringing the recovered channel back into operational mode with the other memory channels for store operations, for continuing to mark the recovered channel to guard against stale data, for removing any stale data after the recovery operation is complete, and for removing the mark on the recovered channel to allow the normal system operations with all of the memory channels, the removing based on the removing any stale data being complete.

Abstract: Example embodiments relate to downloading a disk image from a server while reducing the corruption window. In example embodiments, a computing device writes a recovery image to a portion of a primary storage device. The computing device may then write the disk image to the primary storage device until a portion of the disk image corresponding to the recovery image remains. Next, the computing device may write the remaining portion of the disk image to a secondary storage location. Finally, the computing device may overwrite the recovery image using the remaining portion of the disk image from the secondary storage location.

Abstract: A variety of data storage devices, methods and systems are implemented for control of memory associated with backup functionality. One such data storage device includes a power circuit that provides main power. The data storage device has a first solid-state memory circuit that maintains data in the absence of electrical power. A second memory circuit is subject to data loss in the absence of electrical power. A storage circuit stores energy and provides the stored energy to the second memory circuit in response to a loss of main power. A test circuit discharges a portion of the stored energy to provide output data indicative of power-providing capabilities of the storage circuit. A memory controller controls data transfers to the data storage device by temporarily storing data destined for the first solid-state memory circuit and setting the amount of memory available for temporary storage in response to the output data.

Abstract: A backup and restoration process which first attempts to recover information blocks from locally connected information handling systems executing a backup/restore service before looking to the slower access cloud store to recover data blocks.

Abstract: Memory devices and methods are described that include serially chained memory devices. In one or more of the configurations shown, a serial chain of memory devices includes a number of memory devices, and an error recovery device at an end of the chain. In one configuration shown, the serial chain of memory devices includes a chain of devices where each device is a stacked die memory device. Methods are described that show using the error recovery device in write operations and data recovery operations.