Of Memory Patents (Class 714/6.1)
  • Patent number: 10382446
    Abstract: A computerized method of managing a computer remote session operation, comprising providing a server for hosting application execution; configuring a number of predefined user accounts with low security permissions on said server, where said user accounts are not tied to any specific real user; Whenever a remote user requests to start a remote session, finding an available user account not currently in use on said computer, allocating it for the remote session and marking it as unavailable for subsequent session requests; Generating a one-time password for said user account; Communicating the assigned user account identifier and temporary password to client component on the user's side, either directly or through an intermediate broker, causing the client component to connect to the server using said user account identifier and temporary password; and, upon termination of the remote session, deleting the assigned user account's data and marking it as available again.
    Type: Grant
    Filed: May 23, 2016
    Date of Patent: August 13, 2019
    Assignee: Cameyo Inc.
    Inventor: Eyal Dotan
  • Patent number: 10360193
    Abstract: A system and method for archiving and analyzing data are disclosed. The system receives event data associated with a process; responsive to receiving the event data, determines process data associated with the process; generates process metadata from the event data and the process data; and stores the event data, the process data, and the process metadata in a data repository organized by the process metadata. Since the process data is determined early on in the data pipeline, the system can significantly reduce the amount of computation required for generating data analytics. The system is also capable of providing analytic results computed against a massive amount of archived data in real-time or near real-time as user requests are initiated. Efficiency of process mining and process optimization is also improved due to enhanced information stored for archived processes.
    Type: Grant
    Filed: March 24, 2017
    Date of Patent: July 23, 2019
    Assignee: Western Digital Technologies, Inc.
    Inventors: Sanhita Sarkar, Kannan J. Somangili, Shanker Valipireddy, Harold Woods
  • Patent number: 10360370
    Abstract: Examples include an authenticated access to manageability hardware components in a computing device. Some examples enumerate manageability hardware components connected to an operative system kernel of the computing device, the manageability hardware components comprising a bus configuration space and the bus configuration space comprising memory map registers. Some examples include encoding an address stored in the memory map registers of each of the manageability hardware components to produce encoded address to control unauthorized accesses and locks the bus configuration space of each manageability hardware component by setting a read-only attribute to the bus configuration space. Some examples reprogram, in response to a request for access of an authenticated OS component to a manageability hardware component, the memory map register of the requested manageability hardware component with an accessible address to provide the authenticated OS component with access to the manageability hardware component.
    Type: Grant
    Filed: May 11, 2017
    Date of Patent: July 23, 2019
    Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventors: Suhas Shivanna, Srinivasa Ragavan Rajagopalan, Nagaraj S Salotagi
  • Patent number: 10324664
    Abstract: A memory controller includes: a memory that holds a physical block counter including the number of erase times, a logical block counter including the number of write times, and a logical-physical conversion table; and a control unit that writes data to any physical block address. When the control unit receives a writing data instruction, the control unit updates the number of write times corresponding to the write destination logical block address, if the number of write times corresponding to the write destination logical block address is large, the control unit allocates to the write destination logical block address a physical block address with the number of erase times which is small among spare blocks not allocated to the logical block addresses in the logical-physical conversion table, updates the number of erase times corresponding to the allocated physical block address, and updates the logical-physical conversion table.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: June 18, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Hirokazu So, Toshiyuki Honda, Shigekazu Kogita
  • Patent number: 10303560
    Abstract: In accordance with embodiments of the present disclosure, a method may include, during a cache flush of data of a cache entry from a non-volatile memory to a storage resource, wherein the non-volatile memory is integral to a persistent write-back cache and storing the data in response to a power event associated with the write-back cache: (a) calculating a calculated parity value by undertaking a read-modify-write operation with respect to the storage resource; and (b) storing the calculated parity value and a target address of the storage resource associated with the calculated parity value in a parity journal.
    Type: Grant
    Filed: February 14, 2017
    Date of Patent: May 28, 2019
    Assignee: Dell Products L.P.
    Inventors: Chandrashekar Nelogal, Anand Nunna
  • Patent number: 10289507
    Abstract: A storage server comprises a plurality of storage devices arranged in a redundant storage array and a plurality of controllers. One of the controllers determines that a storage device in the redundant storage array has failed, determines a first portion of the storage device to be recovered by a first controller and determines a second portion of the storage device to be recovered by a second controller. The first controller recovers the first portion of the storage device and the second controller recovers the second portion of the storage device.
    Type: Grant
    Filed: October 26, 2016
    Date of Patent: May 14, 2019
    Assignee: Pavilion Data Systems, Inc.
    Inventors: Kiron Balkrishna Malwankar, Karagada Ramarao Kishore, Sundar Kanthadai
  • Patent number: 10289593
    Abstract: A hot swap management device includes a bus buffer, a hot swap switch, and a controller. The bus buffer is selectively coupled to a host system management bus of a server. The hot swap switch is coupled to the bus buffer and a hardware expansion device. The controller is coupled to the bus buffer and the hot swap switch. When the hot swap management device is coupled to a board system management bus of the server, the controller assigns a hardware address to the bus buffer. A computational unit of the server controls the hardware expansion device through the host system management bus according to the hardware address.
    Type: Grant
    Filed: January 7, 2018
    Date of Patent: May 14, 2019
    Assignees: Inventec (Pudong) Technology Corp., Inventec Corporation
    Inventor: Po-Chung Chang
  • Patent number: 10282135
    Abstract: A computing device includes an interface configured to interface and communicate with a dispersed storage network (DSN), a memory that stores operational instructions, and processing circuitry operably coupled to the interface and to the memory. The processing circuitry is configured to execute the operational instructions to perform various operations and functions. The computing device operates based on a store data request from a requesting entity to dispersed error encode a data segment associated with a data object to generate a set of encoded data slices (EDSs). The computing device selects a write threshold number of EDSs based on a desired consistency level indicator and issues a write request to storage unit(s) (SU(s)). The computing device receives write response(s) from the SU(s) and, based on write response(s) received from the at least some of the SU(s), provides a store data response to the requesting entity.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: May 7, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: S. Christopher Gladwin, Jason K. Resch
  • Patent number: 10228993
    Abstract: As the file system of an operating system program might be damaged by a crash, the file system is usually used neither for the selection of data to be dumped from a memory nor for the analysis of the dumped data, and all data contained in one or several areas of the memory are dumped. In order to preserve the integrity of the file system and enable its use after the crash, the memory is divided into a primary and a secondary memory section during a memory setup, file system data are transferred from the primary memory section to the secondary memory section widely out of the control of the operating system program, and a read access of a dump program is directed to the secondary memory section in order to select file system data to be dumped after the crash using error data.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: March 12, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Victor Rafael Escobar Olmos, Jakob Christopher Lang, Angel Nunez Mencias, Albert Schirmer, Jochen Schweflinghaus
  • Patent number: 10223033
    Abstract: Methods for use in a dispersed storage network (DSN) to coordinate data slice arrival times. In various examples, a DSN computing device receives a store data request, the store data request including a data object. A set of storage units associated with the store data request is identified, and the data object is dispersed storage error encoded to produce a plurality of sets of encoded data slices. One or more sets of write slice requests that include one or more sets of encoded data slices are also generated for reception by storage units of the set of storage units. For each set of write slice requests, a transmission schedule is determined for each write slice request such that the set of write slice requests arrives at corresponding storage units at substantially the same time frame. Each of the write slice requests is then transmitted in accordance with the transmission schedule.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: March 5, 2019
    Assignee: International Business Machines Corporation
    Inventor: Jason K. Resch
  • Patent number: 10204003
    Abstract: A failure region is specified when a failure occurs in a non-volatile semiconductor memory. When a device controller reads data stored in a specific page in a plurality of non-volatile semiconductor memories to detect an uncorrectable error (UE) of the data stored in the specific page, the device controller executes a diagnosis process including specifying a specific storage circuit that is a storage circuit including the specific page, reading data stored in a part of blocks of the specific storage circuit, and specifying, on the basis of a result of reading data stored in the block, a failure region in the specific storage circuit.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: February 12, 2019
    Assignee: Hitachi, Ltd.
    Inventors: Kenta Ninose, Takuji Itou, Fumio Yoshioka, Takashi Tsunehiro, Go Uehara, Shigeo Homma
  • Patent number: 10200949
    Abstract: A technique is described herein for saving power (e.g., battery power) at a receiving device (e.g., wireless device) by having a transmitting device (e.g., wireless access node) add an indicator to repeated radio blocks, where the indicator can be used by the receiving device (e.g., wireless device) to stop monitoring one or more of the repeated radio blocks.
    Type: Grant
    Filed: September 8, 2017
    Date of Patent: February 5, 2019
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Paul Schliwa-Bertling, Mårten Sundberg, John Walter Diachina
  • Patent number: 10191809
    Abstract: One embodiment provides a method comprising arranging a first data chunk into a ring structure, tagging the first data chunk by appending extra data to the first data chunk, and performing erasure coding on the first data chunk utilizing only exclusive or (XOR) operations.
    Type: Grant
    Filed: August 17, 2016
    Date of Patent: January 29, 2019
    Assignee: International Business Machines Corporation
    Inventor: Zhenxing Han
  • Patent number: 10191816
    Abstract: A storage system according to certain embodiments includes a client-side repository (CSR). The CSR may communicate with a client at a higher data transfer rate than the rate used for communication between the client and secondary storage. During copy operations, for instance, some or all of the data being backed up or otherwise copied to secondary storage is stored in the CSR. During restore operations, copies of the data stored in the CSR is accessed from the CSR instead of from secondary storage, improving performance. Remaining data blocks not stored in the CSR can be restored from secondary storage.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: January 29, 2019
    Assignee: Commvault Systems, Inc.
    Inventors: Manoj Kumar Vijayan, Deepak Raghunath Attarde, Hetalkumar N. Joshi
  • Patent number: 10191799
    Abstract: A memory system is configured to perform a test operation to determine a deviation of a target storage location's bit error rate response relative to a model. The memory system determines the deviation level by measuring data sets stored in the target storage location to determine an actual bit error rate value and another actual parameter value used to estimate bit error rate. The memory system obtains an estimated value from the model based on the actual values and identifies the deviation by comparing the estimated value with the actual values.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: January 29, 2019
    Assignee: SanDisk Technologies LLC
    Inventors: Yonatan Karlik, Judah Gamliel Hahn, Ariel Navon, Alex Bazarsky, Ofer Shapira
  • Patent number: 10192015
    Abstract: Methods of estimating yields of integrated circuits and methods of optimizing designs for the integrated circuits are provided. In a method of estimating a yield of an integrated circuit, critical paths are extracted from timing paths included in the integrated circuit by performing a static timing analysis for the integrated circuit. The critical paths are grouped into criticality sigma level groups according to criticality sigma levels of the critical paths, and the yield of the integrated circuit is determined based on numbers of the critical paths belonging to the respective criticality sigma level groups.
    Type: Grant
    Filed: April 12, 2016
    Date of Patent: January 29, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Moon-Su Kim, Kyoung-Hwan Lim, Cheol-Jun Bae
  • Patent number: 10175892
    Abstract: An adaptive read algorithm for accessing information stored on a nonvolatile medium. The nonvolatile medium can be organized as a plurality of storage units. A method of servicing a read request to the nonvolatile medium can include recording a history of read-retries for read requests to individual storage units of the nonvolatile medium. The method can include adapting a read algorithm for a read request to a particular storage unit based on the history of the read-retries for the read requests to the individual storage units of the nonvolatile medium.
    Type: Grant
    Filed: June 23, 2017
    Date of Patent: January 8, 2019
    Assignee: Amazon Technologies, Inc.
    Inventors: Kevin Kim, Jingyu Kang, Wenzhou Chen, Sujan Biswas, Truong Nguyen
  • Patent number: 10169163
    Abstract: Provided are techniques for managing backup operations from a client system to a primary server and secondary server. A determination is made at the client system of whether a state of the data on the secondary server permits a backup operation in response to determining that the primary server is unavailable when a force failover parameter is not set. The client system reattempts to connect to the primary server to perform the backup operation at the primary server in response to determining that the state of the data on the secondary server does not permit the backup operation. The client system performs the backup operation at the secondary server in response to determining that the state of the secondary server permits the backup operation.
    Type: Grant
    Filed: September 15, 2016
    Date of Patent: January 1, 2019
    Assignee: International Business Machines Corporation
    Inventors: Matthew J. Anglin, David M. Cannon, Ken Eugene Hannigan, Kevin Patrick Hoyt, Erick Christian Kissel, Howard N. Martin, Michael Harry Segapeli
  • Patent number: 10157005
    Abstract: Methods, apparatus, systems and articles of manufacture (e.g., physical storage media) to utilize non-volatile random access memory for information storage in response to error conditions are disclosed. Example methods disclosed herein include accessing, with a power control unit associated with a processor, first information describing available capacities of respective reserved regions of a plurality of non-volatile memory modules, the respective reserved regions of the non-volatile memory modules being separate from respective host-visible regions of the non-volatile memory modules. Disclosed example methods also include configuring, with the power control unit, an information storage architecture based on the first information. Disclosed example methods further include storing, with the power control unit, second information in one or more of the respective reserved regions of the non-volatile memory modules in accordance with the information storage architecture.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: December 18, 2018
    Assignee: Intel Corporation
    Inventors: Robert C. Swanson, Tony S. Baker, Theodros Yigzaw, Chris Ackles, Celeste M. Brown
  • Patent number: 10140053
    Abstract: A computer program product, system, and method for generating coded fragments comprises receiving, at a primary data protection appliance (DPA), an I/O write for a user volume; determining a distributed consistency group (DCG) associated with the user volume, the DCG having a plurality of replica copies; determining one or more secondary DPAs assigned to one or more of the replica copies; sending the I/O write from the primary DPA to each of the secondary DPAs; and applying, at each of the secondary DPAs, the I/O write to at least one of the replica copies assigned to the secondary DPA.
    Type: Grant
    Filed: September 26, 2016
    Date of Patent: November 27, 2018
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Lev Ayzenberg, Leehod Baruch, Valerie Lotosh
  • Patent number: 10135385
    Abstract: Systems and methods for local and master management units in a photovoltaic energy system. In one embodiment, a method implemented in a computer system includes sending a first identification code from a local management unit to a master management unit. The first identification code is associated with the first local management unit, and the local management unit controls a solar module. An authentication of the first identification code is received from the master management unit. In response to receiving the authentication, active operation of the local management unit is continued (e.g., for a set time period).
    Type: Grant
    Filed: August 4, 2015
    Date of Patent: November 20, 2018
    Assignee: TIGO ENERGY, INC.
    Inventors: Daniel Eizips, Shmuel Arditi, Ron Hadar, Maxym Makhota
  • Patent number: 10127152
    Abstract: Provided are a computer program product, system, and method for populating a second cache with tracks from a first cache when transferring management of the tracks from a first node to a second node. Management of a first group of tracks in the storage managed by the first node is transferred to the second node managing access to a second group of tracks in the storage. After the transferring the management of the tracks, the second node manages access to the first and second groups of tracks and caches accessed tracks from the first and second groups in the second cache of the second node. The second cache of the second node is populated with the tracks in a first cache of the first node.
    Type: Grant
    Filed: October 20, 2015
    Date of Patent: November 13, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin J. Ash, Matthew G. Borlick, Lokesh M. Gupta, Matthew J. Kalos, Brian A. Rinaldi
  • Patent number: 10108370
    Abstract: A method of reading a nonvolatile memory device including a plurality of pages coupled to a plurality of word lines and a plurality of bit lines, each of the plurality of pages including a data region storing a data and a flag region storing a flag, includes applying a first read voltage to a selected word line to generate first sensing data and a first sensing flag; applying a second read voltage to the selected word line to generate second sensing data and a second sensing flag, generating determination data by performing a logical operation on the first and second sensing data; determining a shift voltage based on the determination data and the read flag; and applying a third read voltage, based on the shift voltage, to the selected word line to generate a read data.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: October 23, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Makoto Hirano
  • Patent number: 10102060
    Abstract: In a storage apparatus including a storage medium including a plurality of pages as a unit of reading and writing data, a first data block including a data block received from a higher-level device is generated, a second data block of a predetermined size including one or more undivided first data blocks is generated, a third data block in which a correction code is added to the second data block is generated, the third data block is stored in a page buffer, and one or more of the third data blocks stored in the page buffer is written in a page, which is a write destination, out of the pages of the storage medium.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: October 16, 2018
    Assignee: Hitachi, Ltd.
    Inventors: Hideyuki Koseki, Takashi Tsunehiro, Junji Ogawa, Nagamasa Mizushima, Atsushi Kawamura
  • Patent number: 10095582
    Abstract: Methods for use in a dispersed storage network (DSN) to rebuild data. In various examples, at least one data segment of a data object is dispersed storage error encoded to produce a set of encoded data slices that includes an information dispersal algorithm (IDA) width number of encoded data slices, wherein the IDA width number is at least twice the number of storage units of a set of storage units utilized to store the data object. At least two encoded data slices are stored in each of the storage units. In response to detecting a storage error indicating an error slice, a partial threshold number of partial encoded data slices (generated by performing a partial encoding function on stored encoded data slices) are generated. The partial threshold number of partial encoded data slice responses are combined to produce a rebuilt encoded data slice corresponding to the error slice.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: October 9, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Greg R. Dhuse, Trevor J. Vossberg, Jason K. Resch
  • Patent number: 10067879
    Abstract: Provided are an apparatus and method for using block windows configured in a memory module to provide block level access to memory chips in the memory module. A plurality of block windows are configured that map to addresses corresponding to the addressable locations in the memory chips. A read/write request is received indicating a requested read or write operation with respect to a target block window comprising one of the block windows. The requested read or write operation is performed with respect to the addresses that map to the target block window.
    Type: Grant
    Filed: December 16, 2015
    Date of Patent: September 4, 2018
    Assignee: INTEL CORPORATION
    Inventors: Woojong Han, Andy M. Rudoff, Mark A. Schmisseur, Richard P. Mangold
  • Patent number: 10031822
    Abstract: Various embodiments are generally directed to techniques for determining whether one node of a HA group is able to take over for another. An apparatus includes a model derivation component to derive a model correlating node usage level to node data propagation latency through and to node resource utilization from a first model of a first node of a storage cluster system and a second model of a second node of the storage cluster system, the first model based on a first usage level of the first node under a first usage type, and the second model based on a second usage level of the second node under a second usage type; and an analysis component to determine whether the first node is able to take over for the second node based on applying to the derived model a total usage level derived from the first and second usage levels.
    Type: Grant
    Filed: April 28, 2016
    Date of Patent: July 24, 2018
    Assignee: NETAPP, INC.
    Inventors: Alma Dimnaku, Curtis Hrischuk, Kevin Faulkner
  • Patent number: 9946578
    Abstract: A method and apparatus for managing the persistent data of a pre-installed application in an elastic virtual machine instance is disclosed, the method comprising: in response to installing an application into a master virtual machine image, obtaining a persistent data point of a function component of the application, the persistent data point comprising a file directory for storing the persistent data of the function component; in response to launching an elastic virtual machine instance from the master virtual machine, creating a storage volume, attaching the storage volume to the elastic virtual machine instance, and mounting the storage volume to the file directory based on the persistent data point. Other features and aspects may be realized, depending upon the particular application.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: April 17, 2018
    Assignee: International Business Machines Corporation
    Inventors: Yun Song Huang, Xin Peng Liu, Shaw-Ben Shi, Xia Zhang
  • Patent number: 9921953
    Abstract: A hint bit detection and correction method and system that uses two additional bits as part of every cache directory. These bits represent the lwarx and stwcx instructions (larx disp, stcx disp). When a hint bit event occurs, depending the on combination of these two bits, there can be an indication of a hint bit error. Once a hint bit error is detected a software interrupt is issued and the hint bit correction method identifies and corrects the incorrect hint bit.
    Type: Grant
    Filed: September 9, 2015
    Date of Patent: March 20, 2018
    Assignee: International Business Machines Corporation
    Inventors: Benjamin Carter Nowak, Guy Lynn Guthrie, Venkat R Indukuru
  • Patent number: 9916114
    Abstract: A method for deterministic sharing of a plurality of processing resources with respect to one or more distributed network actionable items begins by the plurality of processing resources executing a scoring function using one or more properties of the one or more distributed network actionable items and one or more properties of each of the plurality of processing resources to produce a plurality of scoring resultants. The method continues with each of the plurality of processing resources independently determining a first priority processing resource of the plurality of processing resources based on a corresponding one of the plurality of scoring resultants for a first distributed network actionable item of the one or more distributed network actionable items. The method continues with the first priority processing resource assuming by responsibility for the first distributed network actionable item and executing one or more functions regarding the first distributed network actionable item.
    Type: Grant
    Filed: September 8, 2015
    Date of Patent: March 13, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Jason K. Resch
  • Patent number: 9891847
    Abstract: A storage device with a memory may improve yield by reducing the allocation of blocks for secondary writes in a dual programming system. In a dual programming system, all host writes are written to both a primary copy and to a secondary copy. If the secondary copy blocks that are available have a higher endurance, then the overall allocation of available blocks for use as a secondary copy block can be reduced (improving yield). In one embodiment, utilizing different trim parameters for the secondary copy blocks may be used to increase the endurance for those blocks. Before programming the secondary copy, the trim parameters may be adjusted to increase endurance and after programming the secondary copy, the trim parameters may be adjusted back to the default value that is used when programming the primary copy.
    Type: Grant
    Filed: July 28, 2015
    Date of Patent: February 13, 2018
    Assignee: SanDisk Technologies LLC
    Inventors: Narendhiran Chinnaanangur Ravimohan, Abhijeet Manohar, Muralitharan Jayaraman
  • Patent number: 9892153
    Abstract: Techniques are described that determine occurrences of lost write by comparing version identifiers of corresponding replica data blocks and checkpoints of data files that include the data blocks. A method determines lost writes that may have occurred among a first set of data blocks and a second set of data blocks. Each data block in the first set of data blocks corresponds to a respective data block in the second set that is a version of data blocks in the first set. The data blocks in the first set and the second set are associated with version identifiers. The second set of data blocks is associated with a second checkpoint for which any version of a data block in the second set associated a version identifier below the second checkpoint has been acknowledged to a database server as having been written to persistent storage.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: February 13, 2018
    Assignee: Oracle International Corporation
    Inventors: Yunrui Li, Mahesh Baburao Girkar, Hongyi Yao
  • Patent number: 9891845
    Abstract: Embodiments of the present invention provide methods, program products, and systems for reusing a duplex storage medium resource. Embodiments of the present invention can be used to transition between duplex media by determining that a prior transition from a first duplex storage media to a second duplex storage media is being performed and reinitializing the second duplex storage media to receive, for storage, duplex data transferred from the first duplex storage media. Embodiments of the present invention can be used to reduce potential collisions with naming conventions and reduce unwanted delay that results in forcing an offload by managing the recovery medium and keeping it available through policy based medium changes.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: February 13, 2018
    Assignee: International Business Machines Corporation
    Inventors: Joseph W. Gentile, Jie Hou, Andrew M. Sica, Douglas M. Zobre
  • Patent number: 9875052
    Abstract: Method and system are provided for storage capacity allocation. The method includes: providing a storage pool having multiple storage drive arrays; designating an initial available storage capacity in the storage pool; and allocating the remaining storage capacity in the storage pool to distributed spare space, wherein distributed spare space spreads portions of a spare drive across multiple storage drives in an array. The method also includes: monitoring an amount of available storage capacity as data is stored to the storage pool and determining when a threshold of a minimum available storage capacity is reached; and re-allocating one or more distributed spare drives from an array to available storage capacity when the threshold of the minimum available storage capacity is reached.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: January 23, 2018
    Assignee: International Business Machines Corporation
    Inventors: John P. Agombar, Ian Boden, Gordon D. Hutchison, Lee J. Sanders
  • Patent number: 9870222
    Abstract: An air-conditioning system is provided with an air-conditioning apparatus management apparatus and an air-conditioning apparatus which transmits and receives various signals to and from the air-conditioning apparatus management apparatus. The air-conditioning apparatus management apparatus manages the air-conditioning apparatus, an operational state of the air-conditioning apparatus management apparatus is linked to an operational state of the air-conditioning apparatus, and software set in the air-conditioning apparatus management apparatus is updated based on the operational state of the air-conditioning apparatus management apparatus.
    Type: Grant
    Filed: May 10, 2013
    Date of Patent: January 16, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventor: Mitsuhiro Sugimura
  • Patent number: 9841900
    Abstract: A storage control apparatus, that controls a storage apparatus that includes a storage drive in which a plurality of logical volumes are set, includes a storage unit that stores load information for each of the plurality of logical volumes, and a control unit that determines to-be-rebuilt volumes, which are targets to be rebuilt, from the plurality of logical volumes, sequentially selects a logical volumes for which a volume-specific taken time is estimated, determines, for each selected logical volume, a volume-specific start time at which a rebuild will be started, estimates, by using the volume-specific start time and the load information about the selected logical volume, the volume-specific taken time for rebuilding the selected logical volume, and totals the volume-specific taken time estimated for each selected logical volume to calculate a total taken time taken for rebuilding the to-be-rebuilt volumes.
    Type: Grant
    Filed: July 23, 2015
    Date of Patent: December 12, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Kazuhiro Urata, Kazuhiko Ikeuchi, Chikashi Maeda, Yukari Tsuchiyama, Takeshi Watanabe, Guangyu Zhou
  • Patent number: 9792340
    Abstract: Each of a plurality of data items has an associated update time. Identifying updated data items comprises identifying those data items that have an update time later than a last synchronization time. The data items are updated such that each data item is associated with one of a plurality of update tokens. Each update token is associated with updates performed up to a respective bound period from a time at which the update token is superseded by a successive update token. The update tokens are allocated successively in a monotonic sequence. Data indicating a last synchronization time is received. An update token is identified that is associated with one or more updates performed relative to a point in time related to the last synchronization time by the bound period. Data items having an update time after the last synchronization time are identified on the basis of the identified update token.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: October 17, 2017
    Assignee: METASWITCH NETWORKS LTD
    Inventors: Keith Wansbrough, Alistair Dundas
  • Patent number: 9785501
    Abstract: A data storage device includes a non-volatile memory and a controller. A method includes writing a first logical page to a physical page of the non-volatile memory. In response to a multistate error indication satisfying a threshold, the method further includes rewriting the first logical page at the non-volatile memory. The multistate error indication is determined based on the first logical page.
    Type: Grant
    Filed: February 18, 2014
    Date of Patent: October 10, 2017
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Idan Alrod, Eran Sharon
  • Patent number: 9778879
    Abstract: Writing data to storage utilizing a diverged thread for asynchronous write operations is provided. On a first thread, an analysis engine analyzes and identifies changed information to write to storage and an I/O manager copies the writes into buffers and places the buffers into a queue, while on a second thread, a flushless transactional layer (FTL) drive executes the writes to storage. By allowing the analysis to continue and enqueue writes on a first thread while the writes are written to storage on a second thread, the CPU and I/O of the system are utilized in parallel. Accordingly, efficiency of the computing device is improved.
    Type: Grant
    Filed: October 23, 2015
    Date of Patent: October 3, 2017
    Assignee: Microsoft Technology Licensing, LLC
    Inventor: Marcus Eduardo Markiewicz
  • Patent number: 9769748
    Abstract: A technique is described herein for saving power (e.g., battery power) at a receiving device (e.g., wireless device) by having a transmitting device (e.g., wireless access node) add an indicator to repeated radio blocks, where the indicator can be used by the receiving device (e.g., wireless device) to stop monitoring one or more of the repeated radio blocks.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: September 19, 2017
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Paul Schliwa-Bertling, Mårten Sundberg, John Walter Diachina
  • Patent number: 9761326
    Abstract: According to one embodiment, a memory system includes: a non-volatile memory; a memory interface that reads a received word from the non-volatile memory; a decoder that decodes the received word; a control unit that predicts the number of error bits in the received word read from the non-volatile memory, predicts decoding time on the basis of the number of error bits predicted, and determines an operating clock frequency of the decoder on the basis of the predicted decoding time and requested decoding time being the decoding time requested; and a frequency control unit that supplies the operating clock frequency determined by the control unit to the decoder and supplies voltage corresponding to the operating clock frequency being determined to the decoder.
    Type: Grant
    Filed: March 9, 2016
    Date of Patent: September 12, 2017
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Yu Nakanishi, Daisuke Iwai, Kiwamu Watanabe, Kenji Funaoka, Tetsuya Sunata, Keigo Hara, Marie Takada
  • Patent number: 9740405
    Abstract: An information processing device includes a processor. The processor is configured to transmit to a tape drive a write request in one of a first mode and a second mode for accompanying data. The write request in the first mode requests to store the accompanying data in a buffer memory included in the tape drive without writing the accompanying data to a magnetic tape. The write request in the second mode requests to write data stored in the buffer memory and the accompanying data to the magnetic tape. The processor is configured to transmit a write request for one of multiple pieces of data in the first mode if a remaining amount of the buffer memory is larger than a predetermined threshold value, and in the second mode if the remaining amount is equal to or smaller than the predetermined threshold value.
    Type: Grant
    Filed: September 10, 2015
    Date of Patent: August 22, 2017
    Assignee: FUJITSU LIMITED
    Inventor: Yoshiaki Ochi
  • Patent number: 9734013
    Abstract: Systems and methods are disclosed for providing operating system independent error control in computing devices. One embodiment is a method comprising: defining with a reliability, availability and serviceability (RAS) controller a first memory region for correctable errors and a second memory region for uncorrectable errors; receiving an error indication at the RAS controller; determining with the RAS controller whether the received error indication is a correctable error; and in response to the determination, if the received error indication is a correctable error, writing with the RAS controller information about the correctable error to the first memory region, and if the received error indication is an uncorrectable error, writing with the RAS controller information about the uncorrectable error to the second memory region and sending an interrupt request from the RAS controller to an operating system executing on a processor.
    Type: Grant
    Filed: October 9, 2015
    Date of Patent: August 15, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Mohit Gupta, Harb Abdulhamid, Zhixiong Zhang
  • Patent number: 9727327
    Abstract: A server determines that a software update is available for a computing device and creates a software bundle that includes the software update. In the software bundle, the server includes instructions to install the software bundle in a user partition of a memory of the computing device that is used to store content and applications and to modify a path variable in an operating system of the computing device to include a location in which the software bundle is installed. The server enables the computing device to download the software bundle.
    Type: Grant
    Filed: April 6, 2015
    Date of Patent: August 8, 2017
    Assignee: Amazon Technologies, Inc.
    Inventors: Peter Frank Hill, Donald Ryan Willhoit
  • Patent number: 9697081
    Abstract: A storage control device includes a processor. The processor is configured to acquire, when a first fault has occurred in a first storage device, first storage data to be used in recovery of the first storage device from a plurality of first storage control devices. The processor is configured to derive, when a second fault has occurred in a second storage device controlled by a second storage control device, first processed data from the first storage data. The first processed data is to be used in recovery of the second storage device. The processor is configured to notify the second storage control device of the first processed data.
    Type: Grant
    Filed: February 12, 2015
    Date of Patent: July 4, 2017
    Assignee: FUJITSU LIMITED
    Inventor: Takeshi Miyamae
  • Patent number: 9678965
    Abstract: A first backup storage system within a receiving domain receives information from an originating domain distinct from the receiving domain. The first backup storage system includes at least one storage device and the information includes backup data and corresponding lifecycle policy information for the backup data. The first backup storage system automatically performs an operation relating to the backup data, where the operation is specified by the received lifecycle policy information. In some embodiments, the lifecycle policy information may be received by the receiving domain within a header located within the backup data.
    Type: Grant
    Filed: June 29, 2009
    Date of Patent: June 13, 2017
    Assignee: Veritas Technologies LLC
    Inventors: Jeremy Howard Wartnick, Jeremy Dean Swift
  • Patent number: 9672086
    Abstract: In one embodiment, a method for managing DDM failures includes analyzing, using a hardware processor, information stored in a data repository and relating to DDM failures to identify problems in an installed base of DDM, the analysis comprising analyzing comparative DDM failure data.
    Type: Grant
    Filed: May 1, 2014
    Date of Patent: June 6, 2017
    Assignee: International Business Machines Corporation
    Inventor: Felipe A. Barajas
  • Patent number: 9672104
    Abstract: A memory system includes a nonvolatile memory device including a first memory area formed of memory blocks which store n-bit data per cell and a second memory area formed of memory blocks which store m-bit data per cell, where n and m are different integers, and a memory controller configured to control the nonvolatile memory device. The memory controller is configured to execute a read operation, and to execute a read reclaim operation in which valid data of a target memory block of the second memory area is transferred to one or more memory blocks of the first memory area, the target memory block selected during the read operation. The read reclaim operation is processed as complete when all the valid data of the target memory block is transferred to the one or more memory blocks of the first memory area.
    Type: Grant
    Filed: May 17, 2016
    Date of Patent: June 6, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young Woo Jung, Hwan-Chung Kim, Kyoungkuy Park, Eunju Park, Bong-Gwan Seol
  • Patent number: 9621508
    Abstract: A method and system for sharing host entries between virtual tunnel endpoints (VTEPs). The method includes making a first determination that an NLHE is present in a locally learned host entry table on a VTEP where the NHLE is associated with a first timestamp, and making a second determination that a first entry corresponding to the NHLE is present in a Host-Specific Portion of Global Host Entry Table (HSPT) on the VTEP, where the first entry is associated with a second timestamp. Based on the second determination, making a third determination, using the timestamps, that the NHLE is more recent than the first entry and based on the third determination updating an active forwarding table on the first VTEP to include a second entry corresponding to the NHLE and to remove the first entry and sending the NHLE to a VXLAN controller operatively connected to the VTEP.
    Type: Grant
    Filed: August 20, 2013
    Date of Patent: April 11, 2017
    Assignee: Arista Networks, Inc.
    Inventor: Kenneth James Duda
  • Patent number: 9612979
    Abstract: An apparatus to protect contents of a memory region is presented. In one embodiment, the apparatus includes a non-volatile memory, memory check logic to generate check values for protected memory regions, and comparison logic to compare stored check values from the non-volatile memory with generated check values from the memory check logic. The apparatus also includes security logic to prevent executing code in the protected memory regions if the comparison logic detects a mismatch between the stored check values and the generated check values.
    Type: Grant
    Filed: October 22, 2010
    Date of Patent: April 4, 2017
    Assignee: Intel Corporation
    Inventor: Yen Hsiang Chew