Abstract: Serially-concatenated codes are formed in accordance with the present invention using a constrained interleaver. The constrained interleaver cause the minimum distance of the serial concatenated code to increase above the minimum distance of the inner code alone by adding a constraint that forces some or all of the distance of the outer code onto the serially-concatenated code. This allows the serially-concatenated code to be jointly optimized in terms of both minimum distance and error coefficient to provide significant performance advantages.

Abstract: A circuit having a first circuit and a memory is disclosed. The first circuit may be configured to (i) receive a control signal that identifies a current one of a plurality of wireless communication standards and a code word size and (ii) generate a plurality of tables corresponding to both the current wireless communication standard and the code word size. Each of the tables generally has a plurality of indices. Up to two of the indices may be generated by the first circuit per clock cycle. Each of the tables generally comprises a permutation table of a turbo code interleaver. The memory may be configured to store the tables.

Abstract: A broadcast and receiver system for performing content from combined A/53 and A/153 standard transmissions enabling simultaneous reception of both signal types with one device. A combination HDTV/Mobile DTV chip can be used that does not alter the legacy HDTV forward error correction (FEC) decoder and Mobile DTV standard transmissions may include extra training signals aiding the demodulation of legacy HDTV reception. Two separate Trellis decoders can be used: one for A/53 legacy HDTV decoding and the other for A/153 Mobile DTV decoding that uses a Hard Input Hard Output (HIHO) type of architecture. Separate Viterbi decoders are allocated for each block of data with a block Viterbi rotator to parse out/collect results of each Viterbi decoder. Each block has its convolutional encoder reset at the beginning. The second Trellis decoder operates serially so as not to disturb the A/53 HDTV data but could also be operated in parallel.

Abstract: In one embodiment, a system for encoding data includes logic adapted for receiving data having one or more sub data sets, a C1 encoder module adapted for generating a plurality of C1 codewords during C1 ECC encoding of the one or more sub data sets, logic adapted for interleaving the plurality of C1 codewords into C1 codeword interleaves (CWIs), each CWI having a predetermined number of C1 codewords interleaved therein, a C2 encoder module adapted for generating a plurality of C2 codewords during C2 ECC encoding of the one or more sub data sets, wherein each C2 codeword has at most one symbol from each C1 codeword in each CWI, and wherein each C2 codeword has one symbol from at least two different C1 codewords in each CWI, and logic adapted for writing the one or more encoded sub data sets to a storage medium.

Abstract: In one embodiment, a method includes receiving a headerized SDS protected by unequal error protection; decoding a header from the headerized SDS and removing an impact of the header from C1 row parity to obtain a SDS; for a number of iterations: performing C2 column decoding, for no more than a number of interleaves in each row of the SDS: overwriting a number of columns with successfully decoded C2 codewords, erasing a number of C2 codewords, and maintaining remaining columns as uncorrected, performing C1 row decoding; for no more than a number of interleaves in each row of the SDS: overwriting a number of rows with successfully decoded C1 codewords, erasing a number of C1 codewords, and maintaining remaining rows as uncorrected; and outputting the SDS when all rows include only C1 codewords and all columns include only C2 codewords; otherwise, outputting indication that the SDS cannot be decoded properly.

Abstract: Processing of masked data using table lookups is described. A mask is applied to input data to generate masked input data. The mask and the masked input data are used in combination to locate an entry in a lookup table. The entry corresponds to a transformed version of the input data.

Abstract: Methods and apparatus create codewords of n-state symbols having one of 3 or more states with n-state check symbols. Check symbols are created from independent expressions. Codewords are associated with a matrix for detection of one or more symbols in error and the location of such symbols in error. Symbols in error are reconstructed from symbols not in error, error syndromes and check symbols not in error. Deliberately created errors that can be corrected are used as nuisance errors.

Abstract: Forward error correction (FEC) m-bit symbol modulation. Any desired FEC, error correction code (ECC), and/or combination thereof generates coded bits for combination with either uncoded bits, separately generated coded bits, and/or combination thereof to generate a number of symbols that undergo mapping to a constellation whose respective constellation points have a mapping characterized by a maximum minimum intra-Euclidean distance between the respective constellation points thereby generating a sequence of discrete-valued modulation symbols. The sequence of discrete-valued modulation symbols may then undergo modulation of any of a number of different operations (e.g., digital to analog conversion [e.g., digital to analog converter (DAC)], scaling, frequency shifting, filtering, etc.) to generate a continuous time signal for transmission via a communication channel. Such a device operative to perform including such functionality, circuitry, capability, etc.

Abstract: A method begins by a dispersed storage (DS) processing module encrypting a data segment utilizing an encryption key to produce an encrypted data segment and performing a deterministic function on the encrypted data to produce a transformed representation of the encrypted data. The method continues with the DS processing module masking the encryption key utilizing the transformed representation of the encrypted data to produce a masked key, partitioning the masked key into a plurality masked key partitions, partitioning the encrypted data segment into a plurality of encrypted data segment partitions, and combining the plurality of masked key partitions with the plurality of encrypted data segment partitions to produce a plurality of combined partitions. For a combined partition of the plurality of combined partitions, the method continues with the DS processing module encoding the combined partition using a dispersed storage error coding function to produce a set of encoded data slices.

Abstract: The variability of outer code failure rate of memory pages of a solid state memory device can be reduced by selectively grouping the pages included in the outer code words. The data in the page groups are encoded into outer code words which are stored in the memory device. Encoding the data of the page groups and storing the encoded data includes intermittently accumulating an outer code parity as the pages are sequentially stored in the memory device according to a particular order. The pages can be randomly selected for the page groups or can be grouped based on predicted or measured failure rate information. In a memory device having multi-level memory cells, predicting the failure rate of a page can be based on whether the page is a most significant bit (MSB) page or a least significant bit (LSB) page.

Abstract: An apparatus generally having a plurality of first circuits and a second circuit is disclosed. The first circuits may be configured to (i) generate a plurality of intermediate bits by dividing a plurality data bits by a plurality of minimal polynomials of an encoding along a first path and (ii) generate a plurality of parity bits by multiplying the intermediate bits by the minimal polynomials along a second path. A number of the parity bits may be variable based on a configuration signal. The second circuit may be configured to (i) delay the data bits and (ii) generate a plurality of code bits by appending the parity bits to a last of the data bits.

Abstract: A method and apparatus is disclosed wherein a user equipment (UE) receives control information on a first channel and uses the control information to process a second channel.

Abstract: Embodiments of the present disclosure describe methods, apparatus, and system configurations for providing rank-specific cyclic redundancy checks in memory systems.

Abstract: Apparatus and methods store error recovery data in different dimensions of a memory array. For example, in one dimension, block error correction codes (ECC) are used, and in another dimension, supplemental error correction codes, such as convolutional codes, are used. By using separate dimensions, the likelihood that a defect affects both error recovery techniques is lessened, thereby increasing the probability that error recovery can be performed successfully. In one example, block error correction codes are used for data stored along rows, and this data is stored in one level of multiple-level cells of the array. Supplemental error correction codes are used for data stored along columns, such as along the cells of a string, and the supplemental error correction codes are stored in a different level than the error correction codes.

Abstract: Systems and methods for providing a vehicular navigation control are disclosed herein. Some embodiments include a navigation system and a vehicle with a vehicle control module (VCM), a navigation control module (NCM), and a navigation control interface, where the VCM receives a manual command from an operator to implement a manual control function. In some embodiments the NCM receives an automatic command from the navigation system to implement an automatic control function via the VCM and the navigation control interface directly connects the VCM and the NCM to facilitate communication between the VCM and NCM for implementing automatic mode and for reporting implementation of a manual mode.

Abstract: According to one embodiment, an error correcting decoder includes a first error correction decoding module, an interleaving module, a delay module, a second error correction decoding module, and a corrector. The first error correction decoding module performs a first error correction decoding to a received signal in accordance with a broadcasting system. The interleaving module rearranges a data array of an output of the first error correction decoding module in a second order. The data array is ordered in a first order which is reverse to the second order. The delay module delays the received signal by a processing time of the first error correction decoding module. The second error correction decoding module performs a second error correction decoding to an output of the interleaving module and an output of the delay module. The corrector configured to correct a delay of an output of the second error correction decoding module based on a packet position defined by the broadcasting system.

Abstract: A method of identifying a parallel recovery plan for a data storage system comprises identifying base recovery plans for symbols of an erasure code implemented across a plurality of storage devices in a data storage system, generating a list of first recovery plans for a first symbol by manipulating the base recovery plans, and combining selected first recovery plans from the list to generate a set of parallel recovery plans to reconstruct a failed storage device.

Abstract: In one embodiment, a block code decoder is provided. The block code decoder includes a first decoder configured to decode Bose-Chaudhuri-Hochquenghem (“BCH”) coded data packets and a second decoder configured to receive and decode Reed-Solomon (“RS”) encoded data from the first decoder. The first decoder includes a first buffer configured to receive BCH encoded data and one or more BCH decoder circuits coupled to the first buffer. Each BCH decoder circuit decodes a plurality of BCH encoded bits in parallel. A second buffer is arranged to store the decoded BCH data. The second decoder includes a third buffer, arranged to receive the RS encoded data from the first decoder, one or more RS decoder circuits configured to decode a plurality of RS encoded bits in parallel, and a fourth buffer arranged to store RS payload data decoded by the RS decoder circuits.

Abstract: A digital broadcasting system and a method of processing data are disclosed, which are robust to error when mobile service data are transmitted. To this end, additional encoding is performed for the mobile service data, whereby it is possible to strongly cope with fast channel change while giving robustness to the mobile service data.

Abstract: A method and apparatus for multicasting of a multi-packet message are disclosed. Data to be transmitted as a message are divided into N sets, each set being encoded to generate encoded data. A set of parity bits is separated from each of the N sets of encoded data. The N sets of separated parity bits are encoded by a systematic code with a predetermined distance S across the N sets, resulting in N? parity-bit packets. The N? parity-bit packets are encoded with a code that is selected so that each receiving station decodes the N? parity-bit packets with a high probability. The N-packet message, comprising the N sets of encoded data less the separated bits, and the N? packets are multicasted. If less than S packets of the N-packet message fail to decode at a receiving station, the receiving station recovers all N packets using the N? packets.

Abstract: A method for integrating data and header protection in tape drives includes receiving an array of data organized into rows and columns. The array is extended to include one or more headers for each row of data in the array. The method provides two dimensions of error correction code (ECC) protection for the data in the array and a single dimension of ECC protection for the headers in the array. A corresponding apparatus is also disclosed herein.

Abstract: Devices and methods for processing wireless high definition video data to be communicated in an uncompressed format over a wireless medium is disclosed. In one embodiment, an encoder includes a first outer encoder that encodes a first portion of a video data stream. A second outer encoder encodes a second portion of the video data stream. A first parser parses the first encoded data stream into first sub-video data streams. A second parser parses the second encoded data stream into second sub-video data streams.

Abstract: Methods and devices for encoding and interleaving data packets for broadcast and for de-interleaving and decoding data packets in a communication system eliminate detrimental biasing effects by using pseudo-random M-sequence bit encoding as part of the turbo encoding and decoding. The use of pseudo-random M-sequence bit encoding mitigates biasing effects that may otherwise be introduced if conventional r-c interleaving is applied to long turbo encoded data which would degrade reception in the presence of broadcast interference.

Abstract: In one embodiment, a tape drive system includes a write channel for writing data to a magnetic tape, the write channel utilizing a rate-(232/234) reverse concatenated modulation code. The write channel includes logic adapted for receiving a data stream comprising one or more data sets, logic adapted for separating each data set into a plurality of sub data sets, logic adapted for encoding each sub data set with a C2 encoding, logic adapted for encoding each C2-encoded sub data set with a modulation code, logic adapted for encoding each modulated sub data set with a C1 encoding, and logic adapted for simultaneously writing the encoded modulated sub data sets to data tracks of the magnetic tape. Other systems for writing data to a magnetic tape utilizing a rate-(232/234) reverse concatenated modulation code are described according to various other embodiments.

Abstract: In one embodiment, a data storage system includes a write channel for writing data to a storage medium, the write channel configured to utilize a partial reverse concatenated modulation code. The write channel includes logic adapted for encoding data sets using a C2 encoding scheme, logic adapted for adding a header to each subunit of the data sets, logic adapted for encoding the headers of the data sets with a first modulation encoding scheme, logic adapted for encoding data portions of the data sets with a second modulation encoding scheme, logic adapted for encoding portions of the one or more C2-encoded data sets using a C1 encoding scheme, logic adapted for combining the C1-encoded portions with the modulation-encoded headers of the C2-encoded data sets using a multiplexer, and logic adapted for writing the one or more combined C1- and C2-encoded data sets to data tracks.

Abstract: In one embodiment, a method includes writing data to a storage medium of a data storage system using a partial reverse concatenated modulation code by encoding data sets using a C2 encoding scheme, adding a header to each subunit of the data sets, encoding the headers of the data sets with a first modulation encoding scheme, encoding data portions of the data sets with a second modulation encoding scheme, encoding portions of the one or more C2-encoded data sets using a C1 encoding scheme, combining the C1-encoded portions with the modulation-encoded headers of the C2-encoded data sets using a multiplexer, and writing the one or more combined C1- and C2-encoded data sets to data tracks of the storage medium. Other methods for writing data to a storage medium of a data storage system using a partial reverse concatenated modulation code are presented according to more embodiments.

Abstract: An encoding method and device are provided for a series of data packets transmitted in the framework of a combined streaming and downloading application by a two-stage error protection process and only one unidirectional transmission channel. A partial block of successive data packets is protected against some transmission errors occurring during streaming with the aid of a first error protection process while all data packets are protected against the transmission errors that can remain after streaming is completed with the aid of a second error protection process. In a decoding process, a series of data packets that are encoded according to the encoding are decoded.

Abstract: An A/D conversion unit performs an A/D conversion operation twice during a hold period of an analog value. In a first conversion operation, the A/D conversion unit compares the analog value with a first reference voltage and outputs a comparison result as first converted data. In a second conversion operation, the A/D conversion unit compares the analog value with a second reference voltage and outputs a comparison result as second converted data. The second reference voltage is a voltage obtained by adding or subtracting a minimum resolution voltage to or from the first reference voltage. A digital processing unit averages errors of the first and second converted data by digital processing to detect an A/D conversion error, and feeds back a detection result to the A/D conversion unit as a control value to perform voltage control.

Abstract: Through the identification of different packet-types, packets can be handled based on an assigned packet handling identifier. This identifier can, for example, enable forwarding of latency-sensitive packets without delay and allow error-sensitive packets to be stored for possible retransmission. In another embodiment, and optionally in conjunction with retransmission protocols including a packet handling identifier, a memory used for retransmission of packets can be shared with other transceiver functionality such as, coding, decoding, interleaving, deinterleaving, error correction, and the like.

Abstract: A transmitter inserts parity samples into a stream of information symbols in an inter-symbol correlated (ISC) signal. The inserted parity samples may be utilized to generate estimates of corresponding information symbols when they are received by a receiver. The information symbols may be pulse shaped by a first pulse shaping filter characterized by a first response. The parity samples may be pulsed shaped by a second pulse shaping filter characterized by a second response. The first response and the second response are diverse or uncorrelated. The transmitter may transmit the ISC signal comprising the pulse shaped information symbols and the pulse shaped parity samples. The parity samples may be generated utilizing a non-linear function over a plurality of the information symbols. The non-linear function may be diverse from a partial response signal convolution corresponding to the information symbols and is designed according to a desired SNR value at the receiver.

Abstract: An error-correcting coding method generates code words of m bits from useful data blocks of n bits. The method adds k check bits to a block of n useful data bits in order to generate a code word of m=n+k bits, said check bits being defined according to the combination rules defined by a parity matrix H consisting of binary elements and having k rows and m columns such that H·V=0, V being a column matrix whose m elements are the m bits of the code word to be generated. The k check bits are separated into two groups, on the one hand a group of k1 bits called total parity bits PT and on the other hand a group of k2 bits called conventional check bits VC, the values of k, k1 and k2 satisfying the conditions k=k1+k2 and k>k1>2, the matrix H whose columns can be swapped being broken down into six submatrices A, B, C, D, E and F. Another method detects multiple errors in code words generated by the coding method.

Abstract: The present invention is a configurable binary BCH encoder having a variable number of errors. The encoder may implement a universal multipole block which may be configured for receiving an error number input, which may include a maximum error number limit for the encoder, and for calculating a plurality of error coefficients based on the error number input. The encoder may be further configured for receiving a plurality of information bits of an information word. The encoder may be further configured for transmitting/outputting a first (ex.—unmodified) subset of the information bits as an encoder output. The encoder may be further configured for calculating a plurality of parity bits based on a second subset of the information bits and the error coefficients. The encoder may be further configured for transmitting/outputting the calculated parity bits as part of the encoder output.

Abstract: Embodiments of the present disclosure describe methods, apparatus, and system configurations for providing rank-specific cyclic redundancy checks in memory systems.

Abstract: A communication system enabling wireless transmission of messages via packets; and a method of operating the system provides for improved accuracy in the transmission of a message, particularly for overcoming signal distortion associated with the phase changes and varying multipath found in transmissions from the locomotive of a moving train. The maximum benefit of forward-error correction (FEC) with Reed-Solomon (RS) coding is applied for a message payload that is significantly shorter than the fixed length of a packet, with lesser coding being performed with longer payloads.

Abstract: The present disclosure is directed to a system and method for encoding k input symbols, using a Reed-Solomon erasure correction code, into a longer stream of n output symbols for transmission over an erasure channel. The present disclosure is further directed to a system and method for recovering the original k input symbols from only (and any) k output symbols (out of the n output symbols) received over the erasure channel. A symbol is a generic data unit consisting of one or more bits that can be, for example, a packet. The systems and methods of the present disclosure provide for an adjustable code rate that can be readily adapted based on changing channel conditions without having to reconstruct the encoder/decoder. As a result, such an encoder/decoder can be referred to as rate-independent.

Abstract: Systems and methods are provided that confront the problem of failed storage integrated circuits (ICs) in a solid state drive (SSD) by using a fault-tolerant architecture along with one error correction code (ECC) mechanism for random/burst error corrections and an L-fold interleaving mechanism. The systems and methods described herein keep the SSD operational when one or more integrated circuits fail and allow the recovery of previously stored data from failed integrated circuits and allow random/burst errors to be corrected in other operational integrated circuits. These systems and methods replace the failed integrated circuits with fully functional/operational integrated circuits treated herein as spare integrated circuits. Furthermore, these systems and methods improve I/O performance in terms of maximum achievable read/write data rate.

Abstract: A transmitting system, a receiving system, a method of processing broadcast signals and a method of receiving broadcast signals are disclosed.

Abstract: A method for integrating data and header protection in tape drives includes receiving an array of data organized into rows and columns. The array is extended to include one or more headers for each row of data in the array. The method provides two dimensions of error correction code (ECC) protection for the data in the array and a single dimension of ECC protection for the headers in the array. A corresponding apparatus is also disclosed herein.

Abstract: Apparatus and methods store error recovery data in different dimensions of a memory array. For example, in one dimension, block error correction codes (ECC) are used, and in another dimension, supplemental error correction codes, such as convolutional codes, are used. By using separate dimensions, the likelihood that a defect affects both error recovery techniques is lessened, thereby increasing the probability that error recovery can be performed successfully. In one example, block error correction codes are used for data stored along rows, and this data is stored in one level of multiple-level cells of the array. Supplemental error correction codes are used for data stored along columns, such as along the cells of a string, and the supplemental error correction codes are stored in a different level than the error correction codes.

Abstract: A method for recovering transmission errors, comprising: receiving a data packet comprising an error detection code associated to data contained in the packet, wherein the data associated to the error detection code comprises primary data and secondary data, checking the error detection code of the received packet to detect an erroneous state of the associated data, when the erroneous state is detected, determining a finite set of candidate values for the primary data and, for each values of the set: determining a marginal likelihood of the candidate value as a function of the error detection code of the received packet, determining a first correlation between the primary data of the received packet and the candidate value, and selecting a corrected value for the primary data among the set of candidate values as a function of said marginal likelihoods and said first correlations.

Abstract: Various embodiments relate to a memory device in a turbo decoder and a related method for allocating data into the memory device. Different communications standards use data blocks of varying sizes when enacting block decoding of concatenated convolutional codes. The memory device efficiently minimizes space while enabling a higher throughput of the turbo decoder by enabling a plurality of memory banks of equal size. The number of memory banks may be limited by the amount of unused space in the memory banks, which may be a waste of area on an IC chip. Using the address associated with the maximum value of the data block, the memory may be split into a plurality of memory blocks according to the most-significant bits of the maximum address, with a number of parallel SISO decoders matching the number of memory banks. This may enable higher throughput while minimizing area on the IC chip.

Abstract: Processing of masked data using table lookups is described. A mask is applied to input data to generate masked input data. The mask and the masked input data are used in combination to locate an entry in a lookup table. The entry corresponds to a transformed version of the input data.

Abstract: LDPC (Low Density Parity Check) coding and interleaving implemented in multiple-input-multiple-output (MIMO) communication systems. As described herein, a wide variety of irregular LDPC codes may be generated using GRS or RS codes. A variety of communication device types are also presented that may employ the error correcting coding (ECC) using a GRS-based irregular LDPC code, along with appropriately selected interleaving, to provide for communications using ECC. These communication devices may be implemented to in wireless communication systems including those that comply with the recommendation practices and standards being developed by the IEEE 802.11n Task Group (i.e., the Task Group that is working to develop a standard for 802.11 TGn (High Throughput)).

Abstract: A digital data recording/reproducing method includes the steps of: interleaving data on a PI code for each PI code of a 208-row ECC block; and converting a short burst error into random errors by dispersing errors on the PI codes. Moreover, the digital data recording/reproducing method increases correction capability against several bytes to several tens bytes of errors generated at random without changing burst error correction length by performing this processing for respective PI codes by using interleave rules that are different as much as possible from one another.

Abstract: LDPC codes robust to non-stationary narrowband ingress noise. Particularly designed LDPC codes are adapted to address deleterious noise-effects incurred within LDPC coded signals that propagate via a communication channel (such as from a transmitting communication device to a receiving communication device). Such LDPC matrices employed for encoding and/or decoding such LDPC coded signals are composed of sub-matrices (e.g., all-zero values sub-matrices and/or CSI (Cyclic Shifted Identity) sub-matrices). The sub-matrices are generally uniform in size and square in shape. Based on certain operational conditions, such as communication channel noise, various operations within a communication device are adaptively modified (e.g., signaling, modulation, demodulation, symbol mapping, metric generation, decoding, etc.).

Abstract: A digital broadcasting system and a method of processing data are disclosed. The method of processing data of a transmitting system includes generating signaling information including service-related transmission parameters of mobile service data, packetizing the generated signaling information to a predetermined data packet format, primarily multiplexing the packetized signaling information and a mobile service data packet including the mobile service data, and secondarily multiplexing the primarily multiplexed data packets and a main service data packet including main service data, thereby transmitting the secondarily multiplexed data packets to at least one transmitter located in a remote site.

Abstract: Data to be more robustly transmitted within 8VSB broadcast DTV signals are turbo coded using parallel concatenated convolutional coding (PCCC) and incorporated within the segments of data fields, the bytes of which are convolutionally interleaved before trellis coding and 8VSB symbol mapping. Packing the PCCC into payload fields of MPEG-2-compatible null data packets and Reed-Solomon coding the packets to generate the segments of data fields, the bytes of which are convolutionally interleaved, conditions legacy DTV receivers to disregard PCCC components not useful to them. Transversal packing turbo-coded Reed-Solomon codewords into the payload fields of MPEG-2-compatible null data packets increases the capability of those turbo-coded Reed-Solomon codewords to overcome burst errors. Repeated transmissions of the transversally packed turbo-coded Reed-Solomon codewords in whole or in part allows them to overcome protracted deep fades encountered during mobile reception of 8VSB DTV signals.

Abstract: An apparatus generally having a plurality of first circuits and a second circuit is disclosed. The first circuits may be configured to (i) generate a plurality of intermediate bits by dividing a plurality data bits by a plurality of minimal polynomials of an encoding along a first path and (ii) generate a plurality of parity bits by multiplying the intermediate bits by the minimal polynomials along a second path. A number of the parity bits may be variable based on a configuration signal. The second circuit may be configured to (i) delay the data bits and (ii) generate a plurality of code bits by appending the parity bits to a last of the data bits.

Abstract: A digital broadcasting system and a method of processing data is disclosed. A receiving system of the digital broadcasting system may include receiving system may include a signal receiving unit, a demodulating unit, a deinterleaver, and a decoder. The signal receiving unit receives a broadcast signal including mobile service data. The mobile service data may construct a code block, the code block including at least one data packet for the mobile service data, an RS parity generated based on the at least one data packet, and a CRC checksum generated based on the at least one data packet and the RS parity. The demodulating unit performs demodulation on the received mobile service data. The deinterleaver deinterleaves the demodulated mobile service data. The decoder corrects error generated from the mobile service data by performing CRC decoding and RS decoding on the code block of the deinterleaved mobile service data.

Abstract: If a large minimum data unit for recorded data is used to record a small data amount of management information, the recording time is long, and furthermore when a WO (write once) is used as the recording medium, the number of recording operations is restricted. To solve the above problems, the present invention records data in a management area in units smaller than ordinary units for recorded data to suitably record information in a limited management area and thereby efficiently use the user data area. At that time, the present invention simplifies interleave processing usually applied to ordinary recorded data, and performs the simplified interleave processing on a data structure (for data of small size) of the present invention so as to ensure the signal processing compatibility between the ordinary data and data having the data structure according to the present invention.