Abstract: A system for transferring data from a host computing system 10 to a magnetic tape cartridge 12. Data from the host computing system 10 is buffered in a burst buffer 14 before transfer to a logical formatter 16, where data is compressed and converted to a format suitable for storage on the magnetic tape cartridge 12. The logical formatter 16 arranges the data into ‘datasets. The datasets are written sequentially into a main buffer 24 and, as each row of a dataset is written into the main buffer 24, parity bytes (Reed-Solomon) are added.

Abstract: An interleaving method comprises storing input data in a memory according to a sequential address; providing a virtual address determined by adding a predetermined value to a size of the input data so that a partial bit reversal ordering interleaving rule is satisfied; matching the virtual address to an address interleaved according to the interleaving rule; and reading the input data from the memory using an address other than the address corresponding to the specific value, out of the interleaved addresses.

Abstract: Uplink transmission and reception techniques for a processing satellite including one or more earth terminals 400 connected to receive ATM data cells. One or more encoders 418 are connected to coordinate four data cells with an error correction code to generate data bursts and to coordinate the data bursts with synchronizing bursts to generate data frames. One or more modulators 420 are connected to modulate the data frames by frequency division multiple access modulation to enable placement of the modulated data frames into a plurality of channels. One or more antennas 406 transmit the modulated data frames to a satellite 100 over 48 beams with various forms of polarization. In satellite 100, a receiving multibeam antenna and feed 106 responds to one or more beams of radiocarrier signals having one or more forms of polarization. One or more demodulators 138 demodulate the radio carrier signals into data frames from various channels including a plurality of channel types.

Abstract: Disclosed is method and apparatus for error code correction using product code. The method includes: (a) reading a data frame and associated check bytes from a media; (b) generating an error correction model for the data frame and associated check bytes, where the error correction model is defined by non-zero syndromes in the check bytes of Q dimension code words and P dimension code words of the data frame; (c) examining the generated error correction model; and (d) correcting the data frame using a combination of error correction systems that are selected based on the examining of the generated error correction model.

Abstract: An error correction method for multitrack data recording and read out of recorded multitrack digital data includes organizing input digital data into a sequence of data words and encoding each data word as a fixed-length transverse error correcting code word having a fixed number of symbols which represent digital data and parity.

Abstract: The present invention provides a decoding system and method for an optical disk for receiving and decoding data from the disk. The present invention does not need to increase the clock frequency and the bus width of the decoding system, it can effectively decrease the access times to the data buffer and the system response time by changing the structure of the conventional decoding system, in this way the present invention increases the parallel process capability and the speed of the decoding, thus, it can become a high speed DVD.

Abstract: A method for detecting the location of falsely detected “good” data, or “rogue”, packets in a data buffer is presented. A segment-level CRC is generated over, and associated with, a buffer segment, and recorded along with the segment data onto a storage medium. During data recovery, only packets that pass a packet-level error detection test are allowed in the data buffer. Once a data segment is complete, a segment-level CRC test is performed over the recovered segment-level CRC and the entire recovered segment data. The segment contains a rogue packet if the segment-level CRC test fails. Reed-Solomon syndromes are generated and used to locate and optionally correct the rogue packets.

Abstract: A digital data recording/reproducing method includes the steps of: interleaving data on a PI code for each PI code of a 208-row ECC block; and converting a short burst error into random errors by dispersing errors on the PI codes. Moreover, the digital data recording/reproducing method increases correction capability against several bytes to several tens bytes of errors generated at random without changing burst error correction length by performing this processing for respective PI codes by using interleave rules that are different as much as possible from one another.

Abstract: A composite encoder/syndrome generating device that both computes check symbols over counterpart data symbol strings to form codewords, and derives syndromes from codewords indicative of their error state. The multistage device provides recursive processing paths at each stage of depth corresponding to the number of symbols concurrently applied to the device. The device is adapted as an encoder when the feed-forward paths between stages are enabled; it is adapted as a syndrome generator upon their disablement. The number of symbols concurrently processed may be varied from clock cycle to clock cycle by conforming the recursion paths per stage to the number of symbols applied as input to the device.

Abstract: A data decoding apparatus and the method and a data reproduction apparatus which reduces capacity of a memory used for decoding and speedily accesses to data to be read. In a data decoding apparatus (50) and the method which decodes coded data (S2) which is recorded in a recording medium (2), the coded data (S2) read from the recording medium (2) is stored in a memory used for decoding (51), data information of data to be read is detected from decoded data which is generated in the middle of decoding the coded data (S2), the data information is stored in a data information storage means and the output of decoded data (S10) is controlled on the based on the data information, thereby the output of the decoded data (S10) is controlled based on the data information independent of decoding of the coded data (S2).

Abstract: A method for computing Reed-Solomon error control checkbytes in reduced time and with reduced gate count. Two syndromes, s0 and s1, are computed for a sequence of data elements, using a selected primitive a that satisfies a selected primitive polynomial relation p(&agr;)=0. Each of two checkbytes, c0 and c1, is expressed as a linear combination of the syndromes s0 and s1, where each coefficient of each linear combination is expressed as a single power of the primitive &agr;, which is stored at the checkbyte generator for multiple use. This approach reduces gate count and associated time delay in formation of the usual Reed-Solomon multiplier coefficients.

Abstract: An architecture for a self-selective multi-rate transmitter that processes variable input rate data using a plurality of single input, multiple output interleavers. The transmitter, using a multitude of modulation formats, transmits the data at a constant symbol rate without a priori knowledge of the input rate. The transmitter employs a modulator that automatically selects between a multitude of signal constellations, depending on the rate of the source data to be transmitted. The modulator transmits data from various sources, each with an independent data rate. The modulator performs data formatting, forward error correction encoding, modulation onto an intermediate frequency, frequency conversion to a transmit radio frequency, and amplification with automatic gain control.

Abstract: Multiword information is based on multibit symbols disposed in relative contiguity with respect to a medium, and is encoded with a wordwise interleaving and wordwise error protection code for providing error locative clues across multiword groups. In particular, the clues originate in high protectivity clue words (BIS) that are interleaved among clue columns, and also in synchronizing columns constituted from synchronizing bit groups. The synchronizing columns are located where the clue columns are relatively scarcer disposed. The clues are directed to low protectivity target words (LDS) that are interleaved in a substantially uniform manner among target columns which form uniform-sized column groups between periodic arrangements of clue columns and synchronizing columns.

Abstract: In this invention digital audio data transmitted by wireless means is error corrected and concealed to remove and hide noise created errors ranging from random to burst noise. The data is interleaved into even and odd sub-frames to combat burst mode noise, and ECC is created for the MSB of the data and for command and control bytes using a Reed Solomon encoder before transmission. The LSB are not encoded for reasons of bandwidth because experiments have show the LSB have little effect on audible noise even at a bit error rate of 3.0E-3. The transmitted data is decoded using Reed Solomon decoder and error corrected. The digital audio data is then processed through a concealment procedure that hides the remaining MSB errors by using extrapolation, soft muting and muting depending on the state of audio data preceding and following the current sub-frame of the digital audio data.

Abstract: A method and system for overriding error correction capabilities of digital optical media is provided. The overriding of the error correction codes (ECC) is accomplished by causing a non-correctable pattern of erroneous symbols to occur in the ECC codeword. Specific redundancy symbols are replaced with invalid symbols. The non-correctable error pattern is recognized by the ECC decoder as being non-correctable and the ECC decoder does not attempt to change the values of any symbols of an ECC codeword that is contaminated by the detectable non-correctable error pattern.

Abstract: A turbo code interleaver using linear congruential sequences may be employed as a two-dimensional interleaver in a turbo coder that also includes first and second constituent encoders. The interleaver and the first encoder are each configured to receive input bits. The first encoder produces output symbols therefrom. The interleaver receives the input bits sequentially by row. A linear congruential sequence recursion algorithm within the interleaver serves to pseudo-randomly rearrange, or shuffle, the bits within each row of the interleaver. The bits are then output from the interleaver sequentially by column. The second encoder is configured to receive the interleaved bits from the interleaver. The second encoder produces output symbols therefrom. The two streams of output symbols are multiplexed together, with appropriate puncturing. If desired, the linear congruential recursion sequence can be generated in reverse.

Abstract: A digital-versatile disk (DVD) playback-controller integrated circuit (IC) writes data to a block in an embedded memory buffer while row syndromes are being generated in parallel. The block has rows and columns. Row syndromes are generated on-the-fly as the data is written from the DVD disk to the memory buffer. Row syndrome generation thus requires no memory access cycles. Column syndrome generation is delayed until row correction is completed. Once errors in the rows identified by the row syndromes are corrected, column syndromes are generated. The bytes received from the DVD disk for the current row are accumulated into intermediate row syndromes. Received bytes are accumulated for the row until all of the row's bytes have been received and accumulated. The final accumulated row syndromes are written to the embedded memory buffer for later row error-correction.

Abstract: The present invention provides a remodulating channel selector for a wavelength division multiplexed optical communication system. The remodulating selector receives a WDM input signal, selects a particular optical channel from the WDM signal and places the information from the selected signal onto a newly-generated optical output signal. The wavelength of the output optical signal can be the same as or different from one of the optical channels which comprises the WDM input signal. When used in a WDM optical communication system with remodulators at the transmission input, the remodulating selectors provide complete control over the interfaces with optical transmitters and receivers, permitting use with a broad range of optical equipment.

Abstract: In a preferred satellite (3) communications environment, spread spectrum communications, under extremes of digital message readability, is established for a digital message 23 by division into smaller elements W(0)-W(C−1) which are transmitted in turn, each multiplied for logical inversion or non-inversion, by the individual, sequential digits of a preferred binary polynomial 35, being either a PN polynomial, an m-polynomial, or simply displaying alternate logical ones and zeroes. The preferred polynomial may be used convey an alternative polynomial for better reception of a subsequent digital message.

Abstract: When manufactured, an optical data carrier is provided with digital information, which is written and stored in accordance with at least one previously defined encoding method for error correction and which may be read and decoded at a later stage by means of an optical reader with correction of errors in accordance with said encoding method. A predetermined number of logical symbols or bits are selected at predetermined positions in the digital information to be stored on the data carrier. A set of logical errors are intentionally created by replacing the selected symbols with corresponding symbols in a predetermined code sequence representing the identity of the data carrier. The logical errors are of such a type as to be normally corrected by the optical reader, when the data carrier is read and/or copied.

Abstract: There is provided an apparatus for processing data for generating an error correction product code block devised so as to maintain the current level of redundancy after the error correcting ability is modified as a result of advancement of semiconductor and data recording/transmission technologies. Unlike any known technique of configuring a Reed-Solomon error correcting product code block of (M+P0)×(N+PI) bytes for an information data of (M×N) bytes, an error correcting product code block data structure is obtained by configuring a (K×(M+1)×(N+P))-byte Reed-Solomon error correcting product code block for (K×M×N)-byte data, making K variable to consequently make the entire size of the Reed-Solomon error correcting product code block variable. At the same time, the error correcting ability varies in proportion to the value of K without increasing redundancy.

Abstract: A rate-l/n or rate-k/n convolutional encoding method, in a digital communications system having a non-systematic convolutional encoder, includes the steps of: obtaining first to n-th block code words by multiplying first to n convolutional code generating polynomials by an information polynomial upon input of an information word; converting one of the first to n-th block code words to a systematic code word and obtaining a new information word corresponding to the systematic code word; and generating a convolutional code by encoding the new information code in the non-systematic convolutional encoder.

Abstract: A method of encrypting and decrypting digital data such as text, numeric, images, pictures, especially tailored for optical compact discs; said method comprising of ciphering/deciphering and error detection and correction using algebraic method, namely Reed-Solomon code.

Abstract: A system that redefines how data is distributed on a conventional writable compact disc (CD-R/E). A rearrangement of the data on the disc provided during the writing operation preserves eight-to-fourteen channel frames and the control and display (C&D) channel and burst error mitigation while providing a direct access storage device (DASD) format and capability. The CD-DASD format is suitable for preformatting the CDs and has constant size sectors recorded contiguously along the spiral track. Each sector is independently addressable and synchronous with the C&D data word and ATIP channel words on the CD-R disc. The system uses the components of a conventional CD device and a mapping controller address translator to encode and decode the data bytes using a conventional CIRC encoder/decoder. A rectangular product code of C1 and C2 CIRC subcodes is provided that is interleaved to mitigate the effects of handling.

Abstract: A controller circuitry for CD-ROM drive used for the storage of digital data, capable of reading data store on the CD-ROM disc and decoding to transfer the decoded data into the host computer system via an interface bus. Under the ISO 9660 standard, the controller circuitry includes a CIRC processor and an RSPC/EDC processor combined with a bus interface controller, each of which is capable of accessing a working memory device tied together. The combined circuitry configuration allows reduced access frequency in the working memory device, and there is no need to use internal high-speed SRAM. The entire controller circuitry may be fabricated as one single IC device to reduce cost while performance is improved.

Abstract: An error correction processor is disclosed for correcting errors in binary data read from a disk storage medium, wherein the binary data comprises a first and second set of intersecting ECC codewords of a multi-dimensional codeword. The error correction processor comprises a data buffer for storing the ECC codewords read from the disk storage medium; a syndrome generator for generating ECC syndromes in response to a codeword in the second set; an error-locator polynomial generator for generating an error locator polynomial .sigma.(x) in response to the ECC syndromes; a selector for selecting between the error-locator polynomial .sigma.(x) and an erasure polynomial .sigma.(x).sub.EP, wherein:(i) the erasure polynomial .sigma.(x).sub.EP is generated while processing the first set codewords; and(ii) the erasure polynomial .sigma.(x).sub.EP is used to correct at least two codewords in the second set; andan error corrector for generating correction values in response to either the error-locator polynomial .sigma.

Abstract: A method for processing encoded data using error control coding in accordance with the present invention includes: a) obtaining Q codewords and P codewords from a storage location, wherein the Q codewords and the P codewords are all obtained in a single pass through the storage location, b) calculating P partial syndromes for said P codewords, c) calculating Q partial syndromes for the Q codewords, and d) storing the Q partial syndromes and the P partial syndromes in a buffer that is separate from the main memory. In some embodiments, storing the Q partial syndromes and the P partial syndromes in the buffer includes storing the Q partial syndromes in a first buffer, and storing the P partial syndromes in a second buffer.

Abstract: In an optical disk storage device capable of reading compact disks (CDs) and digital video disks (DVDs), the latency of an error correction system is significantly reduced by sharing a syndrome buffer between CD and DVD modes of operation. In CD mode, user data read from the disk is stored in the syndrome buffer and corrected using C1/C2 redundancy of a Cross-Interleaved Reed-Solomon Code (CIRC). In DVD mode, user data read from the disk is stored in a data buffer and the syndrome buffer stores: intermediate values for generating the ECC syndromes for use in correcting the user data, and data CRC and error CRC syndromes for use in verifying the validity and completeness of the corrections. Two aspects of the present invention which significantly increase throughput are (1) the ECC syndromes are generated concurrently for the row (Q) and column (P) codewords of the CD and DVD product codes, and (2) the CRC validation syndrome is generated concurrent with correcting the product code.

Abstract: An efficient error correction processor is disclosed for correcting a multi-dimensional code comprising a first set of codewords that intersect with a second set of codewords. The error correction is carried out by performing iterative passes over the first and second set of codewords. The individual codewords are corrected using error syndromes which are computed as a function of the codeword data. In the preferred embodiment, the individual codewords are encoded according to a Reed-Solomon code and the error syndromes are computed as the modulo division of the codeword polynomial by the factors of a generator polynomial. To increase the throughput of the error correction processor, a syndrome buffer is employed to facilitate generating the error syndromes for both the first and second set codewords concurrently. In this manner, after a pass over the first set of codewords, the error syndromes for the second set codewords are available for immediate processing.

Abstract: A method and an apparatus for performing error decoding on digital data using a Reed-Solomon code. The method decodes the value and location of errors and erasures on digital data defined as RS.sub.m (n,n-4) of the Reed-Solomon code by a series of arithmetic operations using multiplication-addition, inversion, shift-logarithm operations, and location determinations, but without power operation. Thus, the decoder requires less hardware. By these calculations the values and locations of errors and erasures on digital data are determined correctly and rapidly, avoiding Chien's search.

Abstract: A data interleaving system (20) provides flexibility by performing the interleaving function in a high level controller (32) and a separate low level controller (34). The high level controller (32) receives commands to operate on a codeword basis, in which a codeword is made up of a plurality of symbols which are grouped into a programmable number of frames. The low level controller (34) operates under the direction of the high level controller (32) on a symbol-by-symbol basis. By separating the codeword level tasks from the symbol level tasks, the data interleaving system (20) is able to accommodate various ratios of the number of frames per codeword without significant complexity. An analogous data de-interleaving system (220) includes a high level controller (232) and a low level controller (234).