Adaptive Error-correcting Capability Patents (Class 714/774)
  • Patent number: 7895503
    Abstract: Techniques for performing sphere detection to recover data symbols sent in a MIMO transmission are described. In an aspect, sphere detection is performed for data symbols generated with at least two modulation schemes. In another aspect, sphere detection is performed for the data symbols in an order determined based on at least one attribute of the data symbols, which may be error probabilities, modulation schemes, and/or link margins for the data symbols. In yet another aspect, rates for multiple data streams detected with sphere detection are selected based on channel state information. Signal qualities of the data streams may be estimated based on the channel state information, e.g., (1) an upper triangular matrix used for sphere detection and/or (2) an assumption that interference from data streams already detected is canceled. The rates for the data streams may be selected based on the estimated signal qualities.
    Type: Grant
    Filed: February 6, 2006
    Date of Patent: February 22, 2011
    Assignee: Qualcomm Incorporated
    Inventors: Jay Rodney Walton, Mark S. Wallace, Steven J. Howard
  • Patent number: 7890839
    Abstract: An RSSI detection unit detects a level of a received signal. An error detection unit performs error detection of the received signal. An error correction control unit causes an error correction unit to perform error correction of the received signal only when the error detection unit detects an error and the level of the received signal detected by the RSSI detection unit is not lower than a predetermined value.
    Type: Grant
    Filed: November 5, 2004
    Date of Patent: February 15, 2011
    Assignee: Kyocera Corporation
    Inventors: Masashi Iwami, Takeo Miyata, Tadayoshi Ito
  • Patent number: 7890833
    Abstract: Embodiments of the present invention provide methods and apparatus for wireless communication using codeword with high-rate codes. Other embodiments may be described and claimed.
    Type: Grant
    Filed: December 28, 2006
    Date of Patent: February 15, 2011
    Assignee: Intel Corporation
    Inventors: Bo Xia, Minnie Ho, Eric Jacobsen
  • Publication number: 20110029844
    Abstract: A transceiver is designed to share memory and processing power amongst a plurality of transmitter and/or receiver latency paths, in a communications transceiver that carries or supports multiple applications. For example, the transmitter and/or receiver latency paths of the transceiver can share an interleaver/deinterleaver memory. This allocation can be done based on the data rate, latency, BER, impulse noise protection requirements of the application, data or information being transported over each latency path, or in general any parameter associated with the communications system.
    Type: Application
    Filed: October 11, 2010
    Publication date: February 3, 2011
    Applicant: AWARE, INC.
    Inventors: Marcos C. Tzannes, Michael Lund
  • Patent number: 7882418
    Abstract: Provided are an LDPC encoder and decoder, and LDPC encoding and decoding methods. The LDPC encoder includes: a code generating circuit that includes a memory storing a first parity check matrix and sums a first row which is at least one row of the first parity check matrix and a second row which is at least one of the remaining rows of the first parity check matrix to output a second parity check matrix; and an encoding circuit receiving the second parity check matrix and an information word to output an LDPC-encoded code word. Also the LDPC decoder includes: a code generating circuit including a memory which stores a first parity check matrix and summing a first row which is at least one row of the first parity check matrix and a second row which is at least one of the remaining rows of the first parity check matrix to output a second parity check matrix; and a decoding circuit receiving the second parity check matrix and a code word to output an LDPC-decoded information word.
    Type: Grant
    Filed: December 7, 2005
    Date of Patent: February 1, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sang Hyun Lee, Jae Young Ahn
  • Patent number: 7877671
    Abstract: A communication apparatus that is present between each of receiver and sender LANs including a user network and a WAN, and relays a packet exchanged between the sender and receiver LANs through the WAN while correcting an error in the packet. The communication apparatus determines whether to perform error correction on a packet received from the sender LAN. When it is determined not to perform the error correction, the communication apparatus instantly transfers the packet to the receiver LAN.
    Type: Grant
    Filed: November 20, 2006
    Date of Patent: January 25, 2011
    Assignee: Fujitsu Limited
    Inventor: Junichi Sawada
  • Patent number: 7877670
    Abstract: The invention relates to error-correcting coding and correct restart of decoding after errors of sequences that are coded by convolutional coders or LFSR based descramblers. The signals can be binary or multi-valued signals. Methods and apparatus to convolutional encode and decode sequences of binary and n-valued symbols are disclosed. The invention further discloses methods and apparatus to identify symbols in error in sequences coded according to methods of the invention. Methods and apparatus to correct these errors are provided. Methods and apparatus to repair errors in a Trellis of received sequences are also provided. Methods and apparatus for n-valued Recursive Systematic Convolutional coders and decoders are disclosed.
    Type: Grant
    Filed: December 5, 2006
    Date of Patent: January 25, 2011
    Assignee: Ternarylogic LLC
    Inventor: Peter Lablans
  • Patent number: 7873898
    Abstract: A user interface component receives an input error message. A query enhancer component derives error messages from the input error messages using error pattern(s) representative of the input error message and error sub-pattern(s) of the error pattern(s). A result aggregator component inputs each error message to search engines, receives search results, aggregates the search results, and provides the search results to the user interface. The enhancer component may include a pattern composer component to locate error patterns representative of the input error message, and a sub-pattern generator component to derive error sub-patterns from the error patterns. The aggregator component may determine whether the search results are in agreement with a predetermined criterion. If not, the aggregator component may request the enhancer component to provide additional error messages to input to the search engines.
    Type: Grant
    Filed: April 3, 2008
    Date of Patent: January 18, 2011
    Assignee: International Business Machines Corporation
    Inventors: Anuradha Bhamidipaty, Vibha S. Sinha, Parul Alok Mittal
  • Patent number: 7870465
    Abstract: In one embodiment, among others, a method for executing a change from one communication channel to another includes receiving a channel-change indication and obtaining data and FEC that corresponds to the data. The data and FEC are related to a new channel, and the data includes a portion of data within a data packet. By utilizing the FEC, the method further includes recreating portions of data of the data packet that were missed due to the channel-change indication occurring in the middle of the transmission of the data packet. As an example, the data packet can be associated with video data arranged in a group of pictures (GOP) structure.
    Type: Grant
    Filed: October 18, 2006
    Date of Patent: January 11, 2011
    Inventor: William C. VerSteeg
  • Patent number: 7861145
    Abstract: A method is provided for encoding and decoding a sequence of digital data, according to which a portion of the sequence of digital data corresponds to a data block that includes several data packets, at least two data packets per data block containing an identifier. The position of the data packet within the corresponding data block can be determined based on the identifier, and the data is encoded or decoded by taking into account the identifier.
    Type: Grant
    Filed: November 13, 2008
    Date of Patent: December 28, 2010
    Assignee: Siemens Aktiengesellschaft
    Inventors: Günther Liebl, Jürgen Pandel, Marcel Wagner, Wenrong Weng
  • Patent number: 7861144
    Abstract: A method is provided for encoding and decoding a sequence of digital data, according to which a portion of the sequence of digital data corresponds to a data block that includes several data packets, at least two data packets per data block containing an identifier. The position of the data packet within the corresponding data block can be determined based on the identifier, and the data is encoded or decoded by taking into account the identifier.
    Type: Grant
    Filed: February 13, 2009
    Date of Patent: December 28, 2010
    Assignee: Siemens Aktiengesellschaft
    Inventors: Günther Liebl, Jürgen Pandel, Marcel Wagner, Wenrong Weng
  • Patent number: 7861132
    Abstract: A system and method for adaptive error correction that optimizes bandwidth by taking into account expected, or predicted, interferences. The bandwidth used for error correction is applied judiciously based on the value of the content and the need to receive the content the first time it is broadcast. The present invention further applies local optimizations in the case of spot-beam satellite broadcasts. As each spot corresponds to a particular geographic region, different input parameters may be used, thereby maximizing efficiency.
    Type: Grant
    Filed: November 19, 2004
    Date of Patent: December 28, 2010
    Assignee: The DIRECTV Group, Inc.
    Inventors: Laura J. O'Donnell, Hans M. Hagberg, Michael A. Gorman
  • Patent number: 7856589
    Abstract: A decoding circuit and method for improving error correction capability using a stuffing byte, in which in the decoding method, an input data packet is decoded. When it is determined that error correction is impossible based on a decoding result, a stuffing byte section is detected in the input data packet. A level value of data in the stuffing byte section is converted into a stuffing byte level value. A data packet having the converted level value is decoded and output. The decoding circuit includes a decoder decoding an input data packet and a control block detecting a stuffing byte section in the input data packet, converting the input data packet, and decoding a converted data packet when the decoder fails in error correction of the input data packet.
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: December 21, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Sergey Zhidkow
  • Patent number: 7853855
    Abstract: A system includes a clock having a clock frequency. A first buffer configured to buffer a plurality of encoded data frames. An iterative decoder configured to iteratively decode, in accordance with the clock frequency. A first encoded data frame of the plurality of encoded data frames buffered in the first buffer. The iterative decoder generates a confidence result. The iterative decoder compares the confidence result to a predetermined value. The iterative decoder stops iteratively decoding the first encoded data frame based on the comparison of the confidence result to the predetermined value or based on a total number of decoding iterations. The clock frequency of the clock is based on a total number of encoded data frames buffered in the first buffer.
    Type: Grant
    Filed: August 11, 2009
    Date of Patent: December 14, 2010
    Assignee: Marvell International Ltd.
    Inventor: Runsheng He
  • Patent number: 7849377
    Abstract: The present invention relates to SISO decoder for iteratively decoding a block of received information symbols (r), in particular for use in a turbo decoder, said block being divided into a number of windows of information symbols. In order to achieve a significant reduction of power consumption a SISO decoder is proposed comprising at least one SISO decoding unit (17, 21) for SISO decoding of the received information symbols (r) of a window, wherein a stopping criterion is applied to each window. This allows to abort iterative decoding for each window individually once convergence of decoding is determined by marking a window or sub-block inactive (17,23). An inactive window is no longer SISO decoded in subsequent iterations.
    Type: Grant
    Filed: December 8, 2004
    Date of Patent: December 7, 2010
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Andries Pieter Hekstra, Johannus Theodorus Matheus Hubertus Dielissen
  • Patent number: 7844882
    Abstract: A transceiver is designed to share memory and processing power amongst a plurality of transmitter and/or receiver latency paths, in a communications transceiver that carries or supports multiple applications. For example, the transmitter and/or receiver latency paths of the transceiver can share an interleaver/deinterleaver memory. This allocation can be done based on the data rate, latency, BER, impulse noise protection requirements of the application, data or information being transported over each latency path, or in general any parameter associated with the communications system.
    Type: Grant
    Filed: April 16, 2010
    Date of Patent: November 30, 2010
    Assignee: Aware, Inc.
    Inventors: Marcos C. Tzannes, Michael Lund
  • Patent number: 7843660
    Abstract: A disk drive is disclosed comprising a disk having a plurality of data tracks, wherein each data track comprises a plurality of data sectors. A head is actuated radially over the disk in order to read one of the data sectors from a target data track on the disk. The data sector is stored in a buffer and decoded with an error correction code (ECC) decoder. When the decode fails, an erasure window is adjusted based on a number of non-read data sectors recorded in the target data track, wherein the erasure window comprises a length spanning at least one ECC symbol in the data sector. The data sector is read from the buffer and decoded with the ECC decoder using the erasure window.
    Type: Grant
    Filed: November 25, 2008
    Date of Patent: November 30, 2010
    Assignee: Western Digital Technologies, Inc.
    Inventor: Teik Ee Yeo
  • Patent number: 7844881
    Abstract: A transmitting apparatus and a transmitting method wherein the systematic bit reception quality can be improved and the throughput performance can be improved. An IR parameter control part (101) controls, based on the number of retransmissions, the ratio of systematic bits to parity bits in mapping them to packets, and controls to map a parity bit to an initially transmitted packet, while mapping a systematic bit to a retransmitted packet. An encoding part (102) generates the systematic bits and parity bits and maps them to the packets in accordance with the IR parameters. A transmission power calculating part (105) calculates, based on reception quality information of the initially transmitted packet fed back from a receiving end, the transmission power of the transmitted packet to which the systematic bit is mapped.
    Type: Grant
    Filed: October 3, 2006
    Date of Patent: November 30, 2010
    Assignee: Panasonic Corporation
    Inventors: Takashi Iwai, Sadaki Futagi, Atsushi Matsumoto, Kenichi Miyoshi
  • Patent number: 7840873
    Abstract: In an embodiment, a node comprises a packet scheduler configured to schedule a packet to be transmitted on the link, the packet comprising a command and associated packet data. Coupled to the packet scheduler and configured to transmit the packet on the link, and interface circuit is configured to generate error detection data covering the packet. The interface circuit is configured to transmit the error detection data covering the packet at an end of the packet, and is further configured to insert at least one partial error detection data within the packet. The partial error detection data covers a portion of the packet that precedes the partial error detection data. A receiver is configured to receive the data and forward the data based on partial CRC check.
    Type: Grant
    Filed: December 13, 2006
    Date of Patent: November 23, 2010
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: William A. Hughes, Chen-Ping Yang, Greggory D. Donley, Michael K. Fertig
  • Patent number: 7840884
    Abstract: Method and decoding device for decoding a convolutionally coded input data signal y. The input data signal is multiplied with a scaling factor Lc(8) and then demultiplexed (6). The demultiplexed input data signal LcS is then turbo decoded (5) in order to obtain decoder output likelihood ratio data ?. The scaling factor Lc is updated (7) for a next iteration in dependence on a combination of a posteriori likelihood data based on turbo decoded output data ? and a priori likelihood data based on the demultiplexed signal LcS.
    Type: Grant
    Filed: December 23, 2003
    Date of Patent: November 23, 2010
    Assignee: Telefonaktiebolaget L M Ericsson (Publ)
    Inventors: Dignus-Jan Moelker, Jan Stemerdink
  • Patent number: 7836381
    Abstract: A transceiver is designed to share memory and processing power amongst a plurality of transmitter and/or receiver latency paths, in a communications transceiver that carries or supports multiple applications. For example, the transmitter and/or receiver latency paths of the transceiver can share an interleaver/deinterleaver memory. This allocation can be done based on the data rate, latency, BER, impulse noise protection requirements of the application, data or information being transported over each latency path, or in general any parameter associated with the communications system.
    Type: Grant
    Filed: August 9, 2010
    Date of Patent: November 16, 2010
    Assignee: Aware, Inc.
    Inventors: Marcos C. Tzannes, Michael Lund
  • Patent number: 7831890
    Abstract: A transceiver is designed to share memory and processing power amongst a plurality of transmitter and/or receiver latency paths, in a communications transceiver that carries or supports multiple applications. For example, the transmitter and/or receiver latency paths of the transceiver can share an interleaver/deinterleaver memory. This allocation can be done based on the data rate, latency, BER, impulse noise protection requirements of the application, data or information being transported over each latency path, or in general any parameter associated with the communications system.
    Type: Grant
    Filed: October 11, 2005
    Date of Patent: November 9, 2010
    Assignee: Aware, Inc.
    Inventors: Marcos C. Tzannes, Michael Lund
  • Patent number: 7827459
    Abstract: The present invention relates to an improved communications protocol which increases the efficiency of transmission in return channels on a multi-channel slotted Alohas system by incorporating advanced error correction algorithms, selective retransmission protocols and the use of reserved channels to satisfy the retransmission requests.
    Type: Grant
    Filed: January 8, 2007
    Date of Patent: November 2, 2010
    Assignee: University of Maryland, College Park
    Inventors: Xiaoming Zhou, John S. Baras
  • Patent number: 7823047
    Abstract: There is disclosed a base band signal generation device and others for processing transmission data so that a reception side can restored the data without recognizing whether the data has been subjected to a processing and transmitting the data with an appropriate efficiency corresponding to the communication quality. A transmission device T judges the communication quality of a transmission path L. When the communication quality is preferable, a four-value FSK symbol is generated from the bit of the most significant part of the encoded voice data and the bit of the least significant part. When the communication quality is not preferable, a four-value FSK symbol is generated from the bit of the most significant part of the encoded voice data and a redundant bit of “0”. However, a symbol containing a redundant bit is set to the maximum value or the minimum value of the four values which the symbol value may have.
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: October 26, 2010
    Assignee: Kabushiki Kaisha Kenwood
    Inventor: Taichi Majima
  • Patent number: 7823053
    Abstract: A user interface component receives an input error message. A query enhancer component derives error messages from the input error messages using error pattern(s) representative of the input error message and error sub-pattern(s) of the error pattern(s). A result aggregator component inputs each error message to search engines, receives search results, aggregates the search results, and provides the search results to the user interface. The enhancer component may include a pattern composer component to locate error patterns representative of the input error message, and a sub-pattern generator component to derive error sub-patterns from the error patterns. The aggregator component may determine whether the search results are in agreement with a predetermined criterion. If not, the aggregator component may request the enhancer component to provide additional error messages to input to the search engines.
    Type: Grant
    Filed: December 19, 2006
    Date of Patent: October 26, 2010
    Assignee: International Business Machines Corporation
    Inventors: Anuradha Bhamidipaty, Vibha S Sinha, Parul Alok Mittal
  • Patent number: 7818652
    Abstract: An object of the present invention is to provide an image forming system, an image processing apparatus, a determination device, and image processing method that are capable of preventing users' convenience from reducing even when an image forming apparatus prints a coded image with a low print precision. A first MFP is connected through a LAN to a second MFP for performing error-correcting coding of original information, for creating a coded image by imaging the original information with the error-correcting code, and for forming the created coded image on a sheet. The first MFP extracts the original information from the coded image on the sheet obtained by reading the sheet on which the coded image is formed. Thereafter, the first MFP transmits to the second MFP an error detection rate at the time when the original information is extracted.
    Type: Grant
    Filed: August 27, 2007
    Date of Patent: October 19, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventor: Katuaki Sakata
  • Publication number: 20100257431
    Abstract: A prediction signal calculator with a limit function is provided with a multiplier calculating a partial prediction signal composed of the product of a polar prediction coefficient for generating a regenerative signal and a quantized regenerative signal, a display conversion section for converting the partial prediction signal from floating point representation to an absolute value display, and a limiter executing processing for substituting limit values in the partial prediction signal satisfying overflow conditions during conversion of the partial prediction signal from floating point representation to an absolute value display in the event that the error detector determines that there are code errors in the audio data for a predetermined number of frames of the audio data.
    Type: Application
    Filed: June 10, 2010
    Publication date: October 7, 2010
    Applicant: UNIDEN CORPORATION
    Inventors: Eiji Shinsho, Shigeo Sato
  • Patent number: 7809996
    Abstract: Adaptive FEC coding is used to adjust the codeword composition of FEC codewords in a communication system. A codeword composition ratio may be adjusted in response to variance of a measured transmission error value from a target transmission error value in the system. The codeword composition ratio may be any quantity or value that represents the relation between the payload and parity bytes in the applicable FEC coding scheme. Adjustment of the codeword composition ratio may be adjusting parameters such as the N, K and/or R values in ADSL1 systems or the INP and/or maximum interleaving delay values in ADSL2 systems. A controller may be used to monitor, analyze and adjust the various values used in adaptively managing FEC coding. The present invention may be implemented in a transmission system in which a transmitter transmits data to a receiver via a transmission channel, such as a DSL system.
    Type: Grant
    Filed: August 4, 2008
    Date of Patent: October 5, 2010
    Assignee: Adaptive Spectrum and Signal Alignment, Inc.
    Inventor: John M. Cioffi
  • Patent number: 7810009
    Abstract: A system and method is provided for transmitting packet data in a base station of a wireless communication system using a Hybrid Automatic Repeat Request (HARQ) scheme. The method includes determining a HARQ scheme for use, from among a plurality of HARQ schemes including a Synchronous HARQ (SHARQ) scheme and an Asynchronous HARQ (AHARQ) scheme for transmission packet data, and transmitting the packet data along with control information including information indicating the determined HARQ scheme.
    Type: Grant
    Filed: October 23, 2006
    Date of Patent: October 5, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hwan-Joon Kwon, Dong-Hee Kim, Jin-Kyu Han, Yu-Chul Kim
  • Patent number: 7804891
    Abstract: A device and method for effectively judging a communication quality in a communication system and a program used for the judgment. A communication device generates a four-value FSK symbol by adding a redundant bit to a bit of the most important part of encoded audio data. The symbol containing the redundant bit is set so that the symbol value is the maximum value of the minimum value of the four values which may be obtained. A reception device R receives the FSK modulation wave, restores the symbol, counts the number of redundant bits contained in the restored symbol and having incorrect values, decides whether to perform a bad frame masking process and what kind of bad frame masking process is to be performed, and executes the decided process. Thus, it is possible to accurately or rapidly judge the communication quality with a simple configuration.
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: September 28, 2010
    Assignee: Kabushiki Kaisha Kenwood
    Inventor: Taichi Majima
  • Patent number: 7802164
    Abstract: A method for encoding a rate-compatible block Low Density Parity Check (LDPC) code. The method includes designing specific LDPC codes for a predetermined number of coding rates, and generating a pruning pattern by comparing information node degrees of the predetermined number of LDPC codes; matching check node degrees of the predetermined number of LDPC codes; generating a predetermined number of puncturing patterns according to the check node degree when the matched check node degree is calculated; determining whether a first condition given for the generated puncturing patterns is satisfied; and determining the generated puncturing patterns as rate-compatible puncturing patterns when the puncturing patterns satisfy the first condition.
    Type: Grant
    Filed: September 26, 2006
    Date of Patent: September 21, 2010
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Song-Nam Hong, Hyun-Jeong Kang, Jung-Je Son, Jae-Weon Cho, Hyoung-Kyu Lim, Sung-Jin Lee, Mi-Hyun Lee, Yeong-Moon Son, Young-Ho Kim, Pan-Yuh Joo
  • Patent number: 7801109
    Abstract: There is provided an information processing terminal that has a plurality of data communication portions that receive data from a read/write unit by a non-contact method. The information processing terminal includes a data processing portion that selects and processes one of the data received by a first data communication portion that is one of the plurality of data communication portions and the data received by a second data communication portion that is one of the plurality of data communication portions. The information processing terminal also includes a load modulation portion that performs a load modulation with respect to a response to the read/write unit according to the data processing in the data processing portion.
    Type: Grant
    Filed: July 20, 2007
    Date of Patent: September 21, 2010
    Assignee: Felica Networks, Inc.
    Inventors: Yoichi Miyagawa, Mamoru Suzuki, Kazuyoshi Enomoto, Yuko Yoshida, Atsuo Yoneda
  • Patent number: 7796499
    Abstract: A method of determining whether to generate a video refresh request includes receiving a packet and performing at least one of determining whether the received packet contains an error and determining whether a packet prior to the received packet was lost. Responsive to a determination that the received packet contains an error, an error index is increased. Responsive to a determination that a packet prior to the received packet has been lost, the error index is increased. Responsive to a determination that the received packet does not contain an error and that a packet prior to the received packet has not been lost, the error index is decreased.
    Type: Grant
    Filed: May 7, 2004
    Date of Patent: September 14, 2010
    Assignee: Telefonaktiebolaget L M Ericsson (Publ)
    Inventors: Per Thorell, Jan-Ove Johansson, Göran Roth
  • Patent number: 7797614
    Abstract: An algorithm for a non-redundant multi-error correcting binary differential demodulator simplifies error detection and reduces memory requirements in circuits embodying the same. The demodulator includes a differential detectors (DD) module, an error signal generator (ESG) module, and an error detection-and-correction (EDAC) module. The DD module receives modulated binary input at each of (k+1) differential detectors, each producing (k+1) outputs. The ESG module combines the (k+1)2 output signals with k corrected feedback signals to derive syndromes orthogonal to an erroneous bit to be corrected and generates 2k error signals from the syndromes. The EDAC module generates a correction factor from the 2k error signals and combines the factor with the output of the first order detector delayed by k bits to correct an erroneous bit. The k corrected feedback signals may be derived by successively delaying the corrected erroneous bit.
    Type: Grant
    Filed: October 17, 2006
    Date of Patent: September 14, 2010
    Assignee: Northrop Grumman Corporation
    Inventor: Mostafa A. Karam
  • Patent number: 7793193
    Abstract: In a method for error correction of packet data, in particular DAB (digital audio broadcasting) data packets, code words being used over multiple data packets, redundancy information for error correction is added while maintaining the original packet data structure, at the cost of a free data field or a useful data field. The cycle of the error protection is selected as a multiple of a minimum size for a packet length.
    Type: Grant
    Filed: March 21, 2005
    Date of Patent: September 7, 2010
    Assignee: Robert Bosch GmbH
    Inventors: Hartwig Koch, Frank Hofmann, Gerald Spreitz
  • Patent number: 7787524
    Abstract: An object of the invention is to provide a wireless communication apparatus which can correct error flexibly without wasting consumed resources while maintaining the improvement of reliability resulted from error correction.
    Type: Grant
    Filed: March 3, 2006
    Date of Patent: August 31, 2010
    Assignee: Panasonic Corporation
    Inventors: Kenichi Miyoshi, Ayako Horiuchi
  • Patent number: 7788568
    Abstract: A method for characterizing performance of an error correction scheme for digital data transport is provided. A digital data packet stream within an Internet Protocol packet stream is monitored for a first set of packet errors. Errors of the Internet Protocol packet stream are corrected according to the error correction scheme to produce a corrected Internet Protocol packet stream. The digital data packet stream within the corrected Internet Protocol packet stream is monitored for a second set of packet errors. The first and second sets of packet errors are compared to characterize the performance of the error correction scheme.
    Type: Grant
    Filed: January 23, 2006
    Date of Patent: August 31, 2010
    Assignee: Sprint Communications Company L.P.
    Inventors: Renxiang Huang, Claudio Lima, Jim Black
  • Patent number: 7774677
    Abstract: For the transmission of information with verification of transmission errors, a useful information message (M) is transmitted in a determined frame while being associated with a determined number p of transmission error verification bits (CRC,S) also transmitted in the frame. In order to have an element allowing the verification of intentional errors, determined number p1 of the transmission error verification bits form a seal (S) obtained from a determined sealing function, where p1 is a number less than p. Application to radiocommunications equipment requiring the verification of the integrity and the authentication of the messages transmitted.
    Type: Grant
    Filed: December 22, 2004
    Date of Patent: August 10, 2010
    Assignee: EADS Secure Networks
    Inventors: Marc Mouffron, Jean-Michel Tenkes
  • Publication number: 20100199151
    Abstract: Disclosed are a rich media sever, a rich media transmission system, and a rich media transmission method, which are adaptive to network environments. The rich media server includes an interfacing unit for communicating with a terminal, which requests rich media; a media processing unit for processing at least one piece of media corresponding to the request; a rich-media encoding unit for encoding at least one piece of media, which is output from the media processing unit, to produce rich media, and outputting the rich media to the interfacing unit in order to provide the rich media to the terminal; and a controller for determining importance rates of pieces of media constituting the rich media, based on reproduction information of the rich media, and controlling at least one of the media processing unit and the rich-media encoding unit to convert a transmission processing for the at least one piece of media based on the determined importance rates.
    Type: Application
    Filed: August 18, 2008
    Publication date: August 5, 2010
    Applicant: SK TELECOM CO., LTD.
    Inventor: Joong Yun Lee
  • Publication number: 20100185906
    Abstract: Methods and structure described herein provide for adjusting an error correction capability of an LDPC error correction code. For example, the system of one embodiment includes a decoder adapted to decode data that has been encoded with a LDPC error correction code. The system also includes a detector communicatively coupled to the decoder and adapted to estimate bit values in the data prior to decoding by the decoder. The detector is further adapted to change bit values based on bit value estimations to reduce the error correction capability of the LDPC error correction code. The reduction in error correction capability is adjustable such that sector failure rates of storage devices may be incrementally analyzed.
    Type: Application
    Filed: March 11, 2009
    Publication date: July 22, 2010
    Applicant: LSI CORP.
    Inventors: Richard Rauschmayer, Hongwei Song
  • Patent number: 7761775
    Abstract: A method and communication system for selecting a mode for encoding data for transmission in a wireless communication channel between a transmit unit and a receive unit. The data is initially transmitted in an initial mode and the selection of the subsequent mode is based on a selection of first-order and second-order statistical parameters of short-term and long-term quality parameters. Suitable short-term quality parameters include signal-to-interference and noise ratio (SINR), signal-to-noise ratio (SNR), power level and suitable long-term quality parameters include error rates such as bit error rate (BER) and packet error rate (PER). The method of the invention can be employed in Multiple Input Multiple Output (MIMO), Multiple Input Single Output (MISO), Single Input Single Output (SISO) and Single Input Multiple Output (SIMO) communication systems to make subsequent mode selection faster and more efficient.
    Type: Grant
    Filed: July 1, 2004
    Date of Patent: July 20, 2010
    Assignee: Intel Corporation
    Inventors: David J. Gesbert, Severine E. Catreux, Robert W. Heath, Jr., Peroor K. Sebastian, Arogyaswami J. Paulraj
  • Patent number: 7761776
    Abstract: A linear feedback shift register (LFSR) based design is applied to cyclic redundancy check (CRC) modules, in which a CRC building block having a minimum width is implemented. The CRC building block accepts a generator polynomial as an input design parameter to build a CRC block module. The modularity of the design then allows a larger CRC block design to be constructed from multiple CRC block modules such that wider data width blocks may be accommodated. The LFSR based designs are extended to communication systems that may require scrambling and descrambling functionality.
    Type: Grant
    Filed: November 3, 2005
    Date of Patent: July 20, 2010
    Assignee: XILINX, Inc.
    Inventor: Khaldoun Bataineh
  • Patent number: 7747927
    Abstract: A non-volatile memory device is provided with a controller and includes method that controls memory operations and to emulate the memory and communication characteristics of a legacy memory device. In this way, the memory device is compatible with a host that was originally designed to operate the legacy memory device. In particular, the controller performs the emulation to the host taking into account differences such as multibit memory, error correction requirement, memory support of overwrites, and erasable block sizes.
    Type: Grant
    Filed: November 22, 2005
    Date of Patent: June 29, 2010
    Assignee: Sandisk Corporation
    Inventors: Daniel C. Guterman, Yoram Cedar, Charles Schroter, Milton Lourenco Barrocas, Carlos Gonzalez, Kevin M. Conley
  • Patent number: 7747928
    Abstract: A prediction signal calculator with a limit function is provided with a multiplier calculating a partial prediction signal composed of the product of a polar prediction coefficient for generating a regenerative signal and a quantized regenerative signal, a display conversion section for converting the partial prediction signal from floating point representation to an absolute value display, and a limiter executing processing for substituting limit values in the partial prediction signal satisfying overflow conditions during conversion of the partial prediction signal from floating point representation to an absolute value display in the event that the error detector determines that there are code errors in the audio data for a predetermined number of frames of the audio data.
    Type: Grant
    Filed: December 14, 2006
    Date of Patent: June 29, 2010
    Assignee: Uniden Corporation
    Inventors: Eiji Shinsho, Shigeo Sato
  • Patent number: 7743309
    Abstract: A process for distributed source coding (DSC) using context is presented. By forming contexts from prior coded bitplanes of both a reference and DSC coded peer, the DSC virtual channel is split into several virtual sub-channels of different characteristics. The selection of the sub-channel becomes side information that is known to the receiver. As a result, the DSC coding bitrate is reduced.
    Type: Grant
    Filed: March 17, 2006
    Date of Patent: June 22, 2010
    Assignee: Microsoft Corporation
    Inventors: Jin Li, Yong Sun
  • Patent number: 7739472
    Abstract: A non-volatile memory device is provided with a controller and includes method that controls memory operations and to emulate the memory and communication characteristics of a legacy memory device. In this way, the memory device is compatible with a host that was originally designed to operate the legacy memory device. In particular, the controller performs the emulation to the host taking into account differences such as multibit memory, error correction requirement, memory support of overwrites, and erasable block sizes.
    Type: Grant
    Filed: November 22, 2005
    Date of Patent: June 15, 2010
    Assignee: Sandisk Corporation
    Inventors: Daniel C. Guterman, Yoram Cedar, Charles Schroter, Milton Lourenco Barrocas, Carlos Gonzalez, Kevin M. Conley
  • Patent number: 7734980
    Abstract: Embodiments of the invention are generally directed to systems, apparatuses, and methods for mitigating silent data corruption in a fully-buffered memory module architecture. In an embodiment, a memory controller includes a memory channel bit-lane error detector having an M-bit CRC and N-bit CRC, wherein N is less than M. The N-bit CRC is used if at least one bit-lane of the memory channel fails. In one embodiment, the memory controller selectively applies the strong error detection capability of an error correction code (ECC) in combination with the N-bit CRC to signal the need to resend faulty data, if at least one bit-channel has failed. Other embodiments are described and claimed.
    Type: Grant
    Filed: June 24, 2005
    Date of Patent: June 8, 2010
    Assignee: Intel Corporation
    Inventors: James W. Alexander, Suresh Chittor, Dennis W. Brzezinski, Kai Cheng, Rajat Agarwal
  • Patent number: 7734987
    Abstract: A communication method includes causing a transmitter to apply error correcting or detecting code systems to multiple frames or packets and to transmit the multiple frames or packets in succession, causing a receiver to receive the transmitted frames or packets and to decode each of the frames or packets received, and causing the receiver to send an acknowledgment signal to the transmitter on the basis of the results of decoding of the frames or packets. The transmitter applies two or more error correcting or detecting code systems to the frames or packets.
    Type: Grant
    Filed: August 4, 2006
    Date of Patent: June 8, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Satoshi Kaburaki, Masahiro Sekiya
  • Patent number: 7734988
    Abstract: A method for puncturing a Low Density Parity Check (LDPC).
    Type: Grant
    Filed: October 2, 2006
    Date of Patent: June 8, 2010
    Assignees: Samsung Electronics Co., Ltd, Yonsei University
    Inventors: Dong-Ho Kim, Yung-Soo Kim, Ye-Hoon Lee, Myeon-Gyun Cho, Hyo-Yol Park, Keum-Chan Whang, Kwang-Soon Kim, Jae-Won Kang
  • Publication number: 20100138724
    Abstract: A method of error protection for wireless communication of packets of sampled digitized audio data according to a selected communication protocol, comprising: identifying the least significant bits of each sample of audio data encoded in the packets based on the communication protocol used; selectively replacing one or more of the least significant bits with values that enable performing error correction on the rest of the data encoded in the packet; transmitting the altered packet from a transmitting party to a receiving party; using the replaced bits to detect or correct errors in the transmitted packet; wherein said communication protocol uses an ADPCM encoding scheme.
    Type: Application
    Filed: December 1, 2008
    Publication date: June 3, 2010
    Applicant: DSP Group Ltd.
    Inventors: Eli Fogel, Mark Raifel