By Checking The Correct Order Of Processing (epo) Patents (Class 714/E11.178)
  • Publication number: 20120159253
    Abstract: The present invention relates to the field of processing within hardware security modules, such as for example debugging of compiled programs. A debugging module includes a microprocessor and a compiled program to be executed by the microprocessor in order to carry out an operation, and is configured to exchange with an external entity, in a master/slave mode, messages relating to the operation. The compiled program includes at least one debugging instruction which whether or not it is executed does not modify the execution of the operation. The hardware security module is moreover configured to transmit, during the execution of the compiled program, data generated, for example by the debugging instruction, over a communication channel initiated by the hardware security module, to an entity external to the hardware security module.
    Type: Application
    Filed: December 16, 2011
    Publication date: June 21, 2012
    Applicant: OBERTHUR TECHNOLOGIES
    Inventors: Matthieu Boisdé, Nicolas Bousquet
  • Publication number: 20120151273
    Abstract: An enterprise disaster recovery system, including a processor for running at least one data application that reads data from at least one data disk and writes data to the at least one data disk over a period of time, a recovery test engine that (i) generates in parallel a plurality of processing stacks corresponding to a respective plurality of previous points in time, each stack operative to process a command to read data at a designated address from a designated data disk and return data at the designated address in an image of the designated data disk at the previous point in time corresponding to the stack, and (ii) that generates in parallel a plurality of logs of commands issued by the at least one data application to write data into designated addresses of designated data disks, each log corresponding to a respective previous point in time.
    Type: Application
    Filed: February 7, 2012
    Publication date: June 14, 2012
    Applicant: ZERTO LTD.
    Inventors: Tomer Ben Or, Gil Barash, Chen Burshan
  • Publication number: 20120144238
    Abstract: A system locates a user in a remote troubleshooting environment. An office device is utilized to perform at least one of a copy, a facsimile, a print, and an email. A headset facilities audio communication between the user and a remote troubleshooter. A compass is located proximate to the office device wherein the headset is placed in a predetermined location proximate to the compass to establish a datum point such that movement from the datum point is recognized as a location proximate to the office device. A remote processing component displays the location of the headset relative to the office device based on information provided by the compass.
    Type: Application
    Filed: February 13, 2012
    Publication date: June 7, 2012
    Applicant: XEROX CORPORATION
    Inventor: Frederic Roulland
  • Publication number: 20120144239
    Abstract: Methods for automatically testing a business intelligence artifact include authoring a business intelligence artifact selected from the group consisting of a report specification, an analysis cube, and a metadata model; creating an assertion to verify the proper functioning of the business intelligence artifact; and testing, with an automated agent interfaced with the business intelligence system, the business intelligence artifact to verify its proper functioning by determining whether the conditions of the assertion are satisfied upon execution of the business intelligence artifact in the business intelligence system.
    Type: Application
    Filed: February 8, 2012
    Publication date: June 7, 2012
    Applicant: MOTIO, INC.
    Inventors: J. Lynn Moore, JR., Lance W. Hankins
  • Publication number: 20120137177
    Abstract: A first test script that includes at least one first step for executing a test of a test portal is provided in a computing device. An indication that an event has occurred in response to the test is received in the computing device. A second test script that includes at least one second step for executing the test is generated in the computing device, the at least one second step being at least in part a response to the event.
    Type: Application
    Filed: February 8, 2012
    Publication date: May 31, 2012
    Inventor: Manohar Kesireddy
  • Publication number: 20120131388
    Abstract: A system and method of assisting with failure mode and effects analysis of a system includes obtaining data describing a set of symptoms and a set of faults, and symptom-fault association data describing which of the symptoms are indicative of which of the faults. Data describing a set of measurements, and measurement-symptom association data describing which of the measurements detect which of the symptoms is also obtained. User input representing a selection of at least one of the faults and at least one of the measurements is received and data representing a graphical display is generated to simultaneously show relationships between the selected fault(s) and the symptoms associated with the selected fault(s), and relationships between the selected measurement(s) and the symptoms associated with the selected measurement(s).
    Type: Application
    Filed: June 4, 2010
    Publication date: May 24, 2012
    Applicant: BAE SYSTEMS plc
    Inventor: Neal Snooke
  • Publication number: 20120131382
    Abstract: A information processing system comprises a memory module having a plurality of unit memory regions, a memory controller, connected to the memory module via memory interface, configured to control access to the memory module, an error detector, which is in the memory controller, configured to perform an error detection on data read from the memory module, a failure inspection controller configured to switch a mode of the memory controller from a normal mode to a failure inspection mode, read data from an address, where data was written, to be inspected for each of the plurality of unit memory regions, causes the error detector to detect an error in the read data and perform a failure inspection and a determining unit configured to determine a memory failure or a transmission path failure on the basis of the state of the error detected from the unit memory regions.
    Type: Application
    Filed: September 7, 2011
    Publication date: May 24, 2012
    Applicant: FUJITSU LIMITED
    Inventor: Masanori HIGETA
  • Publication number: 20120124427
    Abstract: A method for error control in an overall system having multiple installations, the installations communicating with one another via a data transmission system having a predefined transmission bandwidth, at least one installation component of each installation transmitting a predefined piece of information in a defined time slot of the transmission bandwidth of the data transmission system.
    Type: Application
    Filed: May 27, 2010
    Publication date: May 17, 2012
    Inventor: Karsten Haug
  • Publication number: 20120117430
    Abstract: A memory card includes a memory cell, a connector, a controller, and firmware. The memory cell can switch between a plurality of states. The connector can be connected to an external device and exchange signals including commands and data with the external device. The controller exchanges signals with the connector, analyzes a received signal, and accesses the memory cell to record, retrieve or modify data based on the analysis result. The firmware is located within the controller, controls the operation of the controller, and can be set to a test mode or a user mode. When the firmware receives a test command from the external device and the firmware is set to the test mode, the firmware performs a defect test on the memory cell and transmits the result of the defect test to the external device through the connector.
    Type: Application
    Filed: September 7, 2011
    Publication date: May 10, 2012
    Inventors: Yun-Bo YANG, Young-Jae JUNG, Kui-Hyun RO, Sung-Eun YUN
  • Publication number: 20120117426
    Abstract: A method for verifying an operation of a processor, the method includes executing, by a software simulator, a test instruction used for verifying a model dependent operation of the processor, obtaining an expectation value from a result of the executed test instruction, obtaining a result value of the test instruction executed by the processor, and comparing, by a verification processor, the obtained expectation value with the obtained result value to determine a match or mismatch between the expectation value and the result value.
    Type: Application
    Filed: September 6, 2011
    Publication date: May 10, 2012
    Applicant: FUJITSU LIMITED
    Inventor: Hiroshi TAKAO
  • Publication number: 20120110391
    Abstract: Methods and apparatus are provided for determining the fault diagnosability of a health monitoring software application for a complex system. The method includes extracting data from the software application containing a relationship between one or more failure modes of the complex system and one or more evidence items of the complex system, the a priori probabilities of each failure mode occurring, and the a priori probability of each evidence item occurring. The method also includes creating one or more matrices relating the one or more FMs to the one or more evidence items. The method further includes analyzing the one or more matrices and the a priori probabilities to determine the diagnosability of each FM.
    Type: Application
    Filed: October 27, 2010
    Publication date: May 3, 2012
    Applicant: HONEYWELL INTERNATIONAL INC.
    Inventors: Joel Bock, Akhilesh Maewal, Tony Eidson
  • Publication number: 20120102361
    Abstract: A system and method using statistical analysis for the process of analyzing and generating organizational policies is presented. This inventive method comprises, for one or more tests, using a test to calculate a test result for the policy based on current violator entities and potential violator entities, and determining a policy ranking for the policy based on the test result of the test, and evaluating the policy based on the policy rankings determined from the tests. The method can also comprise creating a repository comprising the policy rankings for the plurality of policies. The repository can be used to trend, benchmark, alert and improve the policies. The method can also comprise creating a rule profile for the one policy comprising the one policy, the current violator entities of the policy, the potential violator entities of the policy, the test results and the policy rankings from the tests.
    Type: Application
    Filed: October 25, 2010
    Publication date: April 26, 2012
    Applicant: COMPUTER ASSOCIATES THINK, INC.
    Inventors: Rami Sass, Ehud Amiri
  • Publication number: 20120102363
    Abstract: A technique includes using a computer agent to observe diagnoses of computer-related incidents. Based on the observation, patterns are identified in the diagnoses, and based at least in part on the patterns, the diagnoses are selectively automated.
    Type: Application
    Filed: July 2, 2009
    Publication date: April 26, 2012
    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Dejan S. Milojicic, Brian Cox, Timothy F. Forell, Alan G. Nemeth, Jon Christopher Connelly
  • Publication number: 20120096315
    Abstract: A micro controller includes an input and output unit having a reset terminal, a plurality of input terminals, and a test enable terminal, a test mode setting unit which allocates a first input terminal of the plurality of input terminals to a test clock terminal and allocates the remaining N input terminals to L test terminals, in response to a signal output from the input and output unit, and a processor which controls the input and output unit and the test mode setting unit. The test mode setting unit includes M flip-flops which receives a test clock signal from the first input terminal, a test signal from the N input terminals, and a test enable signal from the test enable terminal, and a decoder which decodes a signal output from the M flip-flops and determines whether or not to allocate the N input terminals to the L test terminals.
    Type: Application
    Filed: September 22, 2011
    Publication date: April 19, 2012
    Inventor: Byunggeun Jung
  • Publication number: 20120072775
    Abstract: To quickly establish an inferring result when a problem is detected in an operation management system equipped with a rule-based inference processing function, there is provided a method of collecting information for managing a computer system equipped with a plurality of devices. The computer system holds rule for associating a plurality of events with a conclusion output when all of the plurality of events have been detected. The method includes: executing, at a first interval, polling to obtain information indicating whether each of the plurality of events has been detected; judging whether the plurality of events have been detected; and executing, upon judgment that at least one of the plurality of events has been detected and none of the remaining events have been detected, before execution of next polling at the first interval, polling to obtain information indicating whether at least one of the undetected remaining events has been detected.
    Type: Application
    Filed: November 29, 2011
    Publication date: March 22, 2012
    Inventors: Masayoshi Matsumoto, Yuji Mizote, Takaki Kuroda
  • Publication number: 20120072769
    Abstract: In a distributed system a plurality of devices (including computing units, storage and communication units) are monitored by an automated repair service that uses sensors and performs one or more repair actions on computing devices that are found to fail according to repair policies. The repair actions include automated repair actions and non-automated repair actions. The health of the computing devices is recorded in the form of states along with the repair actions that were performed on the computing devices and the times at which the repair actions were performed, and events generated by both sensors and the devices themselves. After some period of the time, the history of states of each device, the events, and the repair actions performed on the computing devices are analyzed to determine the effectiveness of the repair actions.
    Type: Application
    Filed: September 21, 2010
    Publication date: March 22, 2012
    Applicant: Microsoft Corporation
    Inventors: Moises Goldszmidt, Mihai Budiu, Yue Zhang, Michael Pechuk
  • Publication number: 20120066548
    Abstract: A method of automating testing of a first computing system comprises identifying a plurality of system interface elements of a second computing system; determining an untested state at the first computing system of one of the identified plurality of system interface elements; determining the existence of any dependency of the one of the identified plurality of system interface elements upon another of the identified plurality of system interface elements; responsive to a finding of no the dependency, seeking in a repository a system interface element test corresponding to the one of the identified plurality of system interface elements and having an expected output according to a structure of the second computing system; and executing the system interlace element test at the first computing system.
    Type: Application
    Filed: September 2, 2011
    Publication date: March 15, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: John Robert Barker, Ian James McCloy, Daniel Gregory Mounty
  • Publication number: 20120060059
    Abstract: Disclosed is a method and apparatus for testing devices that will be connected to a computer storage media device by generating a complex test waveform that emulates operation of the computer storage media device using at least one Graphics Processing Unit (GPU) and applying the generated complex test waveform to the device(s) being tested. The complex test waveform may be generated by calculating a plurality of discrete individual portions of the complex test waveform in parallel, in real-time, and continuously using the parallel processing features of the GPU(s). The discrete individual portions of the complex test waveform may be representative of various characteristics of the emulated computer storage media device operation such as operational characteristics of the computer storage media device, environmental effects on the computer storage media device, application of filters to the computer storage media device signal, etc.
    Type: Application
    Filed: September 8, 2010
    Publication date: March 8, 2012
    Inventors: Joshua Alan Johnson, Robert W. Warren, JR., Kyle L. Nelson
  • Publication number: 20120054559
    Abstract: A system for computer-aided identification of technical phenomena and related methods, particularly with technical problems is described. The system is equipped with a computer executing a program and provided with means for inputting alphanumeric data, means for entering graphical information, and a visual display. The execution of said program causes the computer to work by displaying a sequence of request and input windows for a description of the technical phenomenon by way of an alphanumeric, human natural language and/or a graphical image and according to specific logic and construction rules of the human natural language expression or of the graphic expression, at a detailed level, which construction rules change from window to window and are displayed at the margin of a data input field in the window.
    Type: Application
    Filed: August 18, 2011
    Publication date: March 1, 2012
    Inventors: Davide RUSSO, Valentino BIROLINI
  • Publication number: 20120047401
    Abstract: A test method for restarting a computing device communicating with a remote computer. The computing device is shut down and awakened by the remote computer. A second hardware information of the computing device after restarting the operating system of the computing device is compared with initial hardware information of the computing device when the computing device is initial started. Test results are stored to a predetermined storage path and displayed on a screen after the test ends.
    Type: Application
    Filed: August 9, 2011
    Publication date: February 23, 2012
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD
    Inventors: HAI-LI WANG, YONG-QIAN DENG
  • Publication number: 20120036396
    Abstract: A test method for an ASIC uses an embedded processor in the ASIC to execute test routines from an embedded memory or an external memory. During ASIC production, the test routines can comprehensively test of the blocks of the ASIC without a complicated test pattern from test equipment. The test routines can also perform power-up tests in systems or end products containing the ASIC. Test selection, activation, and result output can be implement using a few terminals of the ASIC.
    Type: Application
    Filed: October 20, 2011
    Publication date: February 9, 2012
    Inventors: Richard D. Taylor, Mark D. Montierth, Melvin D. Bodily, Gary Zimmerman, John D. Marshall
  • Publication number: 20120023371
    Abstract: The testing of services techniques include a method, a system, and a non-transitory computer-readable storage medium. In some embodiments of these techniques, the method includes receiving a first payload generated by a first service. The first service transmits the first payload to a system. The method further includes receiving a second payload from a second service. The second payload is generated based on data received from the first service. The method further includes receiving a schema associated with the second payload. The schema is configured to define the structure of the second payload. The method further includes determining one or more discrepancies between the second payload and the first payload using the schema associated with the second payload. The method further includes determining a testing result based on the one or more discrepancies. This Abstract is provided for the sole purpose of complying with the Abstract requirement rules.
    Type: Application
    Filed: July 23, 2010
    Publication date: January 26, 2012
    Inventors: Rene Laengert, Michael Spengler
  • Publication number: 20120017119
    Abstract: In one embodiment, a method includes analyzing one or more first numeric constraints and one or more first string constraints associated with a software module including one or more numeric variables and string variables; inferring one or more second numeric constraints applying to specific ones of the string variables; inferring one or more second string constraints applying to specific ones of the numeric variables; representing each one of the first and second numeric constraints with an equation; representing each one of the first and second string constraints with a finite state machine; and testing the software module for one or more possible errors by attempting to solve for a solution including one or more values for specific ones of the numeric and string variables that satisfies all the first and second numeric constraints and all the first and second string constraints.
    Type: Application
    Filed: July 16, 2010
    Publication date: January 19, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Indradeep Ghosh, Daryl R. Shannon
  • Publication number: 20120011405
    Abstract: Policy verification arrangements effecting operations of: modifying address information of system component information for all system components, stored in a system management server, to redirect-address information to a test tool as a substitute destination in order for the test tool to be able to receive a result of system management operations during testing, instead of a corresponding system component; acquiring configuration information of the information processing system from the system management server; generating a test item specifying a test event; transmitting the test event specified by the generated test item to the policy manager and/or said system management server; and recording a result of the system management operations which is requested by the policy manager and/or system management server responsive to the test event specified by the generated test item, but which is redirected back to the test tool via the redirected-address information stored in the system management server.
    Type: Application
    Filed: September 19, 2011
    Publication date: January 12, 2012
    Inventors: Yoshimasa MASUOKA, Naoki Utsunomiya
  • Publication number: 20110320872
    Abstract: A computer-implemented method for verifying a RAIM/ECC design using a hierarchical injection scheme that includes selecting marks for generating an error mask, selecting a fixed bit mask based on the selected marks, determining whether to inject errors into at least one of a marked channel and at least one marked chip of a channel; and randomly injecting errors into the at least one of the marked channel and the at least one marked chip when determined.
    Type: Application
    Filed: June 24, 2010
    Publication date: December 29, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Dean G. Bair, Patrick J. Meaney, Luis A. Lastras-Montano, Alia D. Shah, Eldee Stephens
  • Publication number: 20110314334
    Abstract: In a first embodiment of the present invention, a method for performing regression testing on a simulated hardware is provided, the method comprising: scanning a defect database for fixed signatures; retrieving all tests in a failing instance database that correspond to the fixed signatures from the defect database; running one or more of the retrieved tests; determining if any of the retrieved tests failed during running; and for any retrieved test that failed during running, refiling the failed retrieved tests in the failing instance database and placing one or more generalized signatures for the failed retrieved tests in the defect database.
    Type: Application
    Filed: June 16, 2010
    Publication date: December 22, 2011
    Applicant: PLX Technology, Inc.
    Inventor: Jordan SILVER
  • Publication number: 20110314344
    Abstract: A test device is disclosed having a display and a graphical user interface (GUI) that provides guidance to a user by displaying first and second icons for representing first and second actions to be taken by the test device upon selecting the first and the second icons, respectively, by the user. To provide the guidance to the user, the second icon has graphical features indicative of the current status of the first action. For cases where the first action is a test that failed, the second action is highlighted thereby guiding the user to take the second action in response to the failed test. At least one of the graphical features of the second icon is indicative of whether the second icon is currently selectable by the user.
    Type: Application
    Filed: June 16, 2010
    Publication date: December 22, 2011
    Inventors: Koji Okamoto, Ben Maxson
  • Publication number: 20110307740
    Abstract: Described is automatically processing an initial database repro (text representing a bug when corresponding script is executed in a database engine) into a min-repro (a subset of the text) that is simplified version of the initial repro yet still contains the bug. A parse tree representative of the initial database repro is processed into simplified parse trees based on language grammar rules, e.g., by replacing higher level nodes with descendant nodes. Repros of the simplified parse trees are executed to determine which simplified repros still fail execution because of the bug (that is, the simplified repros were not oversimplified). A minimum simplified parse tree with respect to a desired level of minimality is found from among those failing repros, with the simplified repro that corresponds to the minimum simplified parse tree output as the min-repro.
    Type: Application
    Filed: June 14, 2010
    Publication date: December 15, 2011
    Applicant: MICROSOFT CORPORATION
    Inventor: Nicolas Bruno
  • Publication number: 20110302453
    Abstract: A debug method for computer system is disclosed. The method includes the following steps. Firstly, a first index is increased. Next, a first debug data to a jth debug data are received via a debug port of controller. Then, the first debug data to the jth debug data are sequentially stored to a first memory block of a storage unit of the controller according to the second index of controller. Afterwards, the (i+1)th debug data to the jth debug data are copied to the second memory block from the first memory block according to the increased first index before a controller's power supply is removed or the computer system enters a sleep state. Lastly, an application is implemented so that the second memory block is read according to the first index; wherein, i and j are integers.
    Type: Application
    Filed: November 19, 2010
    Publication date: December 8, 2011
    Applicant: Quanta Computer Inc.
    Inventors: Chun-Jie Yu, Chun-Yi Lu, Yu-Hui Chen, Chih-Hung Kuo
  • Publication number: 20110289354
    Abstract: Method and systems for allocating test scripts across a plurality of test machines is described. A set of test scripts may be maintained where the set of test scripts includes a plurality of test scripts for allocation to a plurality of test machines. A first request for a first test script task may be received from a first test machine of a plurality of test machines. A determination may be made as to whether each test script within the set of test scripts has been allocated. If not, a first unallocated test script to allocate to the first test machine may be determined, and a first test script task may be allocated to the first test machine where the first test script task includes the first unallocated test script. The first unallocated test script then may be identified as an allocated test script in the set of test scripts.
    Type: Application
    Filed: August 4, 2011
    Publication date: November 24, 2011
    Applicant: BANK OF AMERICA CORPORATION
    Inventor: Dan Alexandru Martinov
  • Publication number: 20110276837
    Abstract: A method and system for verifying memory device integrity includes identifying at least one memory block corresponding to at least one memory location within a memory device. The memory block is associated with a portion of a file and a checksum representing data within the memory block at a first time. Based at least in part on determining that the memory block is mapped to the same portion of the same file at a second time, it is indicated that the checksum represents expected data within the memory block. A system for verifying memory device integrity is also disclosed.
    Type: Application
    Filed: May 6, 2010
    Publication date: November 10, 2011
    Inventors: Timothy Steven Potter, Donald Becker, Bruce Montgomery, JR., Dave Dopson
  • Publication number: 20110271278
    Abstract: Embodiments of the present invention provide a method and system for managing life-cycles of a “software as a service” (SaaS) software application. In one embodiment, a method comprises installing the SaaS software application in a system landscape on a computer server, the system landscape containing at least an application server and a database (DB) server; separating system data from customer data and storing them in different databases; creating a virtual machine (VM) image for the system landscape, the VM image to include the databases containing system data and exclude the databases containing customer data; deploying the SaaS software application to one or more computer servers by loading VMs based on the VM image; when the SaaS software application need to be upgraded to a new version, preparing a new VM image with the new version of the SaaS software application and using the new VM image.
    Type: Application
    Filed: April 30, 2010
    Publication date: November 3, 2011
    Applicant: SAP AG
    Inventor: Wolfgang Paul Wilhelm DITTRICH
  • Publication number: 20110271149
    Abstract: A diagnostic dashboard for web applications is provided. The dashboard is presented in a portion of a web page in response to activation of a control in form of a frame along with partially displayed web page contents. Designers and administrators are provided informative data to assist them in discovering root causes for page malfunctioning or slowness, and are enabled to access call stack and exception information in error messages.
    Type: Application
    Filed: April 28, 2010
    Publication date: November 3, 2011
    Applicant: MICROSOFT CORPORATION
    Inventors: Corey M. Roussel, Bharathwaj R. Sampathkumar, Jian Zhang, Zohar Raz, Ivonne D. Galvan Coiffier
  • Publication number: 20110264963
    Abstract: A system for checking a program memory) of a processing unit includes a check module, and the processing unit is made up of an instruction counter connected to the check module. The check module has a register connected to a first changeover switch that sets the register content. In a system that allows for the instruction addresses of the entire program memory to be checked, the instruction counter contains an ancillary counter, which runs through the instruction address space of the program memory independently of the program code during normal operation and which is connected to the register.
    Type: Application
    Filed: November 27, 2008
    Publication date: October 27, 2011
    Inventors: Jo Pletinckx, Hongyn Wang, Axel Wenzler, Markus Brockmann
  • Publication number: 20110246830
    Abstract: Techniques for creating a virtual appliance in a virtualization environment are provided. The techniques include implementing a framework, wherein the framework comprises a knowledge representation scheme for describing library knowledge to specify one or more libraries that are used for interaction between two or more appliance components, and using the framework to instrument the one or more libraries via use of the library knowledge, record each of one or more communication parameter values in an original environment, and package one or more disk images, wherein the one or more disk images contain the one or more instrumented libraries, the one or more communication parameter values, and translation logic, to create a virtual appliance.
    Type: Application
    Filed: April 6, 2010
    Publication date: October 6, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Soudip R. Chowdhury, Manish Gupta, Kalapriya Kannan, Narendran Sachindran, Manish Sethi, Ram Viswanathan
  • Publication number: 20110239045
    Abstract: According to one embodiment, an evaluating apparatus includes an operation data storage unit, a labeling unit, a learning unit, and an evaluating unit. The labeling unit applies a failure label, indicating that a product is broken down, to operation data of the product that is broken down within a designated period of time from the observation date of the operation data, while applies a non-failure label, indicating that the product is not broken down, to the operation data of the product that is not broken down within a designated period of time from the observation date of the operation data. The labeling unit applies neither the failure label nor the non-failure label to the operation data of the product, which is not certain that it is broken down or not within a designated period of time from the observation date of the operation data.
    Type: Application
    Filed: September 14, 2010
    Publication date: September 29, 2011
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Minoru Nakatsugawa, Takeichiro Nishikawa, Ryusei Shingaki
  • Publication number: 20110239051
    Abstract: Technology is described for diagnosing problem causes in complex environments by using factorization of a plurality of features. An embodiment can include the operation of identifying a plurality of entities having entity weighting parameters. The entities may be computing devices. The plurality of features can be associated with a respective entity having feature weighting parameters, and an instance of the plurality of features can be associated with individual entity instances. A fault label can be applied for an ensemble entity. The plurality of features can be linked using the feature weighting parameter and the entity weighting parameter with a bilinear model. A further operation is estimating weighting values for the entity weighting parameters and the feature weighting parameters for use in a statistical model. The meaningful feature parameters can be found for the statistical model that are likely to be responsible for entity faults.
    Type: Application
    Filed: March 25, 2010
    Publication date: September 29, 2011
    Applicant: Microsoft Corporation
    Inventors: Sumit Basu, John Dunagan
  • Publication number: 20110239048
    Abstract: In one embodiment, the invention comprises partial fault tolerant stream processing applications. One embodiment of a method for implementing partial fault tolerance in a stream processing application comprising a plurality of stream operators includes: defining a quality score function that expresses how well the application is performing quantitatively, injecting a fault into at least one of the plurality of operators, assessing an impact of the fault on the quality score function, and selecting at least one partial fault-tolerant technique for implementation in the application based on the quantitative metric-driven assessment.
    Type: Application
    Filed: March 29, 2010
    Publication date: September 29, 2011
    Applicant: International Business Machines Corporation
    Inventors: HENRIQUE ANDRADE, Bugra Gedik, Gabriela Jacques da Silva, Kun-Lung Wu
  • Publication number: 20110239052
    Abstract: According to one embodiment, a debugging tool includes a processor and logic, that when executed by the processor, causes the processor to: receive a Volume Table of Contents (VTOC)/INDEX data set for a first VTOC/INDEX data of a remote system, create second VTOC/INDEX data (which is a replicated version of the first VTOC/INDEX data of the remote system) from the VTOC/INDEX data set, execute a second scenario (which is a replicated version of a first scenario that was executed on the remote system using the first VTOC/INDEX data that caused the error) using the second VTOC/INDEX data to reproduce an error, and set up trace points in the second VTOC/INDEX data to start a debugging session while executing the second scenario using the second VTOC/INDEX data. Other systems, methods, and computer program products are also described according to various other embodiments.
    Type: Application
    Filed: March 29, 2010
    Publication date: September 29, 2011
    Applicant: International Business Machines Corporation
    Inventor: Trinh H. Nguyen
  • Publication number: 20110225460
    Abstract: Debugging operations on individual client sessions for a remotely executed shared application are enabled to be performed as the client requests are processed on the executing server without disrupting execution of other client sessions. A remote debugging client may connect to a debugging engine executed on the server allowing the debugging client to view source code, set breakpoints, view client connections, and receive callbacks or notifications when a breakpoint is hit by the client session being debugged. The debugging client may also control execution by stepping through client code enabling debugging of multiple clients simultaneously.
    Type: Application
    Filed: March 10, 2010
    Publication date: September 15, 2011
    Applicant: Microsoft Corporation
    Inventors: John Stairs, Thomas Hejlsberg
  • Publication number: 20110214019
    Abstract: The invention provides a highly resilient network infrastructure that provides connectivity between a main network such as the Internet and a subnetwork such as a server-based (e.g., web server) local area network. In accordance with the invention, a network interface incorporated into a server hosting center provides a resilient architecture that achieves redundancy in each of three different layers of the Open System Interconnect (OSI) stack protocol (i.e., physical interface, data link, and network layers). For every network device that is active as a primary communication tool for a group of subnetworks, the same device is a backup for another group of subnetworks. Based on the same connection-oriented switching technology (e.g., asynchronous transfer mode (ATM)) found in high-speed, broadband Internet backbones such as that provided by InternetMCI, the network interface architecture provides a high degree of resiliency, reliability and scalability.
    Type: Application
    Filed: May 12, 2011
    Publication date: September 1, 2011
    Applicant: VERIZON BUSINESS GLOBAL LLC
    Inventor: Kaustubh PHALTANKAR
  • Publication number: 20110202798
    Abstract: In a remote technical support system, in response to a request for service, a user device receives an executable application from the technical support controller, which executable application is subsequently invoked at the user device. Additionally, the user device receives configuration information from the technical support controller. The executable application then performs technical support processing of the user device in accordance with the configuration information. The executable application can be configured, based on the configuration information, to engage in dynamic workflow, i.e., to make decisions about what activities to perform based on previous results. Because the configuration information can be selected according to the specific nature of the user device and/or the specific nature of the service request, the executable application can be tailored to best address the requesting end user's needs with minimal attention from a remote technician.
    Type: Application
    Filed: February 15, 2010
    Publication date: August 18, 2011
    Applicant: ACCENTURE GLOBAL SERVICES GMBH
    Inventors: Roy VERA, Michael P. DUFFY, Frederick T. LAMMING, Colin M. TUGGLE
  • Publication number: 20110197090
    Abstract: A software component is executed to carry out a task, the task including a subtask. An external function is called to perform the subtask, the external function executing in a separate thread or process. The component receives an observation recorded by the external function, the observation including an identifier of a possible error condition and instance data associated with the possible error condition. The possible error condition being a cause of the failure of the external function to carry out the subtask. If the task cannot be completed, then a new observation is recorded along with the received observation, the new observation being related to a possible error condition of the component, which is a cause of the failure of the component to carry out the task. When the task can be completed despite the failure of the external function, the observation recorded by the external function is cleared.
    Type: Application
    Filed: February 10, 2010
    Publication date: August 11, 2011
    Applicant: VMWARE, INC.
    Inventors: Osten Kit COLBERT, Dilpreet BINDRA, Patrick TULLMANN
  • Publication number: 20110191632
    Abstract: A SFP checking device (SFP Check) connects to a SFP transceiver and a PC or laptop via a USB cable. The SFP Check uses the default web browser of the PC, without an internet connection, to display details of the SFP transceiver such as wavelength, description, range, manufacturer, among other information, in accordance with program code provided to the PC via the SFP Check. All of the information a technician in the field needs to determine which SFP transceiver is the right one for a selected application and optical link is available from the SFP Check. The SFP Check and SFP transceiver both receive power via the USB cable connection to the PC. The SFP Check appears to the PC as a memory stick. A method is provided for determining the drive letter associated with the SFP Check and the program coder or file(s) it provides to the PC.
    Type: Application
    Filed: February 3, 2011
    Publication date: August 4, 2011
    Inventor: Gary Miller
  • Publication number: 20110185231
    Abstract: An online marketplace for distributing software applications is established. From the online marketplace, devices are enabled to select respective ones of the software applications and initiate testing of the selected software applications in connection with testing tools operating in respective secure testing environments that shield the devices from potential adverse effects arising from testing the selected software applications. The testing tools generate testing data relating to one or more criteria for certifying the selected software applications. For each of one or more of the selected software applications, a determination is made whether or not to classify the software application as a certified software application based on an evaluation of the testing data generated during the testing of the software applications initiated by a plurality of the devices.
    Type: Application
    Filed: January 27, 2010
    Publication date: July 28, 2011
    Inventors: Filippo Balestrieri, Matteo Monchiero
  • Publication number: 20110185232
    Abstract: A computer implemented method for configuring virtual internal networks for testing is provided, such that affects of testing are internally isolated. The method includes deploying a virtual firewall and deploying a public switch enabling access to an external local area network through a first interface of the virtual firewall. A private switch enabling access to a plurality of virtual machines through a second interface of the virtual firewall is provided. The plurality of virtual machines defines a private network behind the firewall. A network address is assigned to the virtual firewall and a private address is assigned to each of the virtual machines. The plurality of virtual machines is then tested through a test launcher in communication with the public switch.
    Type: Application
    Filed: April 4, 2011
    Publication date: July 28, 2011
    Applicant: VMWARE, INC.
    Inventor: Govindarajan SOUNDARARAJAN
  • Publication number: 20110179308
    Abstract: A multiple-processor system 2 is provided where each processor 4-0, 4-1 can be dynamically switched between running in a locked mode where one processor 4-1 checks the operation of the other processor 4-0 and a split mode where each processor 4-0, 4-1 operates independently. Multiple auxiliary circuits 8-0, 8-1 provide auxiliary functions for the plurality of processors 4-0, 4-1. In the split mode, each auxiliary circuit 8-0, 8-1 separately provides auxiliary functions for a corresponding one of the processors 4-0, 4-1. To ensure coherency when each processor 4-0, 4-1 executes a common set of processing operations, in the locked mode a shared one of the auxiliary circuits 8-0 provides auxiliary functions for all of the processors 4-0, 4-1.
    Type: Application
    Filed: January 21, 2010
    Publication date: July 21, 2011
    Applicant: ARM Limited
    Inventors: Chiloda Ashan Senerath Pathirane, Antony John Penton
  • Publication number: 20110173482
    Abstract: A data processing apparatus and method provide fault tolerance when executing a sequence of data processing operations. The data processing apparatus has processing circuitry for performing the sequence of data processing operations, and a redundant copy of that processing circuitry for operating in parallel with the processing circuitry, and for performing the same sequence of data processing operations. Error detection circuitry detects an error condition when output data generated by the processing circuitry differs from corresponding output data generated by the redundant copy. Shared prediction circuitry generates predicted data input to both the processing circuitry and the redundant copy, with the processing circuitry and redundant copy then performing speculative processing of one or more data processing operations in dependence on that predicted data.
    Type: Application
    Filed: January 14, 2010
    Publication date: July 14, 2011
    Applicant: ARM LIMITED
    Inventors: Antony John Penton, Simon Andrew Ford, Andrew Christopher Rose
  • Publication number: 20110167227
    Abstract: Various embodiments of the present invention provide systems and methods for updating detector parameters in a data processing circuit. For example, a data processing circuit is disclosed that includes a first detector circuit, a second detector circuit, and a calibration circuit. The first detector circuit is operable to receive a first data set and to apply a data detection algorithm to the first data set, and the second detector circuit is operable to receive a second data set and to apply the data detection algorithm to the second data set. The calibration circuit is operable to calculate a data detection parameter based upon a third data set. The data detection parameter is used by the first detector circuit in applying the data detection algorithm to the first data set during a period that the data detection parameter is used by the second detector circuit in applying the data detection algorithm to the second data set.
    Type: Application
    Filed: January 4, 2010
    Publication date: July 7, 2011
    Inventors: Shaohua Yang, Jonseung Park, Changyou Xu, Madhusudan Kalluri, Yuan Xing Lee, Kapil Gaba
  • Publication number: 20110167301
    Abstract: An apparatus and method are provided and include a formula server having formulas and conversion modules that are separate from a diagnostic application of a diagnostic tool. The diagnostic tool receives the diagnostic data and transmits it to a remote computer, where the data is converted using a formula. The resulting data is then transmitted back to the diagnostic tool for display.
    Type: Application
    Filed: March 17, 2011
    Publication date: July 7, 2011
    Applicant: SPX Corporation
    Inventors: Manokar CHINNADURAI, Troy Liebl