By Checking The Correct Order Of Processing (epo) Patents (Class 714/E11.178)
  • Publication number: 20110161741
    Abstract: Method, apparatus and computer program product for correlating performance events in a data processing system. A first event is received at one of a first device and a second device of the data processing system, and a second event is received at one of the first device and the second device. A type of a connection between the first device and the second device is identified to form an identified type of connection, and a relationship between the first event and the second event is determined based on the identified type of connection between the first device and the second device.
    Type: Application
    Filed: December 28, 2009
    Publication date: June 30, 2011
    Applicant: International Business Machines Corporation
    Inventors: William P. Berriss, Matthew Duggan, Daniel Martin, David J. Pennell, SR.
  • Publication number: 20110161742
    Abstract: A monitoring of a server system during an execution of a server system processing logic, includes: during collection and storage of operational metrics by a given thread in a thread-local memory, determining that a checkpoint within the server system processing logic is reached; determining whether a threshold number of checkpoints have been encountered by the given thread; in response to the threshold number of checkpoints having been encountered, determining whether a threshold time interval since a last rollup of the collected operational metrics has been exceeded; and in response to the threshold time interval being exceeded, performing a rollup of the collected operational metrics from the thread-local memory to an accumulation point in a shared memory, where the accumulation point stores aggregated operational metrics from a plurality of threads.
    Type: Application
    Filed: December 29, 2009
    Publication date: June 30, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Paul M. Bird, David Kalmuk, Scott D. Walkty
  • Publication number: 20110154127
    Abstract: Testing of a computer program product by selecting a test node at which a snapshot is to be acquired to enable the completion of tests along test scenarios in the shortest time is provided. Information on a test scenario, information on a test node to which a test node makes a next transition, and other information are stored. For each test node, it is determined whether a branch path exists, and for each of these test nodes, an estimated execution time required to complete a test when a snapshot is acquired at a test node is calculated, an execution time required to complete a test without acquiring any snapshot is calculated, and a difference between the execution time and the estimated execution time is calculated as a reduced time. A test node with the longest reduced time is selected, and information for identifying the selected test node is output.
    Type: Application
    Filed: November 12, 2010
    Publication date: June 23, 2011
    Applicant: International Business Machines Corporation
    Inventors: Sakura BHANDARI, Yuriko Nishikawa, Kaoru Shinkawa, Yoshinori Tahara
  • Publication number: 20110145005
    Abstract: A system and method for automatic business content discovery are described. In various embodiments, a system includes modules to bind business terms to data validation rules and search data sources for data matching data validation rules. In various embodiments, the system binds matching data to data validation rules. In various embodiments, a user interface is provided for creating and managing business terms and data validation rules. In various embodiments, a method for profiling and monitoring data via graphical controls is presented.
    Type: Application
    Filed: December 10, 2009
    Publication date: June 16, 2011
    Inventors: Wu Cao, Balaji Gadhiraju, Sridhar Gantimahapatruni, David Kung, Marc Maillart, Awez Syed, Aun-Khuan Tan
  • Publication number: 20110138222
    Abstract: Methods and systems are disclosed to generate a data map for a data storage device. A data map may be generated by scanning, during a power-on initialization process, data units of data stored on a data storage medium of a data storage device. The scanning may start from a selected data unit and proceed through the data units in an order opposite to a write order to identify a first data unit that is not fully erased. Also. an error recovery status of the first data unit may be determined based on an error correction code. A likely erased status of the first data unit may be assigned when the determined error recovery status is unrecoverable.
    Type: Application
    Filed: December 3, 2009
    Publication date: June 9, 2011
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Jonathan W. Haines, Brett A. Cook, Gabriel Ibarra, Peter Vasiliev
  • Publication number: 20110126055
    Abstract: An information processing apparatus includes: an information collecting unit that collects information including a diagnosis history regarding a component of the information processing apparatus in application processing by the information processing apparatus; a diagnosis operation determination unit that determines a priority level setting for offline diagnosis of the information processing apparatus based on the information collected by the information collecting unit; and an application-terminated-period diagnosis unit that performs diagnosis of a component at the time of the offline diagnosis based on the priority level setting determined by the diagnosis operation determination unit.
    Type: Application
    Filed: October 27, 2010
    Publication date: May 26, 2011
    Applicant: FUJITSU LIMITED
    Inventors: Ikuo Shimada, Mamoru Arisumi
  • Publication number: 20110107153
    Abstract: A system and method for monitoring exploratory testing by a plurality of testers of software containing a graphical user interface is disclosed. The method includes recording interactions of each of the plurality of testers with a graphical user interface (GUI) under test. The recorded interactions of each tester can be stored in an interaction database. An interaction footprint map is created from the interaction database to show which portions of the GUI under test have had interaction with at least one of the testers. The interaction footprint map is displayed in relation to the GUI for at least one end user.
    Type: Application
    Filed: November 2, 2009
    Publication date: May 5, 2011
    Inventors: Ilan Shufer, Alexei Ledenev, Yaron Burg
  • Publication number: 20110107146
    Abstract: A test system collects passing event data and failing event data, and merges the collected data into passing subsequences and failing subsequences, respectively. The test system identifies an overlap area between the passing subsequence and the failing subsequence in regards to time slices and tracepoint slices, and creates passing transactions and failing transactions using the event data corresponding to the overlap area. Next, the test system detects a timing discrepancy between the first passing transaction relative to the second passing transaction compared with the first failing transaction relative to the second failing transaction. The test system then reports the detected timing discrepancy, which allows a test engineer to perturb the test program in order to more frequently catch intermittent failures caused by asynchronous timing conditions.
    Type: Application
    Filed: November 3, 2009
    Publication date: May 5, 2011
    Inventors: Mrinal Bose, Jayanta Bhadra, Hillel Miller, Edward L. Swarthout, Ekaterina A. Trofimova
  • Publication number: 20110099424
    Abstract: A method for enabling concurrent testing is described. The method includes generating a plurality of test objects on a computing device. The plurality of test objects is generated using derived classes that are based on a base test class and each of the plurality of test objects corresponds to a separate block in a Device Under Test (DUT). The method also includes adding the plurality of test objects to a queue and sending information based on the plurality of test objects to an Automated Test Equipment (ATE). The method also includes causing the ATE to concurrently test the separate blocks in the DUT using the plurality of test objects.
    Type: Application
    Filed: September 23, 2010
    Publication date: April 28, 2011
    Inventors: Gustavo Javier Rivera Trevino, Michael G. Back, Kelly Jones
  • Publication number: 20110099427
    Abstract: A timer circuit and a timer method are provided for a BIOS of an electronic device. The timer circuit includes a processing module, a setting module, and a display module. The processing module includes a microprocessor unit (MCU), a clock circuit 20, and a reset circuit. The timer circuit electronically connects with a debug card to measure a running time of a procedure of the BIOS of the electronic device. A timer result of the measurement is displayed on the display module.
    Type: Application
    Filed: July 2, 2010
    Publication date: April 28, 2011
    Applicants: HONG FU JIN PRECISION INDUSTRY (ShenZhen) Co., LTD, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: YONG-JUN SONG
  • Publication number: 20110099431
    Abstract: A relocatable interrupt handler for use in test generation and execution. A computer program product for executing test code includes a tangible storage medium storing instructions for execution by a processing circuit for performing a method. The method includes executing a test code block that includes a plurality of test instructions. The executing includes, for one or more of the test instructions: executing the test instruction at a first memory location; determining that the executing the test instruction caused an exception condition to occur; executing exception handling logic associated with the exception condition in response to determining that the executing the test instruction caused the exception condition to occur, the exception handling logic executed at a second memory location that is different than the first memory location; and clearing the exception condition. A return code that indicates a result of executing the test code block is then generated.
    Type: Application
    Filed: October 26, 2009
    Publication date: April 28, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Eli Almog, Timothy J. Slegel
  • Publication number: 20110099425
    Abstract: A system for testing a video memory reliability of a video card includes an input module, a data read/write module, a data processing module, a data comparison module, and an output module. The input module is capable of activating a testing program which includes an original image file. The data read/write module is capable of writing the original image file in the video memory from the testing program, and reading the image file data stored in the video memory during the writing process for storing the read image file data to form a new image file. The data processing module is capable of calculating hash values of the original and new image files using hash function(s). The data comparison module is capable of comparing hash values, and outputting the comparison result. The output module is capable of indicating whether the video card is normal according to the comparison result.
    Type: Application
    Filed: February 4, 2010
    Publication date: April 28, 2011
    Applicants: HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD ., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: QING-HUA LIU
  • Publication number: 20110093745
    Abstract: The present invention generally relates to systems and methods for implementing test applications of systems using locks.
    Type: Application
    Filed: October 20, 2009
    Publication date: April 21, 2011
    Inventors: Aviad Zlotnick, Eitan Farchi, Yarden Nir-Buchbinder
  • Publication number: 20110093744
    Abstract: Method and systems for allocating test scripts across a plurality of test machines is described. A set of test scripts may be maintained where the set of test scripts includes a plurality of test scripts for allocation to a plurality of test machines. A first request for a first test script task may be received from a first test machine of a plurality of test machines. A determination may be made as to whether each test script within the set of test scripts has been allocated. If not, a first unallocated test script to allocate to the first test machine may be determined, and a first test script task may be allocated to the first test machine where the first test script task includes the first unallocated test script. The first unallocated test script then may be identified as an allocated test script in the set of test scripts.
    Type: Application
    Filed: November 30, 2009
    Publication date: April 21, 2011
    Applicant: Bank of America Corporation
    Inventor: Dan Alexandru Martinov
  • Publication number: 20110083039
    Abstract: A circuit is operated to detect unstable memory cells from among a plurality of memory cells in at least one page. A determination is made from an initial status of data stored in a memory cell whether no read error occurs when the data is read at a standard read voltage level, whether a read error occurs and the read error is correctable, and whether a read error occurs and the read error is uncorrectable. Responsive to determining that a read error occurs that is correctable, a further determination is made as to whether the memory cell is correctable by reading the data stored in the memory cell at a correction read voltage level, which has a different voltage level from the standard read voltage level, and by determining whether a read error occurring in the data read at the correction read voltage level is correctable or uncorrectable.
    Type: Application
    Filed: May 5, 2010
    Publication date: April 7, 2011
    Inventors: Seon-taek Kim, Yoon-young Kyung
  • Publication number: 20110066898
    Abstract: Predictive analysis systems and methods use and correlate data from historic events to identify trends and develop corrective maintenance and logistics actions in various technology areas, such as the transportation industry, the manufacturing industry, or any other suitable industry that experiences equipment failure. The predictive analysis method and also determines the adequacy and compliance of the requirements prior to the failure of a system in order to preemptively minimize and eliminate these negative outcomes. Current failure trends may be evaluated for one or several components of a given system, which may be the frequency of incidence of failure of one or more components of the system. Engineering instructions for repair may also be evaluated when a failure of one or more components of the system has taken place. On the basis of this information, future failure trends may be forecast and supply channels and maintenance and repair protocols may be updated in order to decrease component failure.
    Type: Application
    Filed: August 17, 2010
    Publication date: March 17, 2011
    Applicant: Ki Ho Military Acquisition Consulting, Inc.
    Inventors: Francis Xavier MCRORY, Rogelio SAUCEDO
  • Publication number: 20110066906
    Abstract: Described embodiments provide a scan chain including at least one pulse-triggered latch scan cell. The pulse-triggered latch scan cell includes a pulse-triggered latch adapted to latch data present at its input terminal to its output terminal based on a clock pulse applied to its clock terminal. A pulse generator is adapted to generate the clock pulse from either a rising edge or a falling edge of a clock signal, and the pulse generator includes a logic circuit adapted to generate either a rising edge-generated clock pulse or a falling edge-generated clock pulse based on a control signal.
    Type: Application
    Filed: September 14, 2009
    Publication date: March 17, 2011
    Inventor: Robin Jui-Pin Tang
  • Publication number: 20110055633
    Abstract: A test controller interprets declarative test instructions into imperative test tasks and runs the tests using the imperative test tasks. Declarative test instructions indicate what tests are to be run and the imperative test tasks indicate how these tests are to be run. In addition, the imperative test tasks further indicate a control flow of the running of the tests.
    Type: Application
    Filed: August 31, 2009
    Publication date: March 3, 2011
    Inventors: Martin Vecera, Jiri Pechanec
  • Publication number: 20110055636
    Abstract: Embodiments relate to systems and methods for testing results of configuration management activity. In embodiments, a configuration management server can control and maintain the configuration state of one or more targets, hosts, servers, clients, or other machines in a managed. In aspects, a testing tool hosted on the configuration management server can verify the correct implementation of configuration instructions. In embodiments, the testing tool can access or receive an anticipated or target configuration state for one or more target(s) or other machines, indicating the status of services, memory, security, storage, and/or other configuration parameters after a selected configuration command is to be transmitted and run on the recipient machine. After the configuration change or update is performed, the test tool can receive results indicating the actual configuration state achieved after running the configuration management command(s), and compare those to the anticipated configuration state.
    Type: Application
    Filed: August 31, 2009
    Publication date: March 3, 2011
    Inventors: Michael Paul DeHaan, Adrian Karstan Likins, Seth Kelby Vidal
  • Publication number: 20110055634
    Abstract: A system and method for testing a computer divide test programs in a test file into hardware test programs and software test programs. A test server selects one or more test programs from the divided test file according to test parameters of the computer. The test server generates a test command for testing test items of the computer. The computer executes the test command. The test server analyzes test results and stores analyzed results into a predefined storage path.
    Type: Application
    Filed: April 19, 2010
    Publication date: March 3, 2011
    Applicants: HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: YONG-ZHAO HUANG
  • Publication number: 20110047415
    Abstract: Facilitating debugging of business flows deployed on a production server. An aspect of the present invention processes some service requests (received from a client system) in a normal mode and some other service requests in a debug mode concurrently, all according to a business flow. According to another aspect, the debug mode supports a single step debug operation, in which each step corresponds to a single activity of the business flow. Accordingly, an administrator of the production server is enabled to better determine, the problems in the execution of business flows deployed on a production server at runtime.
    Type: Application
    Filed: December 29, 2009
    Publication date: February 24, 2011
    Applicant: Oracle International Corporation
    Inventor: Vijay Kyathanahalli Nanjundaswamy
  • Publication number: 20110041010
    Abstract: A System-on-Chip (SOC) integrated circuit (IC) debugging system includes a plurality of SOC ICs connected to a shared debug bus. One of the plurality of SOC ICs is a master SOC IC having a master/slave debug interface. The master/slave debug interface on the master SOC IC is a bidirectional debug interface operable to send and receive debug data between the SOC ICs and an external host system.
    Type: Application
    Filed: October 27, 2010
    Publication date: February 17, 2011
    Inventor: Albrecht MAYER
  • Publication number: 20110029824
    Abstract: A system, a computer program product and a method for failure prediction are implemented on an agent. The agent is installed on a machine to be monitored. The method includes detecting service data on the machine. A reference database is accessed, and a failure pattern is provided. The detected service data are analyzed in view of the provided failure pattern by applying a correlation mechanism, such that a prediction for future failures is generated and depicted as a result.
    Type: Application
    Filed: July 30, 2010
    Publication date: February 3, 2011
    Inventors: Thorsten Schöler, Werner Zirkel
  • Publication number: 20110022900
    Abstract: Techniques for providing a method and system for multi-layer network analysis and design are disclosed. In one particular exemplary embodiment, the techniques may be realized as a method, comprising determining, using a computer model of a network, a minimum probability of failure path between a pair of network nodes at a first network layer for one or more pairs of network nodes, calculating, using a processor and stored network data, a value for the minimum probability of failure for the identified minimum probability of failure path between the pair of network nodes at the first network layer for the one or more pairs of network nodes. The method may include identifying a maximum of the determined minimum probability of failure values for the one or more pairs of network nodes for the first network layer. The method may include probability of failure calculations for one or more secondary network layers.
    Type: Application
    Filed: October 8, 2010
    Publication date: January 27, 2011
    Applicants: Verizon Corporate Services Group, Inc., Verizon Corporate Resources Group, LLC
    Inventors: Deepak KAKADIA, Jay J. Lee, Thomas H. Tan
  • Publication number: 20110010586
    Abstract: A test method including executing a data transfer instruction with regard to transfer of data between a plurality of multiplexed storage devices and a plurality of main systems logically connected to the plurality of storage devices, storing an initial value of an operand upon execution of the data transfer instruction, re-setting the stored initial value to the operand upon occurrence of an interrupt triggered by an exception, and repeatedly executing the data transfer instruction and re-setting the stored initial value to the operand, by the main system accessing the storage device, until the data transfer instruction is completed normally.
    Type: Application
    Filed: May 28, 2010
    Publication date: January 13, 2011
    Applicant: FUJITSU LIMITED
    Inventor: Masaru MISHUKU
  • Publication number: 20110010585
    Abstract: A system and method for testing line state. Traffic through a communications path is determined. A test vector is generated. Attributes of the test vector simulate the traffic. The test vector is communicated to one or more end devices. Performance information for each of the attributes of the test vector is measured. A performance map utilizing the attributes and the performance information is generated.
    Type: Application
    Filed: January 4, 2010
    Publication date: January 13, 2011
    Inventors: Michael K. Bugenhagen, Robert J. Morrill
  • Publication number: 20100332922
    Abstract: A solid state disk drive is provided. The solid state disk drive includes a multiple level cell (MLC) memory device and a controller. The MLC memory device includes memory blocks each comprising memory cells capable of storing more than a single bit of data per cell. The controller transforms at least one memory block into a single level cell (SLC)-like memory block, and accesses the memory block in an SLC manner.
    Type: Application
    Filed: March 11, 2010
    Publication date: December 30, 2010
    Applicant: MEDIATEK INC.
    Inventors: Po-Wei Chang, Kun-Hung Hsieh, Li-Chun Tu, Ting-Chun Chang, Kuo-Hung Wang
  • Publication number: 20100332907
    Abstract: A system and method for testing different computer types sets test parameters of each computer type of the computers, and sends a test command to each computer to control each computer to test each test signal of the computer. The system and method further receives test result data collected by the computer, and compares the test result data with preset standard test result to determine if the test result data is acceptable.
    Type: Application
    Filed: December 4, 2009
    Publication date: December 30, 2010
    Applicants: HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: Yong-Zhao Huang
  • Publication number: 20100332912
    Abstract: Systems, methods and articles of manufacture are disclosed for conveying which hardware components of a logically partitioned computer system are assigned to a selected logical partition of the computer system. Partition information for the computer system may be received. Further, a request may be received from a user to view which hardware components of the computer system are assigned to a selected logical partition of the computer system. Based on the received partition information, hardware components may be determined that are assigned to the selected logical partition. Based on the determined hardware components, a virtual model of the computer system may be generated that visually distinguishes hardware components assigned to the selected logical partition from hardware components not assigned to the selected logical partition. Responsive to the request, the virtual model may be output to a graphical display device.
    Type: Application
    Filed: June 26, 2009
    Publication date: December 30, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: CURTIS S. EIDE, MICHAEL T. KALMBACH, ADITYA KUMAR, TIMOTHY L. THOMPSON, BRENT R. TIEFENTHALER
  • Publication number: 20100332899
    Abstract: A method, system and computer program for quality management of a plurality of documents associated with a data-processing operation of an organization is provided. The documents include several fields, the organization has employees, and the method comprises determination of error rates. Errors are reduced in the plurality of documents by focusing on critical fields. The occurrence of errors is predicted by determining a correlation between the errors and a set of attributes, which is updated. Reducing and predicting errors control the error rate. A method for measuring the quality of a plurality of documents is also provided. The measurement is based on the relative operational impact of the errors and the frequency of errors associated with each field.
    Type: Application
    Filed: September 8, 2010
    Publication date: December 30, 2010
    Applicant: BEYONDCORE, INC.
    Inventors: Arijit Sengupta, Brad A. Stronger
  • Publication number: 20100318849
    Abstract: Behavior Request is passed by a behavior injection harness specifying a particular behavior point, component, configuration or machine state, iteration (or sequence) to execute, product-independent atomic operation or to send data to be consumed by product code. Behavior requests can be configured and passed to a product process during runtime to change the state of a thread without affecting rest of deployment or configuration.
    Type: Application
    Filed: June 11, 2009
    Publication date: December 16, 2010
    Applicant: Microsoft Corporation
    Inventors: Victor Magidson, Dwight Kruger, Dennis Doom, Alejandro Romero
  • Publication number: 20100318847
    Abstract: Techniques for building a model for performing diagnostics. In one embodiment, a set of models is determined based upon a topological relationship created upon receiving an alert or a request for which diagnostics are to be performed. An aggregate model is then generated based upon the set of models and the topological relationship. The aggregate model is then used for performing the diagnostics.
    Type: Application
    Filed: June 16, 2009
    Publication date: December 16, 2010
    Applicant: Oracle International Corporation
    Inventors: Mirza Mohsin Beg, Charles P. Sum
  • Publication number: 20100318841
    Abstract: A method for tuning memory parameter values and a computer system using the same are disclosed. In the invention, the computer system provides an embedded controller which may accumulate a counting value and send a reset signal to reboot the computer system. Firstly, the embedded controller reloads a memory parameter value corresponding to the counting value. Then, the computer system executes a memory test procedure. When the memory test procedure successes, a BIOS stores the memory parameter value. On the contrary, when the memory test procedure fails, the embedded controller accumulates the counting value and sends the reset signal to reboot the computer system. The BIOS reloading another memory parameter value corresponding to the accumulated counting value and re-executes the memory test procedure.
    Type: Application
    Filed: June 7, 2010
    Publication date: December 16, 2010
    Applicant: ASUSTEK COMPUTER INC.
    Inventors: Chih-Shien Lin, Cheng-Hsun Li, Yi-Chun Tsai
  • Patent number: 7844781
    Abstract: An operating system kernel includes an attach mechanism and a detach mechanism. In addition, processes are tagged with an access attribute identifying the process as either a client process or a server process. Based on the access attribute, the operating system kernel lays out the process local address space differently depending on whether the process is a client process or a server process. A server process can “attach” to a client process and reference all of the client process' local storage as though it were its own. The server process continues to reference its own process local storage, but in addition, it can reference the other storage, using the client process' local addresses. When access to the other storage is no longer needed, the server process can “detach” from the client process. Once detached, the other storage can no longer be referenced.
    Type: Grant
    Filed: February 23, 2006
    Date of Patent: November 30, 2010
    Assignee: International Business Machines Corporation
    Inventors: Michael J. Corrigan, Paul LuVerne Godtland, Richard Karl Kirkman, Wade Byron Ouren, George David Timms, Jr.
  • Publication number: 20100299562
    Abstract: A data processing apparatus is disclosed including trace logic for monitoring behaviour of a portion of said data processing apparatus and prediction logic for providing at least one prediction as to at least one step of the behavior of the portion of the data processing apparatus. The trace logic monitors behavior of the portion of the data processing apparatus, determines from the monitored behaviour whether the at least one prediction is correct, and outputs a prediction indicator indicating whether the at least one prediction is correct.
    Type: Application
    Filed: June 1, 2010
    Publication date: November 25, 2010
    Applicant: ARM Limited
    Inventors: Michael John Williams, John Michael Horley, Edmond John Simon Ashfield
  • Publication number: 20100293413
    Abstract: In one aspect of the invention, a method provides a calibrated critical-failure model for a printing process of a critical feature by virtue of a classification of an optical parameter space according to at least two print-criticality levels. Print failure of a respective critical feature is judged on the basis of a print-failure criterion for the critical feature. The respective print-criticality level is ascertained from test-print-simulation data at a sampling point of a process window for a given point in an optical-parameter space, and from a failure rule. An advantage achieved with the method is that it comprises ascertaining the predefined optical-parameter set from the test-print-simulation data at only one sampling point of the process window, which sampling point is identical for all test patterns. This saves processing time and processing complexity by reducing the number of ascertained optical-parameter sets and their processing in the subsequent scanning and classifying steps.
    Type: Application
    Filed: May 9, 2008
    Publication date: November 18, 2010
    Applicant: NXP B.V.
    Inventor: Amandine Borjon
  • Publication number: 20100293415
    Abstract: A system and method for analyzing and/or testing member devices in a multi-device system. The multi-device system includes a device-under-analysis (DUA) and a device-under-observation (DUO). An analyzer that is external to the multi-device system generates and sends test messages to the DUA. The analyzer monitors the health of the multi-device system through the DUO and detects a system-wide impact of the DUA caused by the test messages. The analyzer analyzes the DUA based on the test messages and the system-wide impact.
    Type: Application
    Filed: July 27, 2010
    Publication date: November 18, 2010
    Applicant: Mu Security, Inc.
    Inventors: Marshall A. BEDDOE, Thomas A. Maufer
  • Publication number: 20100287411
    Abstract: A method for computer-aided simulation of operating parameters of a technical system including a plurality of modules which each contain one or more components is provided. Failure events with associated downtimes for each component are simulated in a predetermined operating period using a first probability distribution for the moment of failure of the components and a second probability distribution for the length of the failure of the components, and a third probability distribution for a degree of reliability of the modules is determined. Based upon the probability distributions for the degrees of reliability of the modules, operating parameters of the technical system are simulated for the predetermined operating period. The method is used for any technical facilities, in particular for energy generation facilities.
    Type: Application
    Filed: May 6, 2010
    Publication date: November 11, 2010
    Inventors: Francesco Montrone, Robert Schulte, Wolfgang Streer, Ariane Sutor
  • Publication number: 20100275064
    Abstract: A method of validating a configuration of a computer clusters includes transmitting a first neighbor identification to a first flexible service processor (FSP) arranged in the first computer cluster and a second neighbor identification to a second FSP arranged in the second computer cluster, connecting a first end of a cable to a first transceiver arranged in the first cluster and connecting a second end of the cable to a second transceiver arranged in the second cluster. The first neighbor identification is passed from the first transceiver to the second computer cluster and the second neighbor identification is passed from the second transceiver toward the first computer cluster. The first neighbor identification is compared with a desired first neighbor identification to establish a first comparison result, and the second neighbor identification is compared with a desired second neighbor identification to establish a second comparison result and a notice is generated.
    Type: Application
    Filed: April 23, 2009
    Publication date: October 28, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Casimer M. DeCusatis, Aruna V. Ramanan, Edward J. Seminaro, Alison B. White, Daniel G. Young
  • Publication number: 20100275061
    Abstract: An agent server for remotely testing an electronic device is connected to the electronic device via a control interface. The control interface includes a direct power supply and a keyboard test device. The agent server receives test requirements sent from a client via a network, supplies power to a dummy of the electronic device using the direct power supply, so as to start up the electronic device. Furthermore, the agent server operates a keyboard of the electronic device according to the test requirements using the keyboard test device, so as to establish a communication between the electronic device and another electronic device. A video camera captures video and audio information of the electronic device during the communication, and transmits the video and audio information to the client. The client analyzes the video and audio information to determine a test result of the electronic device.
    Type: Application
    Filed: September 22, 2009
    Publication date: October 28, 2010
    Applicant: CHI MEI COMMUNICATION SYSTEMS, INC.
    Inventor: CHIEN-HUNG LEE
  • Publication number: 20100268931
    Abstract: In one embodiment, the present invention includes a method for performing dynamic testing of a many-core processor including a plurality of cores, manipulating data obtained from the dynamic testing into profile information of the many-core processor, and storing the profile information in a non-volatile memory. The non-volatile memory may be within the many-core processor, in some embodiments. Other embodiments are described and claimed.
    Type: Application
    Filed: June 28, 2010
    Publication date: October 21, 2010
    Inventors: Shekhar Borkar, Yatin Hoskote, Shu-Ling Garver
  • Publication number: 20100268991
    Abstract: An apparatus, system, and method are disclosed for validating application server replication errors. The method includes receiving a first information message with a test sequence from a caller. The caller is engaged in a communication session with a callee according to a communication protocol and the communication session is managed by a first application server. The method also includes storing the test sequence in a replicable data structure on the first application server. The replicable data structure is replicated to a second application server to form a replicated data structure and both servers operate within an active-active configuration. The method also includes receiving a second information message from the caller. The second information message includes a confirmation sequence. In addition, the method includes determining a replication error in response to comparing the stored test sequence in the replicated data structure with the confirmation sequence.
    Type: Application
    Filed: April 21, 2009
    Publication date: October 21, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Oliver Birch, Can P. Boyacigiller, Christopher Dacombe, Sreenivasa R. Pamidala, Bouna Sall
  • Publication number: 20100262864
    Abstract: An automatic reproduction test device in an embedded system to which external equipment (10) is connected. It includes a history storage unit (information storage 20) for storing operation events of the embedded system and events including state variations of the external equipment in a time series, and a reproduction test unit (reproduction test device 2) for reading out contents stored in the history storage unit in response to a reproduction instruction from outside, for reproducing an internal state of the embedded system in accordance with the contents read out, and for carrying out a reproduction test of the embedded system a prescribed number of times repeatedly.
    Type: Application
    Filed: October 29, 2008
    Publication date: October 14, 2010
    Inventors: Yoshinori Tsujido, Norihiro Naito
  • Publication number: 20100262671
    Abstract: Devices to be arranged in a master-slave configuration are individually tested using a testing system that ensures that the devices will satisfy an interconnection requirement of that configuration. The testing system configures a first device into one of a master mode of operation and a slave mode of operation, and adjusts frame starting positions of respective traffic flows associated with the configured mode until measured delay parameters of that mode substantially match corresponding ones of a selected set of prospective delay parameters. If the traffic flows of the one configured mode as adjusted are substantially error free, the first device is configured into the other mode, and frame starting positions of respective traffic flows associated with the other configured mode of the first device are adjusted until measured delay parameters of that mode substantially match corresponding ones of the selected set of prospective delay parameters.
    Type: Application
    Filed: April 14, 2009
    Publication date: October 14, 2010
    Inventors: Si Ruo Chen, Jin Song Liu, Tao Wang
  • Publication number: 20100257405
    Abstract: A diagnostic control methodology provides reduced disruption of device operation when performing diagnostics on devices within a computer system. A diagnostic application notifies a device driver that controls a particular device that diagnostics should be performed during a period of low activity on the device. In response to receiving the notification, the device driver waits for a time of low activity and either notifies the application to unload the device driver and load a diagnostic device driver, or enters a diagnostic mode directly if such operation is supported by the functional device driver. A timeout duration can be specified, and may be set by the notification, so that the diagnostics will be performed within the timeout period even if a time of low activity has not occurred by the expiration of the timeout.
    Type: Application
    Filed: April 1, 2009
    Publication date: October 7, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Rafael Graniello Cabezas, Brandon Dale Nelson, Daniel Patrick Thomas
  • Publication number: 20100251030
    Abstract: An apparatus, system and method for a go/no go tester that uses various data patterns to assure that equipments, systems and networks using data links, receivers and transmitters are working within the range of predetermined requirements of standards, specifications and protocols. The apparatus, system and methods can be used in at least one of SAS/SATA and Fibre Channel systems based on integrated circuit devices used within the apparatus of the invention.
    Type: Application
    Filed: March 25, 2009
    Publication date: September 30, 2010
    Applicant: International Business Machines Corporation
    Inventors: Tara Astigarraga, David Franklin DeHaan, Louie Arthur Dickens, Shelly Lynn Gerndt, Omolaoye Olatunde
  • Publication number: 20100251024
    Abstract: A software testing system for generating a test job control language (JCL) file is provided. The system includes a processor, a memory device for storing a source JCL file containing jobs and an instruction file containing instructions for modifying the source JCL file according to a test environment. A JCL generation module executed by the processor determines all procedures that are referenced by the jobs in the source JCL file, opens each unique procedure of the determined procedures once and modifies the jobs in the source JCL file based on the instruction file and the opened procedures to generate the test JCL file. By opening each procedure only once which may be called multiple times in the jobs, the JCL generation module substantially increases the speed of generating the test JCL file.
    Type: Application
    Filed: March 24, 2009
    Publication date: September 30, 2010
    Inventor: Jesus Orlando Il Gonzales
  • Publication number: 20100241903
    Abstract: The present invention extends to methods, systems, and computer program products for automatically generating and refining health models. Embodiments of the invention use machine learning tools to analyze historical telemetry data from a server deployment. The tools output fingerprints, for example, small groupings of specific metrics-plus-behavioral parameters, that uniquely identify and describe past problem events mined from the historical data. Embodiments automatically translate the fingerprints into health models that can be directly applied to monitoring the running system. Fully-automated feedback loops for identifying past problems and giving advance notice as those problems emerge in the future is facilitated without any operator intervention. In some embodiments, a single portion of expert knowledge, for example, Key Performance Indicator (KPI) data, initiates health model generation.
    Type: Application
    Filed: March 20, 2009
    Publication date: September 23, 2010
    Applicant: Microsoft Corporation
    Inventors: Moises Goldszmidt, Peter Bodik, Hans Christian Andersen
  • Publication number: 20100241891
    Abstract: The invention teaches using human factors to monitor and manage computer networks. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
    Type: Application
    Filed: March 16, 2010
    Publication date: September 23, 2010
    Inventor: Peter Beasley
  • Publication number: 20100235684
    Abstract: A storage system for controlling a storage device to store data from a host system, the storage system includes a storage controller for controlling to write to or read data from the storage device, a memory for temporally storing data during performing a data relay processing between the host system and the storage device, and a relay device for performing the data relay processing using the memory. The relay device includes a plurality of processing circuits for performing the data relay processing cooperatively and a self-diagnosis controller for controlling each of the processing circuits to start independently a self-diagnosis processing upon completion of the processing by each of the processing circuit.
    Type: Application
    Filed: March 8, 2010
    Publication date: September 16, 2010
    Applicant: Fujitsu Limited
    Inventor: Tomoharu MURO