Abstract: The present invention relates to a device and method for expediting feedback on changes of connection status of monitoring equipments, comprising a CPU, a switch module and at least an optical fiber connector, wherein the CPU contains multiple reserved pins and is connected with the switch module, while the switch module is connected with at least one optical fiber connector, which includes signal detect pins that are used to connect with the switch module. The CPU is connected through one of the reserved pins with the SD pin of the optical fiber connector, and controlled by a system software to read the bit value of the signal address of the SD pin. This allows the system software to analyze and determine if the address value of the signals received by the reserved pin is changed or not, and to take action to respond when the connection status is changed.

Abstract: In a network including at least two transmission paths whose bands are respectively managed, an RTT test of DTCP-IP may fail due to a relay wait time generated by the band management regardless of retrials. An objective of the present invention is to assure success of the RTT test. A master unit device (100) managing bands of the transmission paths includes an RTT test detection section (140) for detecting a failure of the RTT test, and a band management section (150) for modifying a band management (TXOP allocation) schedule based on an RTT test failure detection. With this configuration, a time band during which no TXOP is allocated is provided between the transmission paths whose bands are respectively managed, thereby assuring success of the RTT test.

Abstract: A method and apparatus for accelerating transactional execution. Barriers associated with shared memory lines referenced by memory accesses within a transaction are only invoked/executed the first time the shared memory lines are accessed within a transaction. Hardware support, such as a transaction field/transaction bits, are provided to determine if an access is the first access to a shared memory line during a pendancy of a transaction. Additionally, in an aggressive operational mode version numbers representing versions of elements stored in shared memory lines are not stored and validated upon commitment to save on validation costs. Moreover, even in a cautious mode, that stores version numbers to enable validation, validation costs may not be incurred, if eviction of accessed shared memory lines do not occur during execution of the transaction.

Abstract: A technique for automatically detecting and correcting configuration errors in a computing system. In a learning process, recurring event sequences, including e.g., registry access events, are identified from event logs, and corresponding rules are developed. In a detecting phase, the rules are applied to detected event sequences to identify violations and to recover from failures. Event sequences across multiple hosts can be analyzed. The recurring event sequences are identified efficiently by flattening a hierarchical sequence of the events such as is obtained from the Sequitur algorithm. A trie is generated from the recurring event sequences and edges of nodes of the trie are marked as rule edges or non-rule edges. A rule is formed from a set of nodes connected by rule edges. The rules can be updated as additional event sequences are analyzed. False positive suppression policies include a violation- consistency policy and an expected event disappearance policy.

Abstract: A method, system, and computer usable program product for assessing third-party IP that may be incorporated in a software product are provided in the illustrative embodiments. An instance of the third-party's intellectual property is identified in a component of the product. The instance is classified as actionable, or not actionable. A remediation action is identified for an actionable instance. An entry is created in a remediation report, the entry including information identifying the actionable instance, the remediation action, or a combination thereof. The remediation report is published. A context of the actionable instance may be determined. Based on the context and the actionable instance, a remediation rule may be selected and executed from a set of remediation rules. The output of the remediation rule may be reported as the remediation action in the remediation report. Performing the remediation action may cause manipulation or initiation of a workflow.

Abstract: A computer-implemented method, system and computer program product are presented for managing an Effective-to-Real Address Table (ERAT) and a Translation Lookaside Buffer (TLB) during test verification in a simulated densely threaded Network On a Chip (NOC). The ERAT and TLB are stripped out of the computer simulation before executing a test program. When the test program experiences an inevitable ERAT-miss and/or TLB-miss, an interrupt handler walks a page table until the requisite page for re-populating the ERAT and TLB is located.

Abstract: A method is described and represented for testing a control apparatus with a test device, where the control apparatus has at least one state variable and at least one actual functionality that contains a time dependency, and the control apparatus and the test device are connected to each other via a signal interface. The problem of the present invention is to prevent—at least partially—the disadvantages known from the state of the art, and, particularly, to provide a method for testing a control apparatus, which allows as simple and flexible an acquisition of the target functionality of a control apparatus is possible, and which takes into account the time dependency of the target functionality as comprehensively as possible during the test case generation.

Abstract: A technique is disclosed for distributed runtime diagnostics in hierarchical parallel environments. In one embodiment, a user is allowed to configure, during runtime, a processing element on which to perform diagnostics, an algorithm for the processing element to execute, a data set for the algorithm to execute against, a diagnostic function for the processing element to execute, a condition for executing the diagnostic function, and visualization parameters for memory local to the processing element. As a result, runtime diagnostics can be performed with sufficient degree of control and customization to aid debugging in a hierarchical parallel environment.

Abstract: A data generator for database schema verification, system sizing and functional test of data dependent applications. Allows for generation of data from random values or from working databases which may be profiled to generate patterns for occurrences of values and sizes of values. The data may be filled with a fill rate that dictates the percentage of fields assigned nulls. Cardinality allows for a fixed number of values to occur across the records for a field. May utilize reference data associated with an existing database to fill fields. Qualifiers and multi-value fields may be filled to mimic real data. Maximum, nominal and average number of occurrences of sizes of data and qualifiers and multi-value data may be specified. May also utilize dictionaries to fill. Hierarchical levels and number of child nodes may also be specified and used in filling taxonomy tables and hierarchy tables for example.

Abstract: Since multi-core processors have become the standard architecture for general purpose machines, programmers are required to write software optimized for parallelism. Verification of correctness is an important issue for parallel code because of its complexity. There are still tools missing that provide verification for complex code, such as testing the execution of code provides. Consequently, described herein are systems and methods to evaluate the correctness of program traces. Furthermore, the systems and methods described herein do not demand excessive computational requirements and the size of the program trace being evaluated increases.

Abstract: Sizing an infrastructure configuration optimized for a workload mix includes: a) instructing a virtualized-aware testing service (VATS) test controller to perform a test of an initial infrastructure configuration in a virtualized environment, in which the test provides at least one test result; b) determining whether the at least one test result satisfies a predetermined requirement as identified in the workload mix; c) modifying at least one parameter of the initial infrastructure configuration to create a modified infrastructure configuration in response to the at least one test result failing to satisfy the predetermined requirement; d) instructing the VATS test controller to perform another test on the modified infrastructure configuration to generate another at least one test result; e) repeating steps b)-d) until a final infrastructure configuration that causes the another at least one test result to satisfy the predetermined requirement is identified; and f) outputting the final infrastructure configur

Abstract: A method for influencing a control unit by means of a manipulation unit whereby the control unit has at least one microcontroller, at least one memory having a plurality of memory cells and at least one debug interface, and the debug interface has a monitoring functionality for observing the memory content, and by means of the debug interface a first point in time of the control unit for writing a first value to a first memory cell is detected, and a triggering point in time for a processing routine by the manipulation unit is obtained as the result based on the information transmitted to the manipulation unit by the debug interface at the first point in time, and at a second point in time, a second value is written to the first memory cell by the manipulation unit by means of the processing routine via the debug interface before the first memory cell is read by the control unit at a third point in time.

Abstract: The invention relates to a method and device for monitoring operations of a computer system comprising at least two execution units, wherein switching means are provided and make it is possible to switch at least two operating modes to each other and comparison means are provided, the first operating mode corresponds to the comparison mode and the second operating mode corresponds to the performance mode and the first operation is monitored by the second operation, in the comparison mode said second operation is run on at least two execution units and each second operation which is run on at least two execution units monitors the first operation.

Abstract: A method for measuring consistability of a distributed storage system is disclosed. The method includes determining at least one consistency level that the distributed storage system can provide. A plurality of failure classes can be determined for the distributed storage system. A probability of the distributed storage system to be in each of the plurality of failure classes can be measured. Each failure class can be mapped to the at least one consistency level. The probability of each failure class for each consistency level can be summed to determine an expected portion of time that the distributed storage system provides each consistency level.

Abstract: A method for controlling an operating mechanism using a manipulation unit, in which the operating mechanism includes at least one microcontroller, at least one memory with a plurality of memory cells and at least one first value in a first memory cell and at least one debug interface, and the debug interface exhibits a monitoring functionality for monitoring a program code executed by the operating mechanism and using the debug interface a first pre-set timepoint is detected when processing the program code and, using the information transmitted by the debug interface for the first timepoint to the manipulation unit, a trigger timepoint results for a processing routine through the manipulation unit (IN) and a second value is written using the debug interface by the manipulation unit using the processing routine for a second timepoint in the first memory cell before the first memory cell is read by the operating mechanism for a third timepoint.

Abstract: A method for controlling an operating mechanism using a manipulation unit, in which the operating mechanism includes at least one microcontroller, at least one memory with a plurality of memory cells, and at least one debug interface, and the debug interface presents a monitoring functionality for monitoring memory content and using the debug interface a first timepoint of the operating mechanism is detected for writing into a first memory cell and, using the information transmitted by the debug interface for the first timepoint to the manipulation unit, a trigger timepoint results for a processing routine through the manipulation unit (IN) and using the processing routine a second value is written by the manipulation unit using the debug interface for a second timepoint in the first memory cell before the first memory cell is read by the operating mechanism for a third timepoint.

Abstract: A method for advanced condition monitoring of an asset system includes using a plurality of auto-associative neural networks to determine estimates of actual values sensed by at least one sensor in at least one of the plurality of operating regimes; determining a residual between the estimated sensed values and the actual values sensed by the at least one sensor from each of the plurality of auto-associative neural networks; and combining the residuals by using a fuzzy supervisory model blender; performing a fault diagnostic on the combined residuals; and determining a change of the operation of the asset system by analysis of the combined residuals. An alert is provided if necessary. A smart sensor system includes an on-board processing unit for performing the method of the invention.

Abstract: According to one embodiment of the present disclosure, a method for testing a boot image is disclosed. The method comprises creating a test boot image for a first logical partition, creating a second logical partition wherein the second logical partition is a duplicate of the first logical partition, initiating a boot sequence for the second logical partition using the test boot image, and returning a result of the boot sequence to a requestor.

Abstract: Techniques for generating a reusable script for a multiple user performance test of a network application. A description of a multiple user performance test is generated based upon a group of data describing a functional test and a group of data describing commands of a performance test tool. In one embodiment, a functional test tool generates signals based on the description of a multiple user performance test to simulate to a performance test tool multiple users' interactions with a user interface of the performance test tool to manage a performance test session to test the network application. In another embodiment, the functional test tool generates signals simulating user interactions with a user interface of the network application during the performance test session.

Abstract: Methods and systems are provided to estimate the time to implement a regression test. A productivity table may be defined and stored in a host computer system, where the productivity table indicates the time expected to perform a plurality of automation script types at a plurality of complexity levels. The host computer system may receive a list of test flows to be used in conducting a regression test and a selection of a complexity level for each of the listed test flows. Complexity levels may be defined by, and a complexity level for a test flow may be selected based upon a variety of system- and test-related criteria. The total implementation time may be determined based on the complexity levels assigned to test flows in the regression test, the type of scripts used, and the productivity table.

Abstract: A method performed by a primary server includes receiving integrity criteria and sending a health check request to a secondary server based on the received integrity criteria. The method also includes receiving integrity information from the secondary server and checking the integrity information against the integrity criteria. The method further includes initiating a non-compliance action if the integrity information does not comply with the integrity criteria.

Abstract: The present invention relates to a method, device, and system for managing verification of configurable hardware and software. The solution according to the present invention solves this by applying a matrix-like method of handling test and verification parameter combinations and interacting with a user using a browser like interface for simple and fast selection of coverage.

Abstract: The object of the invention is in particular a method and a device for detecting non-regression of an input/output system from a remote station comprising a test tool adapted for executing a test command of the said input/output system. The said input/output system and remote station are each connected to a communication network. The method comprises transmitting (305), to the said remote station, an instruction to run the said test tool and an instruction to execute the said test command (320), as well as transmitting (315), to a recording device connected to the said communication network, an instruction to record data corresponding to the result of execution of the said command, circulating on the said communication network. After reception, the recorded datum may be analyzed (335) according to a reference datum corresponding to the expected result of execution of the said command.

Abstract: The lifetime of a data structure containing information for processing a client request is manipulated so that the information remains available to a review and/or testing process. After examination, the information may be discarded.

Abstract: Systems and methods are described that analyze complex systems and identify potential performance bottlenecks that may affect capacity and response time. The bottlenecks are identified to resolve problems originating at a specific subsystem(s).

Abstract: The present invention provides a system and method for identifying anomaly in information requests. The information requests are modeled into a plurality of basic elements and association among the basic elements are tracked. The association of one information request is compared with a plurality of bitmap tables and counters representing a baseline information from a historical behavior information. If the association of this information request differs from the baseline information, an alert is issued.

Abstract: A method of validating a probability of detection (POD) testing system using directed design of experiments (DOE) includes recording an input data set of observed hit and miss or analog data for sample components as a function of size of a flaw in the components. The method also includes processing the input data set to generate an output data set having an optimal class width, assigning a case number to the output data set, and generating validation instructions based on the assigned case number. An apparatus includes a host machine for receiving the input data set from the testing system and an algorithm for executing DOE to validate the test system. The algorithm applies DOE to the input data set to determine a data set having an optimal class width, assigns a case number to that data set, and generates validation instructions based on the case number.

Abstract: A method and system for testing a computer system is provided. In one implementation the method and system may include receiving a script footprint that includes dimension-effect values corresponding to the number of times a computer system dimension is affected by the script. Target information may also be received. The target information includes target dimension values corresponding to a desired number of times per time period each dimension should be affected. The method and system may determining the number of times to execute the scripts within the time period so as to minimize the difference between the actual number of times dimensions are affected and the target-dimension value per time period. The method and system may also execute the script on the computer system the determined number of times within the time period.

Abstract: An apparatus for evaluating a change of an existing system to a modified system by using a test system including a subsystem having the same configuration with either of the existing subsystem and the modified system includes: a memory for storing configuration information of the test system and test information; and a processor for executing a process including: activating the test system to execute test on the subsystem, collecting test information from the test system, and storing the test result information while the subsystem has the same configuration as the existing system; confirming the test system has been modified; and activating the test system to execute test on the subsystem, collecting test result information from the test system, and storing the test result information while the subsystem has the same configuration as the modified system.

Abstract: A system and method of input/output (I/O) workload analysis of the components in a storage area network (SAN) is disclosed. In one embodiment, a method for analyzing I/O workloads of components in the SAN includes determining host bus adapter (HBA) to storage port oversubscription ratios and HBA to inter-switch link (ISL) oversubscription ratios in the SAN, selecting a subset of the components for monitoring based on the HBA to storage port oversubscription ratios and the HBA to ISL oversubscription ratios, continuously monitoring the subset of the components and storing I/O statistics of the subset of the components, and forecasting expected I/O workloads of the subset of the components based on current I/O workloads associated with the I/O statistics of the subset of the components and respective I/O workload threshold values of the subset of the components.

Abstract: A processor operation inspection system includes a processor and an operation inspection circuit that inspects an operation of the processor. When a program under execution changes from one predefined state to another state, the processor outputs a state switching signal indicating a transition of its state, a state signal indicating a current state to the inspection circuit. The inspection circuit includes a state register that stores the state of the processor, a combinational logic circuit that calculates, according to the stored state of the processor and the state switching signal, a new state to be taken by the processor, and a comparison circuit that inspects the operation of the processor by comparing the calculated new state to the state of the processor inputted as the state signal.

Abstract: Measurement agents in a network failure detecting system each configure a group together with other measurement agents that receive a service from the same provision server, and form a link to create a tree structure with a predetermined measurement agent in the group at its top. The measurement agent then receives measurement results from the other measurement agents in the group, and narrows down candidates of a failure location based on the received measurement results. The measurement agent transmits the narrowed candidates of the failure location to a surveillance server or one of the other measurement agents. The surveillance server then receives the transmitted candidates of the failure location, and specifies the failure location based on the received candidates of the failure location.

Abstract: A test apparatus for testing a portable communication unit. The test apparatus comprises a test unit adapted to supply test input data to the portable communication unit and retrieve test output data at least from the portable communication unit in accordance with a test schedule. The test apparatus further comprises a wireless interface unit adapted to provide a communication link between the test apparatus and a server located remotely from the test apparatus. The test unit is adapted to retrieve, from the server, at least part of the test input data. Moreover, the test unit is adapted to forward, to the server, at least part of the test output data. A method of testing the portable communication unit is also disclosed.

Abstract: Embodiments of the present invention provide a method and system for designing a test network in an integrated application, and configuring remote network devices through a network design application to test a network design. One embodiment of the present claimed subject matter is provided as a system for automatically configuring remote network devices to simulate a network connection. The system includes a plurality of computing devices which are physically coupled to one or more network devices, wherein the network devices are automatically configured to comprise a test network corresponding to a remote test network topology design.

Abstract: A computer-executed test tool combines testing of an application at a user interface layer and a web services layer. The computer-executed test tool comprises a capture tool that records a web services test concurrently with recording of a user interface test.

Abstract: A processing apparatus includes: first and second register files, the latter holding a part of data in the former; an operation unit to operate on data in the second register file and to output data; an instruction unit to issue a write instruction to write, to both register files, the output data and an error detection code for it, and first and second occurrence instructions; a first control unit to issue a first generation instruction when receiving the write instruction and the first occurrence instructions; and a first generation unit to generate a first simulated fault data to output it to the first register file when receiving the first generation instruction, and to output the output data and the error detection code to the first register file in absence of the first generation instruction. Similar second control and generation units are also provided mutatis mutandis.

Abstract: An error detection control system for a nonvolatile memory comprises: a nonvolatile memory having data areas for a plurality of addresses each including a main data area and a redundant data area for one address; memory control means for controlling on the nonvolatile memory a batch erasing process on a data area group basis, a reading process on the data area basis, a programming process on the data area basis, and an overwriting process on a bit basis; error detecting means for executing the error detecting process based upon the corresponding redundant data; error detecting control means for controlling availability of execution of the error detecting process based upon data types to be classified depending on whether or not the data is subjected to the overwriting process or a storage state indicating whether or not the overwriting process has been executed.

Abstract: Methods and apparatus to perform quality testing in Internet Protocol (IP) Multimedia subsystem (IMS) based communication systems are disclosed. An example IMS-based system comprises a web portal to allow a user to configure quality testing for a user endpoint and to present results of the quality testing, a test server to exchange packets with the user endpoint to perform the testing, an IMS application server to implement a state machine to establish a test session between the test server and a test module of the user endpoint, the packets to be exchanged between the test server and the test module via the session, and a data analyzer to determine one or more parameters representative of performance of the session based on the exchanged packets, and to provide the same to the web portal, the web portal to present information representative of the one or more parameters to the user.

Abstract: A test machine system and a method for operating a test machine system includes using a readily available workflow program to a test procedure created using a graphical user interface to arrange test procedure elements.

Abstract: A test system 100 that can accept a plurality of plug-in electronic cards in Xi Slots 126 or PXI slots 134 is described. The test or source measure switching system 100 includes a sequencer or sequence engine 130 which is fully capable of executing opcode instructions having potentially indefinite completion times and monitoring multiple asynchronous inputs simultaneously without interrupts. The sequencer 130 is sequential and deterministic to approximately ten microsecond resolution.

Abstract: A data processing apparatus allocates a page number in a record to each of a plurality of records of a variable data print job and performs a preflight check every page number. After that, the data processing apparatus extracts the records in which the same kind of (or same) problem has occurred in a page of the same page number from the records included in the variable data print job. The data processing apparatus calculates a ratio of the extracted records to all records having the page of the page number and presumes whether the problem relates to a master object or relates to a variable object according to the ratio. The data processing apparatus displays whether the problem in the page relates to the master object or relates to the variable object every page having the problem.

Abstract: A system LSI comprising: a processor which processes confidential data; a first on-chip bus which is connected to the processor; a working memory which saves the confidential data processed by the processor; and a memory interface circuit which is connected between the first on-chip bus and the working memory, and through which data is transferred between the working memory and the first on-chip bus under control of the processor.

Abstract: This document relates to apparatus and methods to store and retrieve trace information in on-chip system memory of microcontrollers. A microcontroller comprises a microprocessor and a memory device accessible through a data bus and an address bus coupled to the microprocessor. The microcontroller includes on-chip debug logic coupled to the microprocessor. Trace data can be retrieved from system memory using a debug port of the debug logic. A system in accordance with the present invention will lower the cost of implementation of trace features in microcontrollers, and strongly reduce the cost of supporting such features in debug tools.

Abstract: Provided are a system and method for a performance test in an outside channel combination environment.

Abstract: A circuit includes a circuit identification storage module and a control module. The circuit identification storage module stores circuit identification information. The control module receives the circuit identification information and in response thereto selectively performs a secure boot procedure or a test boot procedure. The control circuit performs the secure boot procedure when the circuit identification information indicates that the circuit is a production circuit. The control circuit performs the test boot procedure when the circuit identification information indicates that the circuit is a test circuit. A related method is also disclosed.

Abstract: A system and method to facilitate device monitoring and servicing is provided. In one embodiment, a system may include a medical device having at least one component, and monitoring circuitry configured to measure operational data of the component. The system can also include a data processing system configured to analyze the operational data and to output a report based on such analysis. The analysis, in turn, may include applying a transform to the operational data and comparing one or more actual coefficient and threshold coefficient characteristics.

Abstract: A networked clinical diagnostic analyzer is disclosed with support for monitoring by a remote back office. The disclosed analyzer includes a module to detect in real-time events of interest while allowing the back office to modify the definitions of the events. The module may be networked using virtual private networking into the back office network, which is usually different from the network at the site of the clinical diagnostic analyzer's deployment. The real-time alerts allow both a quick response to actual or expected error conditions and the downloading of logged data that is likely of most interest and relevance.

Abstract: Exemplary embodiments of a method, device and computer-accessible medium for secure access protocol conformance testing on an authentication service entity can be provided. According to one exemplary embodiment, it is possible to determine whether a certificate issued by the authentication service entity to be tested complies with a corresponding specification of a standard. An authentication requester can be simulated to send a certificate authentication request message to the authentication service entity to be tested. A certificate authentication response fed back from the authentication service entity to be tested can be captured. Further, a secure access protocol conformance testing result on the authentication service entity to be tested can be obtained by analyzing the certificate authentication response.

Abstract: Traditionally, in fault diagnosis systems, the user is instructed to investigate symptoms exhaustively until a single fault is identified. A more advanced known system recognises that it may be cost effective to address a fault that has been determined as being likely but not certain to exist; in preference to further examination of the symptoms. However this technique has been found not to work well when a symptom is known to be only sometimes associated with a fault. The invention addresses this problem by 1) deriving a first value, for each fault, of probable benefit of acting on that fault and for identifying the fault for which that value is greatest, 2) deriving a second value, for each symptom, of probable benefit of an investigation into that symptom and for identifying the symptom for which that second value is greatest, and 3) comparing the greatest first value with the greatest second value thereby determining when to switch from investigating symptoms to acting upon a fault.

Abstract: A storage management apparatus that performs a read/write check on each of a plurality of data-storing areas of a storage device, and is formed by a storage node that performs reading/writing of the data in the storage device. A computer determines whether or not the data exits, by referring to a flag provided in each data-storing area. The computer performs only an operation of writing the data into the data-storing area in which the data does not exist, and perform operations of reading and writing the data from and into the data-storing area in which the data exists.