Monitoring (epo) Patents (Class 714/E11.179)
  • Publication number: 20100313047
    Abstract: An architecture verifying apparatus includes an input unit receiving a time limit of a semiconductor integrated circuit including modules and buses, and performance specifications of the modules, a bus monitor acquiring bus transactions issued to the buses by the modules, a module monitor acquiring input transactions used when the module inputs data, processing information indicating processing contents and processing time used when the module processes the data, and output transactions used when the module outputs the processed data, a first architecture generator associating the processing information with the bus transaction, the input transaction, the processing information, and the output transaction, to generate a first architecture fulfilling the time limit, a second architecture generator changing the processing time of the first architecture, to generate a second architecture fulfilling the time limit and having power consumption lower than power consumption of the first architecture, and an output u
    Type: Application
    Filed: March 23, 2010
    Publication date: December 9, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Atsushi KAGESHIMA
  • Publication number: 20100313064
    Abstract: A status of connectivity between servers of different sites (locations) is used to infer whether a network or a server failure has occurred such that data between the servers can be routed more efficiently reducing unnecessary network traffic due to duplicate messages. Servers may be grouped based on location or other characteristics and connectivity status determined based on the communication status of individual servers and their respective groups.
    Type: Application
    Filed: June 8, 2009
    Publication date: December 9, 2010
    Applicant: Microsoft Corporation
    Inventors: Victor Boctor, Todd Luttinen
  • Patent number: 7844781
    Abstract: An operating system kernel includes an attach mechanism and a detach mechanism. In addition, processes are tagged with an access attribute identifying the process as either a client process or a server process. Based on the access attribute, the operating system kernel lays out the process local address space differently depending on whether the process is a client process or a server process. A server process can “attach” to a client process and reference all of the client process' local storage as though it were its own. The server process continues to reference its own process local storage, but in addition, it can reference the other storage, using the client process' local addresses. When access to the other storage is no longer needed, the server process can “detach” from the client process. Once detached, the other storage can no longer be referenced.
    Type: Grant
    Filed: February 23, 2006
    Date of Patent: November 30, 2010
    Assignee: International Business Machines Corporation
    Inventors: Michael J. Corrigan, Paul LuVerne Godtland, Richard Karl Kirkman, Wade Byron Ouren, George David Timms, Jr.
  • Publication number: 20100293417
    Abstract: The invention relates to an invention for the central monitoring of the operation of automated banking machines (ATM). The operating signals from actuators (31) and sensors (32) of an automated banking machine (ATM) are used to assemble operating characteristics of the actuators (31) and sensors (32) into data records from operating signal patterns (by time segments. These data records are transmitted from the automated banking machine (ATM) to a central monitoring device (20) in which the operating signal patterns are compared with operating signal patterns from corresponding earlier time segments. A trend toward a change in operating characteristics can be ascertained for the respective actuator (31) or sensor (32), which trend can be used for early replacement of said actuator or sensor.
    Type: Application
    Filed: October 22, 2009
    Publication date: November 18, 2010
    Applicant: WINCOR NIXDORF INTERNATIONAL GMBH
    Inventor: Robert KAMUF
  • Publication number: 20100287405
    Abstract: Methods and apparatuses are disclosed for seamlessly combining an access ring aggregation network, e.g., a G.8032 network, and a core network, e.g., a Multi-Protocol Label Switching (MPLS) network. A link status is monitored between an interworking node and at least one peer node in a first network at an interface between the first network and a second network. Connectivity is maintained between the interworking node and the other interworking node(s) via the second network. Communications between the first and second networks are supported via at least one of the interworking nodes. Ring communications are supported among the interworking node, the other interworking node(s), and the peer node(s). End-to-end integration of two disparate networks according to presently disclosed techniques provides network designers and customers with flexibility in designing, operating, and maintaining networks.
    Type: Application
    Filed: May 8, 2009
    Publication date: November 11, 2010
    Applicant: Tellabs Operations, Inc.
    Inventor: Yee Ming Soon
  • Publication number: 20100281298
    Abstract: The invention relates to a monitoring device for a processor comprising a means for monitoring the power consumption of the processor and a means for analysing the power consumption to detect abnormal operation of the processor.
    Type: Application
    Filed: May 9, 2008
    Publication date: November 4, 2010
    Inventors: Michael Joseph Pont, Kam Leung Chan
  • Publication number: 20100280858
    Abstract: A system and method for monitoring network traffic utilizing a small form pluggable (SFP). The SFP is activated in a customer premise equipment (CPE) device in response to a user inserting the SFP in the CPE device. A determination is made whether a service provider is authorized to access the SFP. Monitoring is implemented for the service provider in response to the determining.
    Type: Application
    Filed: April 30, 2009
    Publication date: November 4, 2010
    Inventor: Michael K. Bugenhagen
  • Publication number: 20100275262
    Abstract: Autonomous diagnosis and mitigation of network anomalies may include creating a plurality of sketch matrices wherein each sketch matrix corresponds to an individual hashing function and each row in each sketch matrix corresponds to an array of hashed parameters of interest from multiple network devices for a given period of time, the parameters of interest being configurable by an administrator. A principal components analysis (PCA) input matrix is created for each of the sketch matrices by computing an entropy value for each element in the sketch matrices, and principal components analysis (PCA) is performed on each of the PCA input matrices to heuristically detect a network anomaly in real time.
    Type: Application
    Filed: April 22, 2010
    Publication date: October 28, 2010
    Applicant: Hewlett Packard Development Company LP
    Inventors: Eswaran Anand, Koundinya Chivukula
  • Publication number: 20100262795
    Abstract: A method according to one embodiment includes gathering monitor data information from a plurality of memory devices having finite endurance and/or retention, the monitor data being data of known content stored in dedicated memory cells of known write cycle count; analyzing the monitor data information; and taking an action relating to at least one of the devices based on the analyzing. Additional systems, methods, and computer program products are also disclosed.
    Type: Application
    Filed: April 8, 2009
    Publication date: October 14, 2010
    Inventors: Steven Robert Hetzler, William John Kabelac
  • Publication number: 20100262766
    Abstract: A method of formatting a data storage device that includes a plurality of flash memory chips includes monitoring a failure rate of memory blocks of one or more flash memory chips of a storage device that has a first usable size for user space applications, estimating a future usable size of the data storage device based on the monitored failure rate, and defining, via a host coupled to the data storage device, a second usable size of the data storage device for user space applications based on the monitored failure rate.
    Type: Application
    Filed: April 7, 2010
    Publication date: October 14, 2010
    Applicant: GOOGLE INC.
    Inventors: Robert Stevan Sprinkle, Albert T. Borchers, Andrew Timothy Swing
  • Publication number: 20100257413
    Abstract: A client-side application receives an initial page from an application server that includes initial content and provides the initial page to a user. Next, the client-side application receives user input corresponding to the initial page and updates a portion of the initial content, which results in updated content and unmodified initial content. Subsequently, the client-side application formats the updated content and adds markup tags that describe the updated content. The client-side application then sends the updated content and the markup tags to a verification server. As a result, the client-side application receives a verification report from the verification server that corresponds to the updated content and the markup tags. The client-side application determines whether the verification report includes a verification error and, if so, the client-side application provides the verification error to the user.
    Type: Application
    Filed: April 3, 2009
    Publication date: October 7, 2010
    Applicant: International Business Machines Corporation
    Inventors: Thomas A. Brunet, Allen K. Wilson, Shunguo Yan
  • Publication number: 20100257408
    Abstract: A computing system is provided and includes first computing resources representing a fraction of total computing resources, second computing resources representing at least a partial remainder of the total computing resources except for the first computing resources, and a memory unit. The memory unit includes a computer-readable medium having computer-readable executable instructions stored thereon that are accessible to at least the second computing resources. When executed, the executable instructions cause the second computing resources to monitor a process running on the first computing resources in accordance with pre-selected parameters, to determine that a potential lock or wait situation that impedes the process is in effect from a result of the monitoring and to execute an action in response to the potential lock or wait situation.
    Type: Application
    Filed: April 2, 2009
    Publication date: October 7, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Christian Bartels, Eric Kass
  • Publication number: 20100241907
    Abstract: A network monitor and control apparatus for controlling the monitoring of a network are provided. The network monitor includes an error monitor including an error information gatherer for gathering error information of a monitor target apparatus; and a monitor result notifier for notifying of monitor results, wherein if there are N types of monitor target functions, the error monitor includes N error information gatherers for the respective N types of monitor target functions (N=1, 2, 3, . . . ) and wherein each of the N error information gatherers gathers the error information from one of an existing monitor target apparatus and a newly added monitor target apparatus on a per monitor target function basis.
    Type: Application
    Filed: March 5, 2010
    Publication date: September 23, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Hiroshi Nakamura, Hideki Matsuda, Fumiaki Akazawa, Makoto Shiraga
  • Patent number: 7801801
    Abstract: A method and system for providing automatic execution of black box trading strategies for electronic trading. A black box trading entity is created from two or more real or synthetic trading entities including real or synthetic contracts or financial instruments. The black box trading entity is automatically traded via one or more electronic trading exchanges.
    Type: Grant
    Filed: May 4, 2006
    Date of Patent: September 21, 2010
    Assignee: Rosenthal Collins Group, LLC
    Inventors: Leslie Rosenthal, J. Robert Collins
  • Publication number: 20100229047
    Abstract: A method for displaying a state of a copy pair which is a pair of logical volumes belonging to one or a plurality of storage sub systems connected to a task server, including: monitoring periodically, by a backup management program on the task sever, an operation condition of an application on the task server; notifying, by the backup management program, a maintenance to a control program on the storage sub system, if the application is on a stop condition at some time; setting, by the control program which receives the notification, “on-maintenance” to an action mode on the storage sub system; after a maintenance by a user and at time of a restart of the application, checking, by the backup management program, the operation condition of the application and notifying a release of the maintenance to the control program; and setting, by the control program which receives the notification of the release, the action mode of the storage sub system to a normal condition.
    Type: Application
    Filed: May 24, 2010
    Publication date: September 9, 2010
    Inventor: Shogo MIKAMI
  • Publication number: 20100229048
    Abstract: The operation of a powered device is monitored to detect a failure condition, the powered device connected to power sourcing equipment by a communications channel including inline power delivery from the power sourcing equipment to the powered device. Diagnostic information is captured including (i) configuration and status information identifying the power sourcing equipment, the communications channel, and status of the inline power delivery at the time of detection of the failure condition, and (ii) failure information identifying the failure condition. This diagnostic information is stored as diagnostic information signals in an electronic memory which is electronically accessible by an external user as part of a failure analysis process. By this process, diagnostic information pertaining to the operation of the powered device with the power sourcing equipment and the communications channel is captured and stored, providing greater information for more thorough failure analysis.
    Type: Application
    Filed: March 6, 2009
    Publication date: September 9, 2010
    Applicant: Cisco Technology, Inc.
    Inventor: Roger Karam
  • Publication number: 20100229045
    Abstract: A computer method and system processes and handles hypertext-type links by converting client device-independent URLs to respective device-dependent URLs. This enables invocation of device-specific applications through a generic HTTP link. The HTTP link may be embedded in an email, SMS, web-page or similar communication documents or files.
    Type: Application
    Filed: March 9, 2010
    Publication date: September 9, 2010
    Applicant: Quantia Communications, Inc.
    Inventors: Eric Vaughn Schultz, Nicholas Mathias Werthessen
  • Publication number: 20100229041
    Abstract: The present invention relates to a device and method for expediting feedback on changes of connection status of monitoring equipments, comprising a CPU, a switch module and at least an optical fiber connector, wherein the CPU contains multiple reserved pins and is connected with the switch module, while the switch module is connected with at least one optical fiber connector, which includes signal detect pins that are used to connect with the switch module. The CPU is connected through one of the reserved pins with the SD pin of the optical fiber connector, and controlled by a system software to read the bit value of the signal address of the SD pin. This allows the system software to analyze and determine if the address value of the signals received by the reserved pin is changed or not, and to take action to respond when the connection status is changed.
    Type: Application
    Filed: March 6, 2009
    Publication date: September 9, 2010
    Applicant: MOXA INC.
    Inventors: Yen-Ting Chen, Chek-Yee Chan
  • Publication number: 20100223497
    Abstract: A method and apparatus including a monitoring and correction module that monitors process metrics to identify a steady-state for a process, detects a deviation from the steady-state for the process, and executes a corrective measure automatically to reduce an impact of the process in response to the deviation by a monitoring and correction module. The monitoring and correction module also analyzes the deviation to determine whether the deviation is negatively impact in performance for other processes.
    Type: Application
    Filed: February 27, 2009
    Publication date: September 2, 2010
    Applicant: Red Hat, Inc.
    Inventor: James Paul Schneider
  • Publication number: 20100218030
    Abstract: A system, method, and article of manufacture are disclosed for monitoring and resolving problems detected in the application stack. The application stack may include multiple, interpedently application components which collectively provide a unified service. An interactive problem resolution program may monitor and assist users in troubleshooting an application stack installed on a separate computer system. Generally, when a problem in the application stack is detected, the IPR Program may alert users to the problem and provide information about the problem to guide users in taking steps to correct the problem.
    Type: Application
    Filed: February 20, 2009
    Publication date: August 26, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: RADHIKA BHATNAGAR, BARNABY L. COURT, MICHAEL P. ETGEN, ANJAN R. KUNDAVARAM, ELIZABETH A. SCHREIBER, DAVID B. STYLES
  • Publication number: 20100211817
    Abstract: Systems and methods for managing problems that are determined to be chronic problems with network devices or circuits are disclosed. The systems and methods receive data indicating a problem with a network device or circuit and determine based on the data a first action to be performed on the network device or circuit. Upon determining that a recurring problem exists for the network device or circuit, a rule set is used to determine if the data indicates a chronic problem. Upon determining that a chronic problem exists for the network device or circuit, the rule set is used to determine a monitoring period for the network device or circuit. Further, within the monitoring period a performance indicator that indicates that the network equipment or circuit is performing acceptably or unacceptably is used to determine further actions for the network device or circuit.
    Type: Application
    Filed: February 18, 2009
    Publication date: August 19, 2010
    Inventors: Chen-Yui Yang, Paritosh Bajpay, Monowar Hossain
  • Publication number: 20100198771
    Abstract: A method for determining relative likelihood of a failure mode is provided. The method comprises receiving evidence observations of a monitored system from monitors connected in a many-to-many relationship to the failure modes, generating a fault condition including states of all failure modes that are connected to the monitors, and computing a relative probability of failure for each failure mode. The fault condition is generated for a reference model of the monitored system and is based on the received evidence observations. The relative probability of failure for each failure mode is based on a false alarm probability, a detection probability, and a ratio of prior probabilities of a candidate hypothesis to a null hypothesis of no active failure mode.
    Type: Application
    Filed: February 5, 2009
    Publication date: August 5, 2010
    Applicant: HONEYWELL INTERNATIONAL INC.
    Inventors: Asif Khalak, C. Arthur Dins, Bradley John Barton, David Michael Kolbet, Qingqiu Ginger Shao, Randy Magnuson
  • Publication number: 20100199121
    Abstract: A multiprocessor computer system comprises one or more watchdog timers operable to detect failure of a memory operation based on passage of a certain timing period from a memory operation being issued without a valid response. An error handler is operable to take corrective action regarding the failed memory operation, such as to provide at least one of hardware state management and application state management.
    Type: Application
    Filed: January 28, 2010
    Publication date: August 5, 2010
    Applicant: Cray Inc
    Inventors: Dennis C. Abts, Steven L. Scott, Aaron F. Godfrey
  • Publication number: 20100199131
    Abstract: A storage system includes a storage device for storing data, a pair of adapters connected with the storage device, each of the adapters transmitting and receiving the data to and from the storage device respectively. The storage system includes a controller, connected with the adapters, for collecting performance information indicating performance of each of the adapters, comparing the collected performance information of the adapters with each other, and detecting a suspected adapter that is suspected of having a performance failure on the basis of a result of the comparison.
    Type: Application
    Filed: January 22, 2010
    Publication date: August 5, 2010
    Applicant: Fujitsu Limited
    Inventor: Masahiro Yoshida
  • Publication number: 20100192022
    Abstract: A model-match-rate evaluating unit of a transaction monitoring device, which monitors a transaction system, evaluates a ratio of the number of transactions that match any models and respective processing times of all layers in the transaction are each within a corresponding normal range to the number of transactions observed per unit time as a model match rate. When the model-match-rate evaluating unit detects an abnormality of the system based on the model match rate, a suspicious-point-in-suspicious-model extracting unit of a transaction detail analyzing device extracts a point where a processing time deviates from the normal range as a suspicious point, a problematical-point evaluating unit evaluates a problem of each suspicious point as a problematical point, and a detail-analysis-result display unit displays an evaluation result of the problematical point and the suspicious point.
    Type: Application
    Filed: January 19, 2010
    Publication date: July 29, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Yukiko Seki, Motoyuki Kawaba
  • Publication number: 20100185903
    Abstract: Avoiding failure repetition in data processing includes storing a sequence of circumstances leading up to a previous failure, monitoring circumstances in a current process, matching a sequence of circumstances in the current process to a stored sequence of circumstances, and applying rules to determine if the current process should proceed.
    Type: Application
    Filed: January 22, 2010
    Publication date: July 22, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Julian Charles Horn, Roger Gordon Lewis, Alan Clive Robinson, Andrew Wright
  • Publication number: 20100185896
    Abstract: The invention, in an embodiment, allows the control of several hardware ports via two redundant I2C paths. Switching between the two I2C paths is achieved by using a redundant control device, which performs the switch by tracking if incoming data transfers were completed with I2C stop condition.
    Type: Application
    Filed: January 22, 2009
    Publication date: July 22, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael Andres, Giovanni Cautillo, Thomas Hess, Markus Strasser
  • Publication number: 20100180162
    Abstract: A method for automatically detecting and correcting one or more hang conditions within one or more of a master device and target device of a serial bus interface when one or more signals are held in an invalid state. A hang timer monitors one or more operations of the serial bus when the serial bus is participating in a serial bus transfer. If the transfer does not end before the bus timeout value has been exceeded, the hang timer will issue a reset to the state machine forcing the state machine back to an idle state. The hang timer will also disable the serial bus drivers of the state machine, whereby the hang condition is corrected.
    Type: Application
    Filed: January 15, 2009
    Publication date: July 15, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Bryan N. Cardwell, Michael L. Harper, Craig A. Klein, Gregg S. Lucas, Mary Anne J. Marquez, Robert E. Medlin
  • Publication number: 20100180150
    Abstract: Systems and methods are disclosed herein, including those that operate to monitor a first set of operational parameters associated with a memory vault, to adjust a second set of operational parameters associated with the memory vault, and to perform alerting and reporting operations to a host device.
    Type: Application
    Filed: January 12, 2009
    Publication date: July 15, 2010
    Inventor: Joe M. Jeddeloh
  • Publication number: 20100180161
    Abstract: A computer-implemented method, system and computer program product for managing failover of Management Modules (MMs) in a blade chassis are presented. Each server blade in the blade chassis evaluates a performance of a primary MM. If a threshold number of server blades determine that the primary MM is not meeting pre-determined minimum performance standards, then a secondary MM impeaches the primary MM and takes over the management of the server blades.
    Type: Application
    Filed: January 9, 2009
    Publication date: July 15, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Eric Richard KERN, William Gabriel PAGAN
  • Publication number: 20100174947
    Abstract: A computer implemented method for a computer including a processor having a software stack accessed by multiple application programs includes receiving software requests from the multiple applications at the software stack; monitoring the rate of stack failures at the stack via a stack monitor; comparing the rate of stack failures with a time related threshold; and generating an alarm when the rate of stack failures exceeds the time related threshold.
    Type: Application
    Filed: January 8, 2009
    Publication date: July 8, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: James M. Caffrey, Karla K. Arndt, Aspen L. Payton, Keyur Patel, Robert L. Snyder
  • Publication number: 20100156622
    Abstract: A system and method of handling poll-based alarms. The method begins by detecting a high-priority problem in a network. Next, network elements in the network related to the high-priority problem are mapped. The mapping step includes grouping network elements into focus groups wherein each focus group includes network elements having the same alarm. The mapped network elements are then polled for alarms. The polled alarms of the network elements are then correlated and processed.
    Type: Application
    Filed: December 23, 2008
    Publication date: June 24, 2010
    Inventors: Andras Veres, Szabolcs Malomsoky, Gergely Szabo, Tamas Borsos, Peter Benko, Peter Vaderna, Ferenc Kubinszky
  • Publication number: 20100162051
    Abstract: An integration agent device and its fault management method for a node including multi-layered devices are disclosed to effectively control a node including two or more communication devices of different layers and integrally processing relevant fault information. The integration agent device includes: one or more control and management modules controlling and managing one or more communications network devices by layer; and an inter-layer interworking processing module integrating and processing information of the communications network devices by using inter-layer interworking information, and notifying a management system accordingly, wherein the information of the communications network devices is transmitted through the one or more control and management.
    Type: Application
    Filed: August 19, 2009
    Publication date: June 24, 2010
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Seung Hyun YOON, You Hyeon JEONG, Hyung Seok CHUNG
  • Publication number: 20100153769
    Abstract: A system and method for performing enhanced modeling of multi-tiered architectures is presented. The system and method enable selection of a preferred design for a multi-tiered architecture of components based on a set of established criteria, and may employ certain vectors and functions in component attributes, and such attributes may include scalability and scope of fault attributes.
    Type: Application
    Filed: February 24, 2010
    Publication date: June 17, 2010
    Inventors: Jose Renato Santos, Gopalakrishnan Janakiraman, Yoshio Tumer
  • Publication number: 20100146342
    Abstract: A method for fault management. The method includes generating, in firmware of a computer system, a physical resource inventory (PRI) of a plurality of hardware components of the computer system, wherein the PRI defines a hierarchy of the hardware components. The method further includes traversing, by an enumerator executing in a fault manager, the PRI to generate a topology of the plurality of hardware components. The topology is used for fault management of the computer system.
    Type: Application
    Filed: December 5, 2008
    Publication date: June 10, 2010
    Applicant: SUN MICROSYSTEMS, INC.
    Inventors: Scott W. Davenport, Tarik Pertev Soydan, Louis Yonlo Tsien
  • Publication number: 20100146329
    Abstract: Memory devices and methods adapted to process and generate analog data signals representative of data values of two or more bits of information facilitate increases in data transfer rates relative to devices processing and generating only binary data signals indicative of individual bits. Programming of such memory devices includes programming to a target threshold voltage range representative of the desired bit pattern. Reading such memory devices includes generating an analog data signal indicative of a threshold voltage of a target memory cell. Warning of cell deterioration can be performed using reference cells programmed in accordance with a known pattern such as to approximate deterioration of non-volatile memory cells of the device.
    Type: Application
    Filed: February 16, 2010
    Publication date: June 10, 2010
    Inventors: Vishal Sarin, Jung-Sheng Hoei, Frankie F. Roohparvar
  • Publication number: 20100138700
    Abstract: A method of performing a service which remotely monitors a Web site includes the steps of monitoring the site for an error and notifying a site representative in the event an error is detected on the site. Advance permission is not obtained prior to sending the notification and a fee is not charged for the service. The appropriate e-mail address to which the notification is sent is identified based on one or more categories and a priority assigned to all e-mail addresses identified on the monitored site. The notification may be sent, alternatively, to the representative of a site linked to the site monitored or to some other interested third party. Subscribers to the monitoring service may be enrolled automatically upon submission of their site to a search engine service or to a domain name registry. The list of service recipients generated by the monitoring service is usable for other commercial purposes.
    Type: Application
    Filed: December 21, 2009
    Publication date: June 3, 2010
    Inventors: Mark F. McLellan, Michael P. Dover
  • Publication number: 20100138687
    Abstract: Slices obtained by dividing the real data storage area of the storage device by segments are assigned to each of a plurality of segments obtained by dividing a virtual logical volume as a primary slice storing data of the segment as a destination of access made by an access node and/or a secondary slice that mirrors and stores data of the primary slice. Management information associates the segment with the primary slice and the secondary slice. A survival signal transmitted at predetermined intervals while a computer is normally operating is monitored. The computer from which the survival signal is not detected over a predetermined time period is detected as a failure node. The failure node is checked against the management information, the managed slice is set as a single primary slice that is an access destination of the access node for which the mirroring is stopped. The failure node is isolated.
    Type: Application
    Filed: September 29, 2009
    Publication date: June 3, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Yasuo NOGUCHI, Shunsuke Takagi
  • Publication number: 20100131800
    Abstract: A diagnostic device which detects a fault and estimates its cause on the basis of the degree of variation of each attribute of data containing a plurality of attributes obtained by measuring a diagnosis subject. A diagnosis subject variation degree pattern generation means (110) calculates the degree of variation of each attribute of the diagnosis subject data containing the attributes obtained by measuring the diagnosis subject and generates a diagnosis subject variation degree pattern which is a combination of the degrees of variation of the attributes. A reference variation degree pattern storage device (150) stores a reference variation degree pattern composed of the degrees of variation of the attributes in association with the type of the fault and the diagnosis event of the type of the cause.
    Type: Application
    Filed: March 21, 2008
    Publication date: May 27, 2010
    Applicant: NEC CORPORATION
    Inventors: Ryohei Fujimaki, Takayuki Nakata, Akinori Satou, Hidenori Tsukahara
  • Publication number: 20100131805
    Abstract: A storage controller of the present invention detects error with relative ease when reading out data from a storage apparatus. An address data appending device appends address data to each of logical blocks with respect to the data received from a host. A device communication control device determines a divisional position in every data with a size of a predetermined number of blocks, counterchanges the data in anterior and posterior parts around the divisional position, and stores the data in the storage apparatus. When reading the data from the storage apparatus, an address data checking device determines whether or not the value of the address data appended to the block read out and an expected value of the address data calculated based on the divisional position match with each other. If the both values match with each other, the data is sent to the cache memory. If the both values fail to match each other, an error is detected.
    Type: Application
    Filed: January 30, 2009
    Publication date: May 27, 2010
    Inventor: Eiju Katsuragi
  • Publication number: 20100100770
    Abstract: A breakpoint packet is dispatched to a Network On A Chip (NOC). The breakpoint packet instructs one or more specified nodes on the NOC to place the specified nodes, or a core or hardware thread within a specified node, to execute in “single step” mode, in order to enable a debugging of a work packet that is dispatched to the specific node.
    Type: Application
    Filed: October 22, 2008
    Publication date: April 22, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: ERIC O. MEJDRICH, PAUL E. SCHARDT, ROBERT A. SHEARER, MATTHEW R. TUBBS
  • Publication number: 20100083032
    Abstract: In one embodiment a computing system comprises one or more processors, a display device coupled to the computing system, and a memory module communicatively connected to the one or more processors. The memory module comprises logic to receive, in a connection server, a service request from a user via a remote connection client; in response to the service request, instantiate a remote computing protocol in a computing resource, monitor a connection state between the remote connection client and the computing resource; and in response to a change in the connection state between the remote connection client and the computing resource, generate a connection state message, and transfer the connection state message to the remote connection client.
    Type: Application
    Filed: September 30, 2008
    Publication date: April 1, 2010
    Inventors: Byron A. Alcorn, Jeffray Joel Walls
  • Publication number: 20100083387
    Abstract: A security processor integrated within a system may be securely shut down. The security processor may receive shut down requests, and may determine components and/or subsystems that need be shut down during shut down periods. The security processor may determine when each of the relevant components is ready for shut down. Once the relevant components are shut down, the security processor may itself be shut down, wherein the shut down of the security processor may be performed by stopping the clocking of the security processor. A security error monitor may monitor the system during shut down periods, and the security processor may be powered back on when security breaches and/or threats may be detected via the security error monitor. The security error monitor may be enabled to power on the security processor by reactivating the security processor clock, and the security processor may then power on the system.
    Type: Application
    Filed: October 9, 2008
    Publication date: April 1, 2010
    Inventors: Stephane Rodgers, Iue-Shuenn Chen
  • Publication number: 20100083055
    Abstract: A technique includes sampling at least one performance metric of a computer-based service to form time samples of the metric(s) and detecting an occurrence of an anomaly or a performance mode change in the service. The detection includes arranging the time samples in segments based on a statistical analysis of the time samples.
    Type: Application
    Filed: October 1, 2008
    Publication date: April 1, 2010
    Inventor: Mehmet Kivanc Ozonat
  • Publication number: 20100070805
    Abstract: The invention includes a method and apparatus for validating system properties exhibited in execution traces. In one embodiment, a method for testing a system under test (SUT) includes determining a system testing result for the SUT using at least one structured term generated by monitoring an execution trace of the SUT using at least one parameterized pattern. A test procedure is executed for the SUT. The test procedure has at least one parameterized pattern associated therewith. An execution trace generated during execution of the test procedure is parsed, where the execution trace includes unstructured information and the execution trace is parsed using the at least one parameterized pattern to identify at least one matching pattern. A system testing result for the SUT is determined using at least one structured term that is generated using the at least one matching pattern. In this manner, behavior of the system under test during the test procedure may be validated.
    Type: Application
    Filed: September 18, 2008
    Publication date: March 18, 2010
    Inventors: Fangzhe Chang, Yangsong Ren, Thomas L. Wood
  • Publication number: 20100070804
    Abstract: The inventive method for controlling a program execution integrity by verifying execution trace prints consists in updating the representative print of an execution path and/or data applied for a program execution, comparing the actual print value (dynamically calculated to an expected value (statistically fixed, equal to a value of the print if the program execution is not disturbed) at a determined program spots and in carrying out a particular processing by the program when the actual print differs from the expected value.
    Type: Application
    Filed: December 16, 2004
    Publication date: March 18, 2010
    Inventors: Dominique Bolignano, Xavier Leroy, Renaud Marlet
  • Publication number: 20100064170
    Abstract: Some embodiments of the present invention provide a system that prolongs a remaining useful life of a power supply in a computer system. First, performance parameters of the power supply are monitored. Next, the remaining useful life of the power supply is predicted based on the monitored performance parameters. Then, an operational regime of the power supply is adjusted based on the predicted remaining useful life to prolong the remaining useful life.
    Type: Application
    Filed: September 5, 2008
    Publication date: March 11, 2010
    Applicant: SUN MICROSYSTEMS, INC.
    Inventors: Kenny C. Gross, Aleksey M. Urmanov, Anton A. Bougaev
  • Publication number: 20100050024
    Abstract: In one embodiment, a method for sensing an output fault condition is disclosed. The method includes monitoring an error signal that indicates an output fault condition, and monitoring an input signal having a duration. An error flag is set if a fast switching mode is detected and if the error signal is asserted within a specified time interval during the input signal duration.
    Type: Application
    Filed: August 19, 2008
    Publication date: February 25, 2010
    Inventors: Andrei Covalenco, Bogdan Bumbacea
  • Publication number: 20100023811
    Abstract: A translated address and an untranslated address associated with a same processor operation are received. An address-type indicator is provided whose value is indicative of whether the translated or untranslated address is to be used for creating a debug message. The value of the address-type indicator is selectively modified in response to occurrence of one or more selected debug events. Based at least in part on the value of the address-type indicator, the translated or untranslated address is selected. The address-type indicator may be selectively overridden to select the translated or untranslated address as the selected address based on whether a process identifier is at least one of a set of process identifiers or whether at least one of the translated or untranslated address falls within one or more predetermined address ranges. A debug message is created using at least a portion of the selected address.
    Type: Application
    Filed: July 25, 2008
    Publication date: January 28, 2010
    Inventor: William C. Moyer
  • Publication number: 20100023812
    Abstract: In a data processing system, an address associated with a processing operation is received. A modified address is generated which includes a characteristic indicator within the address at a first predetermined bit position when the characteristic indicator is of a first type or at a second predetermined bit position when the characteristic indicator is of a second type. A first value of the characteristic indicator indicates a characteristic of the address. A modified address may also be generated which includes a characteristic indicator at a first predetermined bit position when a position indicator has a first value or at a second predetermined bit position when the position indicator has a second value. Address information can then be generated from the modified address, and a debug message can be created which includes the address information.
    Type: Application
    Filed: July 25, 2008
    Publication date: January 28, 2010
    Inventor: William C. Moyer