Abstract: The invention relates to a method for fine-tuning a software application that is written in a source programming language and is executable on a target platform.

Abstract: Systems, methods, and other embodiments associated with executable templates are described. One example method includes generating an executable template from a set of template data. When an executable template is executed, the executable template creates one or more instantiated entities. These instantiated entities may then be combined with entities created from portions of the original template that were not compilable into the executable format.

Abstract: A virtual architecture and instruction set support explicit parallel-thread computing. The virtual architecture defines a virtual processor that supports concurrent execution of multiple virtual threads with multiple levels of data sharing and coordination (e.g., synchronization) between different virtual threads, as well as a virtual execution driver that controls the virtual processor. A virtual instruction set architecture for the virtual processor is used to define behavior of a virtual thread and includes instructions related to parallel thread behavior, e.g., data sharing and synchronization. Using the virtual platform, programmers can develop application programs in which virtual threads execute concurrently to process data; virtual translators and drivers adapt the application code to particular hardware on which it is to execute, transparently to the programmer.

Abstract: The inventive method for controlling access to data which is used by reference in a program execution system (including processes and aims) during the program execution consists in memorising by the system the totality of references obtainable by said program with the aid of means considered legal, before any operation which can be prohibited if it relates to values which are not legal references, in verifying by the system whether said values are amongst the legal references memorized for the program and in accepting or rejecting the operation, respectively.

Abstract: The present invention provides a method and system for optimization of an intermediate representation in a graphical modeling environment. A first intermediate representation is provided. At least one optimization technique is applied to the first intermediate representation. A second intermediate representation is generated responsive to the application of the at least one optimization technique to the first intermediate representation.

Abstract: A method to provide effective control and data flow information in an Intermediate Representation (IR) form. A Path Sensitive single Assignment (PSA) IR form with effective and explicit control and data path information supports control flow sensitive optimizations such as path sensitive symbolic substitution, array privatization and speculative multi threading. In the definition of PSA form, besides defining new versioned variables, the gamma functions keep control path information. The gamma function in PSA form keeps the basic attribute of SSA IR form and only one definition exists for each use. Therefore, all existing Single Static Assignment (SSA) IR form based analysis can be applied in PSA form. The gamma function in PSA form keeps all essential control flow information and eliminates unnecessary predicates at the same time.

Abstract: Various technologies and techniques are disclosed for automatically generating native images for a virtual machine environment. A virtual machine environment is provided where application libraries are distributed in an intermediate language format and then compiled at a later point in time. An automatic native generation service is provided that monitors the application libraries and generates a native image for a particular one or more of the application libraries when the service determines that native generation is appropriate. Invalid native images are automatically detected and re-generated. If a load attempt for a particular native image is unsuccessful, then the native image is determined to be invalid. The particular native image is then re-generated automatically.

Abstract: A method is provided for translating sets of constraint declarations to imperative code sequences based on defining an instantiatable object per set, inserting calls to a notification callback mechanism on state modification and defining calls in the constraint context as imperative code sequences that, in response to these callbacks, take actions to maintain these constraints. This notification and callback mechanism can also be employed in connection with external events, thereby providing for efficient implementation of event-sequenced imperative procedures in a constraint programming language.

Abstract: A computer is caused to function as a parsing unit, a macroblocking analyzing unit, a junction-node restructuring unit, an identical portion merging/restructuring unit, a similar portion merging/restructuring unit, and an intermediate language restructuring unit. The parsing unit performs syntax analysis of a source code. The macroblocking analyzing unit segments the program written in the source code into blocks and appends a virtual portion representing a unique number in a statement, to a number for identifying a variable for the statement in each block to virtualize a calculation pattern. The junction-node restructuring unit extracts a node directly related to a subroutine block. The identical portion merging/restructuring unit merges pre-processing together and post-processing together for a subroutine called up at a multiple portions in the program. The similar portion merging/restructuring unit integrates subroutines having similar structures into a related subroutine.

Abstract: A method may include mapping a first program to a context-free grammar. Grammar transformations may be performed on the context-free grammar to produce a transformed context-free grammar representing the first program. A second program having a program structure different than a program structure of the first program may be constructed from the transformed context-free grammar.

Abstract: Transactional memory compatibility type attributes are associated with intermediate language code to specify, for example, that intermediate language code must be run within a transaction, or must not be run within a transaction, or may be run within a transaction. Attributes are automatically produced while generating intermediate language code from annotated source code. Default rules also generate attributes. Tools use attributes to statically or dynamically check for incompatibility between intermediate language code and a transactional memory implementation.

Abstract: A method for creating a unified binary file that may be executed on a plurality of hardware platforms. The unified binary file includes hardware independent code and a plurality of hardware dependent binary files for a variety of hardware platforms. When the unified binary file is executed on a supported hardware platform, an appropriate hardware dependent file is identified and installed. A method for preparing a software package supported on a plurality of hardware platforms for distribution. A unified binary file is created for each corresponding file of the software package. Each unified binary file includes installation directory information and dependent file information.

Abstract: A method and apparatus to generate code to represent a graphical model formed of multiple graphical modeling components and at least one variable-sized signal is presented. Each variable-sized signal is represented using a size-vector in the generated code. The generated code is optimized by representing multiple variable-sized signals with the same size-vector such that at least two variable-sized signals share a size-vector in the generated code. The size of the variable-sized signal is capable of changing during the execution of the graphical model. The method and apparatus also identifies the owners of the variable-sized signals.

Abstract: Mechanisms for optimizing scalar code executed on a single instruction multiple data (SIMD) engine are provided. Placement of vector operation-splat operations may be determined based on an identification of scalar and SIMD operations in an original code representation. The original code representation may be modified to insert the vector operation-splat operations based on the determined placement of vector operation-splat operations to generate a first modified code representation. Placement of separate splat operations may be determined based on identification of scalar and SIMD operations in the first modified code representation. The first modified code representation may be modified to insert or delete separate splat operations based on the determined placement of the separate splat operations to generate a second modified code representation. SIMD code may be output based on the second modified code representation for execution by the SIMD engine.

Abstract: Methods and systems for detecting copied program code are described. The detection may be performed by comparing source code of a first program to object code of a second program. Alternatively, the detection may be performed by comparing object code of a first program to object code of a second program.

Abstract: General-purpose distributed data-parallel computing using high-level computing languages is described. Data parallel portions of a sequential program written in a high-level language are automatically translated into a distributed execution plan. Map and reduction computations are automatically added to the plan. Patterns in the sequential program can be automatically identified to trigger map and reduction processing. Direct invocation of map and reduction processing is also provided. One or more portions of the reduce computation are pushed to the map stage and dynamic aggregation is inserted when possible. The system automatically identifies opportunities for partial reductions and aggregation, but also provides a set of extensions in a high-level computing language for the generation and optimization of the distributed execution plan. The extensions include annotations to declare functions suitable for these optimizations.

Abstract: Systems and methods are provided for enabling communication between a composite system providing additional functionality not contained in existing legacy systems and other existing systems using different commands, variables, protocols, methods, or instructions, when data may be located on more than one system. In an embodiment, multiple software layers are used to independently manage different aspects of an application. A business logic layer may be used in an embodiment to facilitate reading/writing operations on data that may be stored locally and/or on external systems using different commands, variables, protocols, methods, or instructions. A backend abstraction layer may be used in an embodiment in conjunction with the business logic layer to facilitate communication with the external systems. A user interface layer may be used in an embodiment to manage a user interface, a portal layer to manage a user context, and a process logic layer to manage a workflow.

Abstract: Apparatus, systems, and methods for a compiler are described. One such compiler converts source code into an automaton comprising states and transitions between the states, wherein the states in the automaton include a special purpose state that corresponds to a special purpose hardware element. The compiler converts the automaton into a netlist, and places and routes the netlist to provide machine code for configuring a target device.

Abstract: Particular embodiments discover a relationship between a plurality of methods of a C++ object; define one or more rules to represent the relationship; verify the rules by symbolically executing the methods; and if the rules are verified, then use the rules when symbolically executing the methods so that bytecode of the methods is not executed.

Abstract: A method for testing and debugging of dynamic binary translation wherein a dynamic binary translator allows a target binary to be executed transparently on a host machine having a different computer architecture than the target machine involves selecting a minimum set of target machine states for simulation at run-time. A series of target machine instructions from the target binary is translated into a series of host machine instructions. During translation, a plurality of check points are inserted into the series of host machine instructions. During translation, a plurality of verification points are inserted into the series of host machine instructions. The series of host machine instructions, including the check points and verification points, are executed. Execution of a check point determines a simulated target machine state. Execution of a verification point sends information pertaining to simulated target machine states to an external verifier.

Abstract: To overcome the difficulties inherent in traditional compiler validating methods, a new technique is herein provided for validating compiler output via program verification. In one embodiment, this technique is implemented as an automated tool that merges both a source program and the compiler-generated target program into a single (intermediate) program. An automated program verifier is then applied to the merged program. Subsequently, the program verifier compares the source and target programs and determines if the programs are semantically equivalent.

Abstract: The present invention extends to methods, systems, and computer program products for emulating pointers. Pointers can be emulated by replacing the pointers with a <variable#, offset> pair and replacing each dereference site with a switch on the tag and a switch body that executes the emulated pointer access on the corresponding variable the pointer points to. Data flow optimizations can be used to reduce the number of switches and/or reduce the number of cases which need be considered at each emulated pointer access sites.

Abstract: The system comprises a man-machine interface for controlling the application, a server running the application, a server hosting the service and a server for automatically calling the service, including memory resources containing the data describing the service, receive the data related to the service and transform that data so that it can be processed in the application server, all of which under the control of the man-machine interface and the application server.

Abstract: A system that translates source code of a compiled high level language into bytecode. Compiled languages are so named because their implementations are typically compilers that generate machine code. The described system takes source code of the compiled high level language and translates it into bytecode. The bytecode can be optimized with control flow analysis and method splitting.

Abstract: A computer-implemented method of automatically generating an embedded system on the basis of an original computer program, comprising analyzing the original computer program, comprising a step of compiling the original computer program into an executable to obtain data flow graphs with static data dependencies and a step of executing the executable using test data to provide dynamic data dependencies as communication patterns between load and store operations of the original computer program, and a step of transforming the original computer program into an intermediary computer program that exhibits multi-threaded parallelism with inter-thread communication, which comprises identifying at least one static and/or dynamic data dependency that crosses a thread boundary and converting said data dependency into a buffered communication channel with read/write access.

Abstract: A high level programming language provides a read-only communication operator that prevents a computational space from being written. An indexable type with a rank and element type defines the computational space. For an input indexable type, the read-only communication operator produces an output indexable type with the same rank and element type as the input indexable type but ensures that the output indexable type may not be written. The read-only communication operator ensures that any attempt to write to the output indexable type will be detected as an error at compile time.

Abstract: A high level programming language provides a map transformation that takes a data parallel algorithm and a set of one or more input indexable types as arguments. The map transformation applies the data parallel algorithm to the set of input indexable types to generate an output indexable type, and returns the output indexable type. The map transformation may be used to fuse one or more data parallel algorithms with another data parallel algorithm.

Abstract: The present invention provides a method and system for producing intermediate representation of source code listings with possibly mixed syntaxes to assist software development applications in presenting and analyzing the source code listings through reading the intermediate representation. A source code processor calls Application Programming Interfaces (APIs) to preserve source code information, which includes intermediate representation data sets and is preferably stored in a file-based repository. The source code processor is of a compiler, a preprocessor, a parser, or a comment document processor. The data sets capture lexical, syntax and semantic information of source code construct elements, and comprise of location, processor identification, construct category, and attribute data.

Abstract: A system and method for facilitating development of a computer program that interfaces with a Web Semantic store (WSS). A system queries an WSS to retrieve interface information, including schema information corresponding to a portion of data in the WSS relevant to a user application. The system uses the retrieved information to provide an integrated development environment to a user. The IDE may include one or more features such as completion lists, tool tips, and quick info. The schema information may be used to create synthetic types for use in the target program. The interface information may be used to create synthetic elements to be inserted into a target program. The synthetic types may be used to perform static type checking during an editing session or a program compilation, or to provide the IDE services. During a build, the synthetic elements may be removed and replaced with WSS access code, which is subsequently used during program runtime to access the store.

Abstract: A data processing apparatus has an interpreter environment for dynamically implementing a program constructed based on a command set defined independently of a native command group, in a native environment constructed based on the native command group processed by a processor configuring hardware. The apparatus generates an intermediate data stream in each of a plurality of stages into which an input data stream is divided in interpretation in the native environment and filters the intermediate data stream to generate a filtered data stream in the interpreter environment.

Abstract: Methods and apparatus optimized for compiling instructions in a data processor are disclosed. In one aspect, a method of address calculation is disclosed, comprising operating a compiler to generate at least one instruction; canonicalizing the address calculation in a plurality of different approaches: in one exemplary embodiment, the first approach comprises canonicalizing the “regular” 32-bit instruction addressing modes, and the second for the “compressed” 16-bit instruction addressing modes. In another aspect, a plurality of functions (up to and including all available functions) are called indirectly to allow addresses to be placed in a constant pool. Improved methods for instruction selection, register allocation and spilling, and instruction compression are provided. An improved SoC integrated circuit device having an optimized 32-bit/16-bit processor core implementing at least one of the foregoing improvements is also disclosed.

Abstract: Compile-time optimized bounds checking of user-defined types is provided. A user-defined class has an annotated memory-accessing method, and an annotated bound-providing member such as an integer field containing a bound or a method that returns a bound when called. The user-defined-bounds check may supply bounds checking where the programming language has none, or it may supplement existing bounds checks, e.g., by wrapping a built-in array type or a garbage-collector-managed type. Bounds checking can be extended beyond arrays and other types whose layout is controlled by a compiler, allowing efficient systems programming in a managed code environment. A bounds-check representation is inserted by the compiler in intermediate language code. Optimization then reduces duplicative bounds checking.

Abstract: A runtime system implemented in accordance with the present invention provides an application platform for parallel-processing computer systems. Such a runtime system enables users to leverage the computational power of parallel-processing computer systems to accelerate/optimize numeric and array-intensive computations in their application programs. This enables greatly increased performance of high-performance computing (HPC) applications.

Abstract: A method for analyzing a program is provided. The method includes, determining an object type that may exist at an execution point of the program, wherein this enables determination of possible virtual functions that may be called; creating a call graph at a main entry point of the program; and recording an outgoing function call within a main function. The method also includes analyzing possible object types that may occur at any given instruction from any call path for virtual calls, wherein possible object types are determined by tracking object types as they pass through plural constructs; and calling into functions generically for handling specialized native runtime type information.

Abstract: A runtime system implemented in accordance with the present invention provides an application platform for parallel-processing computer systems. Such a runtime system enables users to leverage the computational power of parallel-processing computer systems to accelerate/optimize numeric and array-intensive computations in their application programs. This enables greatly increased performance of high-performance computing (HPC) applications.

Abstract: A method for combined static and dynamic compilation of program code to remove delinquent loads can include statically compiling source code into executable code with instrumented sections each being suspected of including a delinquent load, and also into a separate intermediate language representation with annotated portions each corresponding to one of the instrumented sections. The method also can include executing the instrumented sections repeatedly and monitoring cache misses for each execution. Finally, the method can include dynamically recompiling selected ones of the instrumented sections using corresponding ones of the annotated portions of the separate intermediate language representation only after a threshold number of executions of the selected ones of the instrumented sections, each recompilation include a pre-fetch directive at a pre-fetch distances tuned to avoid the delinquent load.

Abstract: A runtime system implemented in accordance with the present invention provides an application platform for parallel-processing computer systems. Such a runtime system enables users to leverage the computational power of parallel-processing computer systems to accelerate/optimize numeric and array-intensive computations in their application programs. This enables greatly increased performance of high-performance computing (HPC) applications.

Abstract: A computer implemented method, system and computer program product for efficient multiple-pattern based matching and transformation of intermediate language expression trees in a compiler. Such an approach includes three constructs of pattern matchers namely a registry, a mapped registry and a registry instance for constructing multiple patterns and for enabling a matching and transformation process. These constructs narrow the number of relevant patterns applied against input expressions without repeatedly implementing an algorithm and also significantly reduce memory footprint and compilation time.

Abstract: Embodiments of the invention enable application programs running across multiple compute nodes of a highly-parallel system to compile source code into native instructions, and subsequently share the optimizations used to compile the source code with other nodes. For example, determining what optimizations to use may consume significant processing power and memory on a node. In cases where multiple nodes exhibit similar characteristics, it is possible that these nodes may use the same set of optimizations when compiling similar pieces of code. Therefore, when one node compiles source code into native instructions, it may share the optimizations used with other similar nodes, thereby removing the burden for the other nodes to figure out which optimizations to use. Thus, while one node may suffer a performance hit for determining the necessary optimizations, other nodes may be saved from this burden by simply using the optimizations provided to them.

Abstract: An improved architecture for a program code conversion apparatus and method for generating intermediate representations for program code conversion. The program code conversion apparatus determines which types of IR nodes to generate in an intermediate representation (IR) of subject code (10) to be translated. Depending upon the particular subject and target computing environments involved in the conversion, the program code conversion apparatus utilizes either base nodes, complex nodes, polymorphic nodes, and architecture specific nodes, or some combination thereof, in generating the intermediate representation.

Abstract: The present invention extends to methods, systems, and computer program products for translating declarative models. Embodiments of the present invention facilitate processing declarative models to perform various operations on applications, such as, for example, application deployment, application updates, application control such as start and stop, application monitoring by instrumenting the applications to emit events, and so on. Declarative models of applications are processed and realized onto a target environment, after which they can be executed, controlled, and monitored.

Abstract: Systems and methods for the efficient handling of rare events by modification of executable code is provided. The present invention eliminates the need for event checking code and handling in the primary execution path of compiled code by using a patch table to modify code during execution. Accordingly, event handling does not introduce additional instructions to the primary execution path, and thus will not interfere with compiler optimizations for maximal performance along the primary execution path. The present invention, therefore, provides event handling for events that occur rarely while reducing the size of the code for execution on memory-constrained devices.

Abstract: Described is a technology by which a compiler's intermediate representation is generated in a way that includes type checking to ensure safe execution. Typed representation of virtual method invocation uses an exact class name to represent objects of the class but not those of the subclasses, and a combined class type as an encoding of an existential type to represent objects of the class and subclasses of the class. Typed representation of interface method invocation is also provided, as is testing whether the object can be cast to a class, to an interface and/or to a class vector. Vector store checking is also able to be type checked. The medium-level intermediate representation is translated into a low-level intermediate representation, including choosing data representation for types, and converting medium-level intermediate representation operators into instructions in the low-level representation.

Abstract: A library management system may compare contracts between programming libraries to identify unions, intersections, and differences between libraries. The management system may have a contract analyzer that may remove the contract definition from an existing library to form a library contract. The library contract may be managed as a first class item within a programming environment, and may be used as a reference for comparing existing and new versions of the library. The library management system may create reference libraries for programmers to write applications using two or more intersecting libraries, among other uses.

Abstract: A programming interface for a computer platform can include various functionality. In certain embodiments, the programming interface includes one or more of the following groups of types or functions: those related to core file system concepts, those related to entities that a human being can contact, those related to documents, those common to multiple kinds of media, those specific to audio media, those specific to video media, those specific to image media, those specific to electronic mail messages, and those related to identifying particular locations.

Abstract: A computer-implemented method includes compiling one or more segments of code during run-time of a process executing at one or more processors of a computer system. The compilation produces a high-level intermediate representation of the one or more segments of the code. The high-level intermediate representation is modifiable by the process, without executing the high-level intermediate representation, to generate a modified high-level intermediate representation that is executable by the process.

Abstract: A control flow graph may be generated from a model. The control flow graph may be restructured by converting at least one unstructured region of a control flow graph into a structured region. The restructuring may include locating at least one block between two merge nodes in the control flow graph, moving the located block to a different section of the control flow graph, and creating the structured region by surrounding the moved code block with a test of a guard variable.

Abstract: In a change-resilient intermediate language code, registers have been allocated but symbolic references and pseudo instructions still use unbound items. Pseudo instructions having a specific location within generated intermediate language code request insertion of machine instruction(s) at the location to perform specified operations. Specified operations may include, for example, operations to perform or facilitate garbage collection, memory allocation, exception handling, various kinds of method calls and execution engine service calls, managed object field access, heap management, generic code, static variable storage access, address mode modification, and/or symbolic reference to types. A binder may transform the intermediate language code into executable code. Little or no register allocation is needed during binding, but unbound items such as offsets, sizes, slots, and the like are determined and specified to produce executable code.

Abstract: Management of changes involving base classes is facilitated. An intermediate language code has execution-ready register allocation but unbound object field layout and/or virtual method slot assignment, thereby providing resilience. A symbolic reference rather than a direct offset can identify a field, and intermediate language code can be field order independent. Other symbolic references may also be used. Intermediate language code pseudo instructions can express items such as a field access, a method call, a virtual method call, part or all of a method prolog, part or all of a method epilog. A binder binds the intermediate language code to produce executable code. Thus, one may avoid recompilation otherwise required when a base class is revised by adding a field, removing a private field, rearranging field order, adding a virtual method, or rearranging virtual method order.

Abstract: A compiler, which corresponds to a recent processor having a multithread function, that enables execution of efficient instruction scheduling and allows a programmer to control the instruction scheduling includes: an instruction scheduling directive receiving unit which receives, from a programmer, a directive for specifying an instruction scheduling method; and an instruction scheduling unit which executes, conforming to one of instruction scheduling methods, instruction scheduling of rearranging intermediate codes corresponding to the source program. The instruction scheduling unit selects one of instruction scheduling methods according to the directive received by the instruction scheduling directive receiving unit, and executes instruction scheduling conforming to the selected instruction scheduling method.