Abstract: A system and method automatically inserts pipelines into a high-level program specification. An Intermediate Representation (IR) builder creates one or more graphs or trees based on the high-level program specification. A scheduler iteratively applies a bounded scheduling algorithm to produce an execution schedule for the IR minimizing overall execution time for a given number of pipeline stages. A Hardware Description Language (HDL) code generator may utilize the pipelined, scheduled IR to generate optimized HDL code corresponding to the high-level program specification. An annotated version of the high-level program specification showing where the pipelines have been inserted may be displayed allowing additional design exploration.

Abstract: A method for code size reduction, which comprises determining basic blocks in an IR module; grouping the basic blocks having duplicate code into groups; providing weighting values corresponding to different instructions of the module, wherein the weighting values are determined based on a plurality of intermediate representation program codes; determining a weighted size of the module, wherein the weighted size of the module is determined by summing weighted sizes of the basic blocks of the module, and the weighted size of each basic block is determined by summing products of numbers of different instructions of the basic blocks and the corresponding weighting values; removing duplicates in one group to obtain a module having one processed group; determining a weighted size of the module having one processed group; and comparing the weighted size of the module to the weighted size of the module having one processed group.

Abstract: There are provided methods and computer program products for generating code for an architecture encoding an extended register specification. A method for generating code for a fixed-width instruction set includes identifying a non-contiguous register specifier. The method further includes generating a fixed-width instruction word that includes the non-contiguous register specifier.

Abstract: A system and method for automatically modifying a native code module accessed in a user software application are described herein. The user software application may include virtual machine bytecode. Access to the native code module may be detected during execution of the virtual machine bytecode. The native code module may be automatically modified by adding instrumentation code to determine various types of information regarding execution of the native code module, and the access may be directed to the modified native code module.

Abstract: A method for generating a binary executable of a program so that private symbols in a module are accessible from another module. In one embodiment, the method compiles a source program to an intermediate representation and scans the representation to find the private symbols in the program's modules. It then wraps a function around each private symbol. When called, the function returns an address of the private symbol, so that the other module can access the symbol from outside the module in which the symbol is found. At run time, a call is made to obtain the address of the function, which is then executed to obtain the address of the private symbol so that the symbol can be accessed. In another embodiment, a Just-In-Time compiler executes the wrapper functions and patches the executable program with the direct address of the private symbol to avoid a call to the wrapper function.

Abstract: Disclosed here are methods, systems, paradigms and structures for optimizing generation of intermediate representation (IR) for a script code by eliminating redundant object reference count operations from the IR. An IR of the script includes (a) a set of first code that increments a reference count of an object when a programming construct refers to the object, and (b) an associated set of second code which decrements the reference count of the object when a reference to the object is removed. The IR is analyzed to identify a subset of the set of second code which, upon execution, does not decrement the reference count of the object to a zero value. The subset of second code and the first code corresponding to the subset is removed from the IR to generate an optimized IR. The optimized IR is further converted to an executable code.

Abstract: In an embodiment, a model is sliced into a plurality of slices. A slice in the plurality of slices is selected. A portion of code, that corresponds to the selected slice, is identified from code generated from the model. The identified code is verified to be equivalent to the selected slice. Equivalence may include equivalent functionality, equivalent data types, equivalent performance, and/or other forms of equivalence between the selected slice and the identified generated code.

Abstract: A method and apparatus is disclosed for compilation of an original Cobol program with support for improved performance by increased parallelism during execution using multiple threads of processing. The approach includes a two stage compilation process, the first compilation/translation step by a first specialized compiler/translator that takes as input a Cobol source program that includes parallelization directives, and produces as output an intermediate computer program in a second computer programming language, the intermediate program including parallelization directives in the second computer programming language. The intermediate program is then compiled utilizing a selected second compiler that provides support for parallelism described in the second programming language. The approach optionally allows for use of pragmas serving as parallelization directives to the compiler in the original Cobol program or in the intermediate program.

Abstract: A method, program, and apparatus for optimizing compiled code using a dynamic compiler. The method includes the steps of: generating intermediate code from a trace, which is an instruction sequence described in machine language; computing an offset between an address value, which is a base point of an indirect branch instruction, and a start address of a memory page, which includes a virtual address referred to by the information processing apparatus immediately after processing a first instruction; determining whether an indirect branch instruction that is subsequent to the first instruction causes processing to jump to another memory page, by using a value obtained from adding the offset to a displacement made by the indirect branch instruction; and optimizing the intermediate code by using the result of the determining step.

Abstract: A method of compiling code includes assigning an endian type to data. An endian flip operation is performed based on the endian type of the data and a target system. Other embodiments are described and claimed.

Abstract: Techniques for automatic license entitlement calculation. A method includes decomposing a license metric definition into metric-generic and metric-specific logic, compiling the metric-specific logic to generate intermediate code, interpreting the metric-generic logic and dynamically loading the intermediate code to execute a license entitlement calculation.

Abstract: Techniques for automatic license entitlement calculation. A method includes decomposing a license metric definition into metric-generic and metric-specific logic, compiling the metric-specific logic to generate intermediate code, interpreting the metric-generic logic and dynamically loading the intermediate code to execute a license entitlement calculation.

Abstract: In an embodiment, a model is sliced into a plurality of slices. A slice in the plurality of slices is selected. A portion of code, that corresponds to the selected slice, is identified from code generated from the model. The identified code is verified to be equivalent to the selected slice. Equivalence may include equivalent functionality, equivalent data types, equivalent performance, and/or other forms of equivalence between the selected slice and the identified generated code.

Abstract: Processes in a message passing system may be launched when messages having data patterns match a function on a receiving process. The function may be identified by an execution pointer within the process. When the match occurs, the process may be added to a runnable queue, and in some embodiments, may be raised to the top of a runnable queue. When a match does not occur, the process may remain in a blocked or non-executing state. In some embodiments, a blocked process may be placed in an idle queue and may not be executed until a process scheduler determines that a message has been received that fulfills a function waiting for input. When the message fulfills the function, the process may be moved to a runnable queue.

Abstract: A system and method for improving software maintainability, performance, and/or security by associating a unique marker to each software code-block; the system comprising of a plurality of processors, a plurality of code-blocks, and a marker associated with each code-block. The system may also include a special hardware register (code-block marker hardware register) in each processor for identifying the markers of the code-blocks executed by the processor, without changing any of the plurality of code-blocks.

Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for runtime language-independent sandboxing of software. In one aspect, a system implements an extended Software Fault Isolation (SFI) software sandboxing system configured to provide a user-mode program interface for receiving runtime requests for modifying verifiably safe executable machine code. Requests can include dynamic code creation, dynamic code deletion, and atomic modification of machine code instructions. A runtime modification of a verifiably safe executable memory region is made in response to each received runtime request, and code within the modified memory region has a guarantee of safe execution.

Abstract: A system and method for converting byte code of a first type into byte code of a second type. Byte code of a first type and markup language code are received as inputs. The first byte code is converted into constituent byte code data elements that can comprise any logical unit or grouping of at least a portion of a software application. The markup language code is converted into constituent markup language data elements that can comprise individual markup language tags and references to data or functionality in the first byte code. The first byte code data elements and markup language data elements are mapped to data elements of a second byte code type. The second byte code data elements are assembled into a resulting second byte code.

Abstract: Disclosed here are methods, systems, paradigms and structures for optimizing intermediate representation (IR) of a script code for atomic execution. Atomic execution of the script is achieved by generating portions of the IR as an atomic transaction. In an atomic transaction, a series of operations either all execute, or none executes. The IR includes checkpoints that evaluate to one of two possible values. The checkpoint evaluates to a first value when there is no error during execution, and evaluates to a second value when an error occurs. The IR is optimized for atomic execution by regenerating a portion of the IR including the checkpoint and code associated with the checkpoint as a transaction. When an error occurs during the execution of the transaction, the transaction is aborted and a state of execution of the script code is reverted to a state prior to the beginning of the transaction.

Abstract: Apparatus, systems, and methods for a compiler are described. One such compiler generates machine code corresponding to a set of elements including a general purpose element and a special purpose element. The compiler identifies a portion in an arrangement of relationally connected operators that corresponds to a special purpose element. The compiler also determines whether the portion meets a condition to be mapped to the special purpose element. The compiler also converts the arrangement into an automaton comprising a plurality of states, wherein the portion is converted using a special purpose state that corresponds to the special purpose element if the portion meets the condition. The compiler also converts the automaton into machine code. Additional apparatus, systems, and methods are disclosed.

Abstract: To overcome the difficulties inherent in traditional compiler validating methods, a new technique is herein provided for validating compiler output via program verification. In one embodiment, this technique is implemented as an automated tool that merges both a source program and the compiler-generated target program into a single (intermediate) program. An automated program verifier is then applied to the merged program. Subsequently, the program verifier compares the source and target programs and determines if the programs are semantically equivalent.

Abstract: A front-end compiler compiles source code into intermediate code, that may later be compiled into binary code. The source code defines an execution scope and includes a contract. When a contract is encountered at runtime of an execution scope, further execution of that execution scope is conditioned on whether a predicate associated with the contract is true. The front-end compiler operates so as to preserve the contract so that the contract continues to be semantically structured such that the predicate may be removed from the intermediate language code. The contract may thus continue to be understood by semantic analysis of the contract. Thus, the predicate may be understood by static analysis tools that operate on the intermediate code.

Abstract: Techniques for automatically persisting variable data are provided. In one embodiment, a computer system can identify, upon compiling or interpreting source code for an application, a variable in the source code that is declared with a predefined keyword. The predefined keyword can indicate that the variable should be persistent. The computer system can then generate, for each instance in the source code where data is assigned to the variable, runtime code for saving the data in a nonvolatile data store.

Abstract: A code generator and multi-core framework are executable in a computer system to implement methods as disclosed herein, including a method for the code generator to automatically generate multi-threaded source code from functional specifications, and for the multi-core framework, which is a run time component, to generate multi-threaded task object code from the multi-threaded source code and to execute the multi-threaded task object code on respective processor cores. The methods provide transparency to the programmer, and during execution, provide automatic identification of processing parallelisms. The methods implement Consume-Simplify-Produce and Normalize-Transpose-Distribute operations to reduce complex expression sets in a functional specification to simplified expression sets operable in parallel processing environments through the generated multi-threaded task object code.

Abstract: A method of generating a symbol table for a programmable logic controller which executes high-level language program is provided. The method includes reading the high-level language program and an association table specifying relationship between devices controlled by the programmable logic controller and variable names in the high-level language program; compiling and linking the high-level language program and the association table for determining a physical address for each of the variable names and the corresponding devices; generating the symbol table by the compiling and linking, the symbol table defining the determined physical address for each of the devices; and storing the symbol table in the memory of the programmable logic controller. A programmable logic controller executing the high-level language program and storing the symbol table is also provided.

Abstract: Compiler based obfuscation is described. To protect portions of a code project with obfuscations, the code is modified within a compiler to produce one or more modifications that obfuscate the code as part of a compilation process. A compiled version of the code is generated having the modifications that are produced within the compiler. In one approach, the compiler is configured to consume an obfuscation description that indicates portions of the code to protect and specifies the modifications to make to the indicated portions. Various different modifications of code may be performed during the compilation process to implement corresponding obfuscation features. For example, the modifications made within a compiler may include, but are not limited to, modifications designed to enable tamper detection, anti-debugging, and/or encryption of the code.

Abstract: In one embodiment, a method comprises generating a first executable program optimized for an executable system based on compiling a program relative to an initial set of independent optimization metrics; determining first performance metrics based on the executable system executing the first executable program; adjusting the initial set of independent optimization metrics based on the first performance metrics to generate a second set of independent optimization metrics; and generating a second executable program, based on compiling the program relative to the second set of independent optimization metrics, for improved execution of the program in the executable system.

Abstract: Embodiments of the claimed subject matter are directed to methods and a system that allows an application comprising a single code set under the COBOL Programming Language to execute in multiple platforms on the same multi-platform system (such as a mainframe). In one embodiment, a single code set is pre-compiled to determine specific portions of the code set compatible with the host (or prospective) platform. Once the code set has been pre-compiled to determine compatible portions, those portions may be compiled and executed in the host platform. According to these embodiments, an application may be executed from a single code set that is compatible with multiple platforms, thereby potentially reducing the complexity of developing the application for multiple platforms.

Abstract: A method, system, and article of manufacture are disclosed for transforming a definition of a process for delivering a service. This service process definition is comprised of computer readable code. The method comprises the steps of expressing a given set of assumptions in a computer readable code; and transforming said process definition by using a processing unit to apply said assumptions to said process definition to change the configuration of the process definition. The process definition may be transformed by using factors relating to the specific context in or for which the process definition is executed. Also, the process definition may be transformed by identifying, in a flow diagram for the service process definition, flows to which the assumptions apply, and applying program rewriting techniques to those identified flows.

Abstract: Intermediate representation (IR) code is received as compiled from a shader in the form of shader language source code. The input IR code is first analyzed during an analysis pass, during which operations, scopes, parts of scopes, and if-statement scopes are annotated for predication, mask usage, and branch protection and predication. This analysis outputs vectorization information that is then used by various sets of vectorization transformation rules to vectorize the input IR code, thus producing vectorized output IR code.

Abstract: Deferred constant pool generation is disclosed. Optimization processing is performed with respect to an intermediate representation of a source code. The optimized intermediate representation is used to generate a constant pool. In some embodiments, the source code comprises JavaScript, which is used to generate a low level virtual machine (LLVM) or other intermediate representation (IR), which intermediate representation is optimized prior to a constant pool being generated.

Abstract: A system and method for early platform dependency preparation of intermediate code representation during bytecode compilation in a virtual machine (VM), or other runtime environment, and particularly for use in a system that includes a Java Virtual Machine (JVM). Current techniques for separating the platform dependent intermediate representation from the platform independent intermediate representation using a watertight abstraction layer gives non-optimal side effects (such as compiler source code duplication or inefficiency in the generated code). Embodiments of the present invention enable the compiler to construct platform dependent idioms using medium level intermediate code, and maintain the platform dependent construct all the way to the final native code.

Abstract: Processes in a message passing system may be launched when messages having data patterns match a function on a receiving process. The function may be identified by an execution pointer within the process. When the match occurs, the process may be added to a runnable queue, and in some embodiments, may be raised to the top of a runnable queue. When a match does not occur, the process may remain in a blocked or non-executing state. In some embodiments, a blocked process may be placed in an idle queue and may not be executed until a process scheduler determines that a message has been received that fulfills a function waiting for input. When the message fulfills the function, the process may be moved to a runnable queue.

Abstract: A method, a system, and a non-transitory computer readable medium for parallelizing computer program code including a loop are presented. An intermediate language version of the computer program code is generated based on a parallel type of the loop, wherein the intermediate language version includes information about parallelism in the computer program code. The intermediate language version is optimized at runtime based on the device characteristics where the computer program code is to be executed. The parallel type may include a thread parallel type, wherein the loop is dispatched to multiple threads for execution, or a general parallel type, wherein the loop is dispatched to a single thread and may be vectorized for execution. The intermediate language version may be saved separate from the computer program code.

Abstract: Systems and methods that add specifications to procedures in a garbage collector for indicating what each procedure does. Such annotations can be added in the source code, to indicate what the source code is to do when it runs—hence enabling an automatic verification of the garbage collector by a verification component. The specification can be presented as a logical formula that can be readily processed by a theorem prover, which is associated with the verification component. Such logical formulas can further employ regions to specify correctness of the garbage collector.

Abstract: The invention relates to a method for fine-tuning a software application that is written in a source programming language and is executable on a target platform.

Abstract: A system and method for facilitating development of a computer program that interfaces with a data store. A system queries the data store to retrieve interface information, including schema information corresponding to a portion of data in the data store relevant to a user application. The system uses the retrieved information to provide an integrated development environment (IDE) to a user. The IDE may include one or more features such as completion lists, tool tips, and quick info. The schema information may be used to create synthetic types for use in the target program. The interface information may be used to create synthetic elements to be inserted into a target program. The synthetic types may be used to perform static type checking during an editing session or a program compilation, or to provide the IDE services. During a build, the synthetic elements may be removed and replaced with data store access code, which is subsequently used during program runtime to access the store.

Abstract: A cloud computing interface includes a high-level compiler uses a modified flow language referred-to as “Resilient Optimizing Flow Language” (ROFL) that converts inputs relating to source program and data definitions to generate bytecode objects that can be used by an execution engine to allocate input data to “processes” created by the execution engine based on available resources, so as to evaluate or perform particular tasks on the input data.

Abstract: [PROBLEMS] To provide a data processing device such as a text mining device capable of extracting characteristic structures properly even in case a plurality of words indicating identical contents or a plurality of words semantically associated are contained in input data. [MEANS FOR SOLVING PROBLEMS] Association node extraction unit (22) of a text mining device (10) extracts association nodes containing semantically associated words from a graph obtained as a result of syntax analysis. Association node joint unit (23) transforms the graph by joint of a part of or a whole of the association nodes. Characteristic structure extraction unit (24) extracts a characteristic structure from the graph transformed by the association node joint unit.

Abstract: A method, apparatus, and program product are disclosed for carrying out the compilation of an original Cobol program that includes a mix of Cobol, C++ or JAVA and optional OpenMP directives in a single source program file so as to provide improved performance during execution of the program and improved convenience and features in programming.

Abstract: A method and apparatus is disclosed for compilation of an original Cobol program with support for improved performance by increased parallelism during execution using multiple threads of processing. The approach includes a two stage compilation process, the first compilation/translation step by a first specialized compiler/translator that takes as input a Cobol source program that includes parallelization directives, and produces as output an intermediate computer program in a second computer programming language, the intermediate program including parallelization directives in the second computer programming language. The intermediate program is then compiled utilizing a selected second compiler that provides support for parallelism described in the second programming language. The approach optionally allows for use of pragmas serving as parallelization directives to the compiler in the original Cobol program or in the intermediate program.

Abstract: A method, system, and article of manufacture are disclosed for transforming a definition of a process for delivering a service on a specified computing device. This service process definition is comprised of computer readable code. The method comprises the steps of expressing a given set of assumptions in a computer readable code; and transforming the definition by using a processing unit to apply the assumptions to the definition of the process to change the way in which the process operates. The definition of the process may be transformed by using factors relating to the specific context in or for which the definition is executed. Also, the definition may be transformed by identifying, in a flow diagram for the process, flows to which the assumptions apply, and applying program rewriting techniques to those identified flows.

Abstract: A device receives program code, and receives size/type information associated with inputs to the program code. The device determines, prior to execution of the program code and based on the input size/type information, a portion of the program code that is executable by a graphical processing unit (GPU), and determines, prior to execution of the program code and based on the input size/type information, a portion of the program code that is executable by a central processing unit (CPU). The device compiles the GPU-executable portion of the program code to create a compiled GPU-executable portion of the program code, and compiles the CPU-executable portion of the program code to create a compiled CPU-executable portion of the program code. The device provides, to the GPU for execution, the compiled GPU-executable portion of the program code, and provides, to the CPU for execution, the compiled CPU-executable portion of the program code.

Abstract: The CPU includes a byte code interpretation unit that sequentially reads intermediate code instructions along an execution route, determining whether or not there is a compilation result of the read intermediate code instruction in the compilation result storage unit, interpreting the intermediate code instruction when there is no compilation result, and designating the compilation result if there is a compilation result; and a program execution unit that, if received the interpretation result of the intermediate code instruction from the byte code interpretation unit, executes the intermediate code instruction and, if received the designation of the compilation result, executes the program by executing designated native code. The CPU includes a compilation execution unit that compiles the intermediate code instruction interpreted by the byte code interpretation unit to generate the native code and stores them in the compilation result storage unit.

Abstract: A compile environment is provided in a computer system that allows programmers to program both CPUs and data parallel devices (e.g., GPUs) using a high level general purpose programming language that has data parallel (DP) extensions. A compilation process translates modular DP code written in the general purpose language into DP device source code in a high level DP device programming language using a set of binding descriptors for the DP device source code. A binder generates a single, self-contained DP device source code unit from the set of binding descriptors. A DP device compiler generates a DP device executable for execution on one or more data parallel devices from the DP device source code unit.

Abstract: Object code is generated from an internal representation that includes a plurality of source operands. The generating includes performing for each source operand in the internal representation determining whether a last use has occurred for the source operand. The determining includes accessing a data flow graph to determine whether all uses of a live range have been emitted. If it is determined that a last use has occurred for the source operand, an architected resource associated with the source operand is marked for last-use indication. A last-use indication is then generated for the architected resource. Instructions and the last-use indications are emitted into the object code.

Abstract: A method for generating a binary executable of a program so that private symbols in a module are accessible from another module. In one embodiment, the method compiles a source program to an intermediate representation and scans the representation to find the private symbols in the program's modules. It then wraps a function around each private symbol. When called, the function returns an address of the private symbol, so that the other module can access the symbol from outside the module in which the symbol is found. At run time, a call is made to obtain the address of the function, which is then executed to obtain the address of the private symbol so that the symbol can be accessed. In another embodiment, a Just-In-Time compiler executes the wrapper functions and patches the executable program with the direct address of the private symbol to avoid a call to the wrapper function.

Abstract: A runtime system implemented in accordance with the present invention provides an application platform for parallel-processing computer systems. Such a runtime system enables users to leverage the computational power of parallel-processing computer systems to accelerate/optimize numeric and array-intensive computations in their application programs. This enables greatly increased performance of high-performance computing (HPC) applications.

Abstract: Techniques for representing a program are provided. The techniques include creating one or more sub-variables for each of one or more variables in the program, and maintaining a single size of each of the one or more variables throughout a life-span of each of the one or more variables. Additionally, techniques for performing register allocation are also provided. The techniques include representing bit-width information of each of one or more variables in a powers-of-two representation, wherein the one or more variables comprise one or more variables in a program, coalescing the one or more variables, packing the one or more coalesced variables, and using the one or more packed variables to perform register allocation.

Abstract: Techniques for automatic license entitlement calculation. A method includes decomposing a license metric definition into metric-generic and metric-specific logic, compiling the metric-specific logic to generate intermediate code, interpreting the metric-generic logic and dynamically loading the intermediate code to execute a license entitlement calculation.

Abstract: A system that translates source code of a compiled high level language into bytecode. Compiled languages are so named because their implementations are typically compilers that generate machine code. The described system takes source code of the compiled high level language and translates it into bytecode. The bytecode can be optimized with control now analysis and method splitting.