Abstract: A method and apparatus are disclosed for enhancing operable functionality of input source code files from a software program by identifying candidate code snippets from the plurality of input source code files that meet a similarity threshold measure for library functions stored in the system library and then identifying at least a first validated code snippet from the candidate code snippets that matches a first library function stored in the system memory on the basis of at least first and second matching metrics so that the developer is presented with a library function recommendation which includes the first validated code snippet, the first library function, and instructions for replacing the first validated code snippet with the first library function.

Abstract: Provided is an operation method of a processor including a plurality of heterogeneous cores, the operation method including selecting an execution core of the plurality of heterogeneous cores for executing an application, loading, from a memory, first data corresponding to core information of the execution core during runtime of the execution core, wherein the first data is included in compile data, the compile data including a first function compiled for each heterogeneous core of the plurality of heterogeneous cores, the first function being a function from among a plurality of functions of the application that is at least one of frequently called or having a long execution time, and processing, by the execution core, execution codes for executing the application, based on the first data.

Abstract: An approach is provided for optimizing a just-in-time (JIT) compilation process. A source pod in a container orchestrated execution environment is determined to be saturated. Profile data from a JIT compiler, a virtual machine state, and a native-compiled code state are collected. The profile data, virtual machine state, and native-compiled code state are stored in a data structure in a persistent data repository. In response to a restart or a redeployment of the source pod and an application running on the source pod, the stored profile data, virtual machine state, and native-compiled code state are reused in a new target pod, without requiring a monitoring and an identification of hot code areas in the application after the source pod becomes saturated.

Abstract: Methods and systems are described for removing branches from a computer program. The system receives code for a computer program, with the code including a number of branches. Each branch is part of a branching path and includes a jump instruction. The system executes the code, and upon encountering a branching path at runtime, the system proceeds with a number of steps. First, the system computes the result of the branch, then prefetches independent instructions outside of the branch to be executed. The system then executes one or more of the prefetched independent instructions and removes an if statement within the jump instruction of the branch at the computed result of the branching path. The system then executes the jump instruction of the branch at the computed result of the branching path.

Abstract: Methods, systems, and apparatus for executing a smart contract by a blockchain node of a blockchain. An example method includes receiving bytecode of a smart contract; deploying the smart contract, comprising storing the bytecode of the smart contract on the blockchain; compiling, through Just-In-Time (JIT) compilation, the bytecode of the smart contract into machine code; locally storing the machine code in a memory of the blockchain node; and executing the smart contract deployed on the blockchain, comprising determining whether the machine code corresponding to the bytecode of the smart contract is locally stored in the memory of the blockchain node, and interpreting and executing the bytecode of the smart contract if the machine code corresponding to the bytecode of the smart contract is not locally stored.

Abstract: The disclosed technology is generally directed to secure transactions. In one example of the technology, a smart contract is generated based at least in part on a schema and provided information. The smart contract may be caused to be deployed on a ledger as a smart contract ledger instance. A unique address associated with the deployed smart contract ledger instance may be received. A cryptlet binding for a first contract cryptlet that is associated with the smart contract ledger instance may be generated. The cryptlet binding may be sent to the first contract cryptlet. Responsive to a state change associated with the first contract cryptlet, an update may be communicated to the smart contract ledger instance.

Abstract: A set of service-level reliability metrics and a method to allocate these metrics to the layers of the service delivery platform. These initial targets can be tuned during service design and delivery, and feed the vendor requirements process, forming the basis for measuring, tracking, and responding based on the service-level reliability metrics.

Abstract: A system includes a memory and a processor in communication with the memory. The processor is configured to, prior to runtime, process application metadata for an application. The application metadata is classified into a first class used only for deployment, a second class used only for runtime, and a third class used for both runtime and deployment. Responsive to processing the application metadata, the processor is configured to build a deployment model from the processed application metadata. Prior to runtime, the processor is configured to generate an intermediate representation of the application from the deployment model. The intermediate representation of the application includes direct calls for classes associated with the second class of metadata and the third class of metadata.

Abstract: According to embodiments of the disclosure, a UE, a server, a control method of the UE, and a control method of the server may be provided to efficiently use storage space of the UE by performing AOT compilation based on the usage frequency of an application and function by a user and managing the AOT compiled machine code.

Abstract: A class unloading method comprises: loading, by an electronic device, n classes after an application is started, where n is a positive integer; generating a reference mapping table, where the reference mapping table includes a reference relationship between the n classes and m class objects corresponding to the n classes and a dependency relationship between the m class objects corresponding to the n classes, the dependency relationship is used to represent an interdependency mapping relationship between different class objects, and m is a positive integer greater than or equal to n; and unloading a first class of the n classes based on the reference mapping table in an operation process of the application.

Abstract: According to one example, a method performed by a computing system, the method includes, with a privileged component of the computing system, loading patching code to a region of memory. The method further includes, in relation to executing the patching code, switching from a first set of page tables to a second set of page tables, wherein the second set of pages tables is configured such that only the patching code is executable and privileged memory is writable. The method further includes, executing the patching code to update code stored in memory subject to a predefined set of constraints.

Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for implementing subscription contexts in a reactive programming system. One of the methods includes receiving, by a reactive programming system comprising one or more computers, a reactive programming program defining an ordering of a plurality of operators, the plurality of operators including a subscriber context operator that writes a value to a subscription context for a particular subscriber, wherein the ordering defines an upstream subscription flow ordering from the particular subscriber to a publisher and a downstream data flow ordering from the publisher to the particular subscriber. The operators are evaluated in the upstream subscription flow ordering, including updating a subscription context of each operator with the value written by the subscriber context operator.

Abstract: Systems and methods for object load introspection using guarded storage are disclosed. In embodiments, a computer-implemented method includes: determining objects of interest designated by a user; splitting a first subset of a predetermined memory heap into guarded regions based on a number of objects of interest; allocating each of the objects of interest to a respective one of the guarded regions and remaining objects to a second subset of the predetermined memory heap; executing a program; detecting one of the objects of interest is loaded from one of the guarded regions; generating a trap that transfers control of the executing the program to a signal handler, wherein the signal handler is designated to perform a user-defined task associated with the one of the objects of interest; and executing, by the signal handler of the computing device, the user-defined task.

Abstract: Apparatus, devices, systems, methods, and articles of manufacture are disclosed to allocate power in a computing device. An example system includes a compiler to: analyze power consumption behavior of power consumption units of the computing device; build a power profile; and generate source code with hints of the power profile. The example system includes a power control circuit to: develop a power policy using the hints of the power profile and requests for power licenses from the power consumption units of the computing device; and allocate power to the power consumption units based on the power profile.

Abstract: A method and apparatus are disclosed for enhancing operable functionality of input source code files from a software program by identifying candidate code snippets from the plurality of input source code files that meet a similarity threshold measure for library functions stored in the system library and then identifying at least a first validated code snippet from the candidate code snippets that matches a first library function stored in the system memory on the basis of at least first and second matching metrics so that the developer is presented with a library function recommendation which includes the first validated code snippet, the first library function, and instructions for replacing the first validated code snippet with the first library function.

Abstract: A program editor includes a compile unit that analyzes an address of an instruction between a trace start position and a trace end position set in a sequence program by a program editing unit, inserts a transfer instruction about transferring a signal value to a tracing memory, and converts the sequence program to an object code of the sequence program containing a sampling address table in which the analyzed address is set and an execution program. A programmable controller includes: a sampling address setting unit that sets a sampling address in the tracing memory on the basis of the sampling address table in the object code of the sequence program; and a code execution unit that executes the object code of the sequence program and stores the signal value in the tracing memory in accordance with the transfer instruction.

Abstract: Disclosed herein are system, method, and computer program product embodiments for performing operations on compressed index vectors in columnar in-memory database management systems. By utilizing SIMD processor instructions, database management systems may perform operations that compress and decompress bit vectors and evaluate predicates.

Abstract: A profile guided optimization compiler utilizes sample profile data including a control flow representation of a program having block counts associated with each basic block of the program, and edge counts associated with each control flow edge estimated from the block counts. The sample profile data utilizes correlation data to map the address of a sampled instruction from a fully optimized binary directly into a corresponding basic block of source code control flow of the program using a relative virtual address (RVA) that is associated with each source code basic block and the sampled instruction. The correlation data is able to differentiate multiple blocks on the same source code line and handle inlining and optimizations with greater precision and efficiency. The block counts are then used to guide the optimization of the program.

Abstract: In various embodiments, a resource allocation management circuit may allocate a plurality of different types of hardware resources (e.g., different types of registers) to a plurality of threads. The different types of hardware resources may correspond to a plurality of hardware resource allocation circuits. The resource allocation management circuit may track allocation of the hardware resources to the threads using state identification values of the threads. In response to determining that fewer than a respective requested number of one or more types of the hardware resources are available, the resource allocation management circuit may identify one or more threads for deallocation. As a result, the hardware resource allocation system may allocate hardware resources to threads more efficiently (e.g.

Abstract: A multiprocessor data processing system includes a processor core having a translation structure for buffering a plurality of translation entries. The processor core receives a sequence of a plurality of translation invalidation requests. In response to receipt of each of the plurality of translation invalidation requests, the processor core determines that each of the plurality of translation invalidation requests indicates that it does not require draining of memory referent instructions for which address translation has been performed by reference to a respective one of a plurality of translation entries to be invalidated. Based on the determination, the processor core invalidates the plurality of translation entries in the translation structure without regard to draining from the processor core of memory access requests for which address translation was performed by reference to the plurality of translation entries.

Abstract: A binary that is stored in a portion of runtime memory subject to garbage collection is analyzed. An amount of memory in a portion of runtime memory not subject to garbage collection is allocated for a binary copy based on the analysis. The binary is copied to the allocated portion of runtime memory not subject to garbage collection.

Abstract: An electronic device acquires, from program code, two or more program code loops having specified data dependencies. The electronic device places each of the program code loops into a corresponding blocking loop, each blocking loop including at least one blocking loop induction variable that is incremented by a corresponding block size and used to specify a number of iterations for at least one internal loop induction variable of the respective program code loop. The electronic device fuses the blocking loops into a fused loop by placing all of the blocking loops in the fused loop and replacing the blocking loop induction variables of the blocking loops with a fused loop induction variable that is incremented by the corresponding block size and used to specify the number of iterations for respective internal loop induction variables in the blocking loops.

Abstract: A method of operating a computing device includes a storage device receiving a request to execute an application instance, and executing the application instance at the storage device in response to the received request by the storage device. The application instance includes a plurality of storage instances connected with one another, and at least one of the plurality of storage instances is connected to a host device.

Abstract: In a data processing method, a method and device for adjusting the number of registers used in a running thread according to a situation are disclosed.

Abstract: A method and apparatus are disclosed for enhancing operable functionality of input source code files from a software program by identifying candidate code snippets from the plurality of input source code files that meet a similarity threshold measure for library functions stored in the system library and then identifying at least a first validated code snippet from the candidate code snippets that matches a first library function stored in the system memory on the basis of at least first and second matching metrics so that the developer is presented with a library function recommendation which includes the first validated code snippet, the first library function, and instructions for replacing the first validated code snippet with the first library function.

Abstract: A programmable controller capable of checking accessible signal addresses for each of ladder programs is provided. The programmable controller includes signal address setting extraction means for extracting an available address setting table from each of the ladder programs; a signal address overlap determination section for determining whether there is an overlap between the respective ranges of signal addresses used as signal write destinations by the ladder programs, based on the available address setting tables extracted by the signal address setting extraction means; and a ladder program execution section for executing the plurality of ladder programs if the signal address overlap determination section determines that there is no overlap between the respective ranges of signal addresses used as signal write destinations by the ladder programs.

Abstract: Systems and methods for branch rewriting device feature optimization are disclosed. An example method may include identifying, by a processing device of a computing device, an occurrence of a configuration change associated with a device driver of the computing device, responsive to identification of the configuration change, evaluating one or more devices supported by the device driver and installed on the computing device, determining, in view of the evaluating, that a feature is implemented by each of the one or more devices, the feature corresponding to a conditional branch of the device driver, and responsive to the determining, modifying the device driver to execute an unconditional branch corresponding the feature.

Abstract: A technique is provided for processing thread groups, each thread group having associated program code comprising a plurality of regions that each require access to an associated plurality of registers providing operand values for the instructions of that region. Capacity management circuitry is arranged, for a thread group having a region of the associated program code that is ready to be executed, to perform an operand setup process to reserve sufficient storage elements within an operand staging unit to provide the associated plurality of registers, and to cause the operand value for any input register to be preloaded into a reserved storage element allocated for that input register, an input register being a register whose operand value is required before the region can be executed. Scheduling circuitry selects for processing a thread group for which the operand setup process has been performed in respect of the region to be executed.

Abstract: A method of increasing a speed of operation of a computer via a metadata-based business rule interpreter. The method includes receiving, at a processor, user input defining a business rule. The method also includes translating, by the processor, the user input into a domain-specific language entirely consisting of metadata objects, wherein a translated syntax is formed, the translated syntax being an abstract syntax tree structure consisting of only the metadata objects. The method also includes executing, by the processor, an abstract syntax tree interpreter and taking as input into the abstract syntax tree interpreter the translated syntax. A compiler operation to generate computer code for implementing the business rule is avoided. Executing the abstract syntax tree interpreter produces a result in a browser without using executable code to achieve the result.

Abstract: A system and method for patching an application running in a computing system, the method comprising: in response to that there is a need to patch a first content and the first content has been in the memory, distinguishing between a new content and an old content, the new content being the patched first content, the old content being the first content that has been in the memory; and in response to that the new content is loaded to the memory, mapping to the new content a new process that needs to apply the first content, wherein the new process comprises a process that is started after loading the new content to the memory. An apparatus for patching an application is further disclosed. With the apparatus provided, it is possible to perform dynamic patching to a virtual machine or a physical machine without stopping a running process.

Abstract: Adaptive monitoring dynamically optimizes the monitoring frequency of metrics with respect to system constraints. One or more metrics are monitored. The monitoring includes receiving a value for the metric and evaluating the received metric value. If the evaluation is determined to affect one or monitoring parameters, or if an environment-based event occurs the metrics are adapted. Adapting metrics includes removing or adding a metric based on each metric's correlation to the affected monitoring parameter or environment based trigger. The frequencies of the metrics are optimized based on the available resources.

Abstract: The method includes automatic creation of mapping definitions. The method further includes analyzing an external data structure, wherein the external data structure has one or more elements. The method further includes determining a path length and a number of occurrences for each element of a first set of elements of the one or more elements. The method further includes generating at least one query statement for the first set of elements. The method further includes generating mapping definitions based, at least in part on the at least one generated query statement and the path length of each element of the first set of elements.

Abstract: An enhanced information assurance system may comprise an improved computer including a central processing unit (CPU) emulator configured to extend the available machine instruction set. The CPU emulator may be configured to emulate machine language instructions taken from a nonnative set of secure opcodes. The CPU emulator may ensure that instructions and data in random access memory (RAM) remain encrypted at all times when in RAM, for example by storing the instructions and data in CPU registers when decrypted on an as-needed basis.

Abstract: In one example implementation, a method for generating persistent pointers using non-volatile random access memory (NVRAM) compiler directives in a program for NVRAM based computing systems includes generating a program including modified variables. The modified variables include NVRAM compiler directives indicative of persistent pointer type. The method further includes generating assembly code, including persistent pointer enablers, using the program including the modified variables by a compiler.

Abstract: In one example, a graphics rendering subsystem may selectively link a set of graphic effect modules, such as shaders, to increase processing efficiency. The graphics rendering subsystem may execute a comparison of a performance attribute of a first pre-compiled graphic effect module with a linking criteria. The graphics rendering subsystem may link the first pre-compiled graphic effect module and a second pre-compiled graphic effect module at render-time in response to the performance attribute satisfying the linking criteria.

Abstract: A method and apparatus are disclosed for enhancing operable functionality of input source code files from a software program by identifying candidate code snippets from the plurality of input source code files that meet a similarity threshold measure for library functions stored in the system library and then identifying at least a first validated code snippet from the candidate code snippets that matches a first library function stored in the system memory on the basis of at least first and second matching metrics so that the developer is presented with a library function recommendation which includes the first validated code snippet, the first library function, and instructions for replacing the first validated code snippet with the first library function.

Abstract: A non-transitory computer-readable storage medium storing therein a compiler program for causing a computer to execute a procedure. The procedure includes copying a source program written in a parallel programming language to generate a plurality of optimization target programs corresponding to image numbers respectively; and repeatedly performing, for each of the optimization target programs, a first optimization that includes, substituting a function or a variable that indicates image number in the optimization target program with the image number, performing a constant propagation, deleting a conditional branch instruction having a condition under which a conditional statement is changed to a constant due to the constant propagation, and deleting a code that is not to be executed based on the conditional branch instruction.

Abstract: Techniques to patch a shader program after the shader has been compiled and/or while the shader is in an execution pipeline are described. The shader may be patched based on references to global constants in a global constant buffer. For example, the reference to the global constant buffer may be patched with the value of the global constant, conditional statements based on references to the global constant buffer may be replaced with unconditional statements based on the value of the global constant in the global constant buffer, to optimize the shader or increase computational efficiency of the shader.

Abstract: A mechanism is described for facilitating fast access and use of common data values relating to applications in parallel computing environments. A method of embodiments, as described herein, includes detecting a software application being hosted by a computing device, where the software application is further detected as accessing common data values. The method may further include determining whether access to the common data values is slow, and accessing an existing compiled program specific to the common data values at a database, if the access to the common data values is slow. The method may further include loading the existing compiled program to be executed by a processor at the computing device, where the existing compiled program to replace an originally compiled program.

Abstract: An apparatus and method is described herein for conditionally committing and/or speculative checkpointing transactions, which potentially results in dynamic resizing of transactions. During dynamic optimization of binary code, transactions are inserted to provide memory ordering safeguards, which enables a dynamic optimizer to more aggressively optimize code. And the conditional commit enables efficient execution of the dynamic optimization code, while attempting to prevent transactions from running out of hardware resources. While the speculative checkpoints enable quick and efficient recovery upon abort of a transaction. Processor hardware is adapted to support dynamic resizing of the transactions, such as including decoders that recognize a conditional commit instruction, a speculative checkpoint instruction, or both. And processor hardware is further adapted to perform operations to support conditional commit or speculative checkpointing in response to decoding such instructions.

Abstract: A system and method for accessing a native platform API is disclosed herein. The method includes serving the application code as a container on the server-side and instantiating a content of the code with a plurality of JavaScript calls, which allows APIs to access and retrieve information from the code and to process the content of the code.

Abstract: The method includes automatic creation of mapping definitions. The method further includes analyzing an external data structure, wherein the external data structure has one or more elements. The method further includes determining a path length and a number of occurrences for each element of a first set of elements of the one or more elements. The method further includes generating at least one query statement for the first set of elements. The method further includes generating mapping definitions based, at least in part on the at least one generated query statement and the path length of each element of the first set of elements.

Abstract: Systems and methods for improving the performance of mobile applications are disclosed. An exemplary method can include receiving a request for the application, where the request can include target device information. The method can also determine whether the application has been cached before. If the application has not been cached, the method can download the application as a bytecode and process the bytecode into the native code format, using an Ahead-of-time compiler. The method can also provide the application in the native code format to the target device over the network.

Abstract: A legacy machine-oriented language interface definition is received of a new module to be implemented, using an object-oriented language, to provide a new feature within a legacy machine-oriented language application that is executable within a legacy application execution platform. An object-oriented class definition and bridging code that interfaces the object-oriented class definition to the legacy machine-oriented language interface definition are generated. An updated version of the object-oriented class definition is received that includes object-oriented code that implements functionality of the new feature within the new module. A new executable version of the legacy machine-oriented language application is built.

Abstract: Embodiments of the present invention are operable to communicate a list of important shaders and their current best-known compilations to remote client devices over a communications network. Client devices are allowed to produce modified shader compilations by varying optimizations. If a client device produces a modified compilation that beats an important shader's current best-known compilation, embodiments of the present invention can communicate this new best-known shader compilation back to a host computer system. Furthermore, embodiments of the present invention may periodically broadcast the new best-known shader compilation back to client devices for possible further optimization or for efficient rendering operations using the best-known shader compilation.

Abstract: System and methods are provided for register allocation. An original code block and a target code block associated with a branch of an execution loop are determined. An original allocation of a plurality of physical registers to one or more original variables associated with the original code block is detected. A target allocation of the plurality of physical registers to one or more target variables associated with the target code block is determined. One or more temporary registers are selected from the plurality of physical registers based at least in part on the original allocation and the target allocation. The original allocation is changed to the target allocation using the selected temporary registers. Specifically, one or more instructions are generated to change the original allocation to the target allocation using the selected temporary registers. The instructions are executed using one or more processors.

Abstract: Systems, apparatuses, and methods for a hardware and software system to automatically decompose a program into multiple parallel threads are described. In some embodiments, the systems and apparatuses execute a method of original code decomposition and/or generated thread execution.

Abstract: Described are compiler algorithms that partition a compute shader program into maximal-size regions, called thread-loops. The algorithms may remove original barrier-based synchronization yet the thus-transformed shader program remains semantically equivalent to the original shader program (i.e., the transformed shader program is correct). Moreover, the transformed shader program is amenable to optimization via existing compiler technology, and can be executed efficiently by CPU thread(s). A Dispatch call can be load-balanced on a CPU by assigning single or multiple CPU threads to execute thread blocks. In addition, the number of concurrently executing thread blocks do not overload the CPU.

Abstract: Embodiments of the present invention provide a system and methods for detecting power bugs. In one embodiment, a computer-implemented method for analyzing a computer code includes generating a control flow graph for at least a portion of the computer code at a processor. The method further includes identifying power bugs by traversing the control flow graph if the control flow graph exits without performing a function call to deactivate power to any component of a device configured to execute computer executable instructions based on the computer code after performing a function call to activate power.

Abstract: A method, system, and computer usable program product for improved register allocation in a simultaneous multithreaded processor. A determination is made that a thread of an application in the data processing environment needs more physical registers than are available to allocate to the thread. The thread is configured to utilize a logical register that is mapped to a memory register. The thread is executed utilizing the physical registers and the memory registers.