Dynamic (i.e., Machine Or Object Level) Patents (Class 717/153)
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Patent number: 8620991Abstract: Technologies for enabling a continuation based runtime to accept or reject external stimulus and, in addition, to determine if an external stimulus may be valid for processing at a later point in execution.Type: GrantFiled: August 1, 2012Date of Patent: December 31, 2013Assignee: Microsoft CorporationInventors: Kenneth David Wolf, Justin David Brown, Karthik Raman, Nathan Christopher Talbert, Edmund Samuel Victor Pinto
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Patent number: 8621424Abstract: The subject matter disclosed herein relates to alter an expression of executable instructions via a compiler component for use in ranking of electronic documents.Type: GrantFiled: June 30, 2008Date of Patent: December 31, 2013Assignee: Yahoo! Inc.Inventors: Arun Kejariwal, Girish Vaitheeswaran, Sapan Panigrahi
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Patent number: 8621449Abstract: There is provided an autonomic software system and method for normalizing a profile collected for an executing application to account for one or more actions applied to the executing application after the profile was collected, comprising: predicting an impact of applying the one or more actions to the executing application by utilizing the profile and the one or more actions; and adjusting the profile to form a normalized profile according to the predicted impact. A plurality of different a profile consumers, such as, a phase shift detector, an action evaluator as well as a normalizing controller, may utilize the normalized profile to improve the behavior of the executing application. In addition, online visualization tools may be implemented to graphically depict the normalized profiles, as well as differences between the collected profiles and the normalized profiles.Type: GrantFiled: June 12, 2008Date of Patent: December 31, 2013Assignee: International Business Machines CorporationInventors: Michael J. Hind, Peter F. Sweeney
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Publication number: 20130339936Abstract: Program code in a dynamic language is executed through a dynamic execution module that includes an execution context and an execution codebase. The instructions of the program code are translated into machine code that is stored in the execution codebase, and the execution context tracks the runtime state and persistent state of the program through executions and across executions. Using the execution codebase and the execution context the dynamic execution module minimizes duplicative machine code generation, while preserving the dynamic aspects of the program.Type: ApplicationFiled: June 18, 2012Publication date: December 19, 2013Applicant: TALARIA TECHNOLOGIES, INC.Inventors: Solomon Boulos, Jeremy Sugerman
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Publication number: 20130339935Abstract: The subject disclosure is directed towards a technology by which a program configured as a set of components has its components executed on different nodes of a distributed computer system. A selected node for executing a component is determined by an execution fabric decision mechanism based upon current resource state/capabilities and metadata associated with the component that specifies desired resource-related capabilities for the component. The execution of the component may be moved to a different node to meet the desired resource-related capabilities.Type: ApplicationFiled: June 14, 2012Publication date: December 19, 2013Applicant: MICROSOFT CORPORATIONInventor: Tamir Melamed
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Patent number: 8612950Abstract: A method and apparatus for dynamic optimization of strong atomicity barriers is herein described. During runtime compilation, code including non-transactional memory accesses that are to conflict with transactional memory accesses is patched to insert transactional barriers at the conflicting non-transactional memory accesses to ensure isolation and strong atomicity. However, barriers are omitted or removed from non-transactional memory accesses that do not conflict with transactional memory accesses to reduce barrier execution overhead.Type: GrantFiled: June 19, 2008Date of Patent: December 17, 2013Assignee: Intel CorporationInventors: Tatiana Shpeisman, Vijay Menon, Ali-Reza Adl-Tabatabai
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Patent number: 8612951Abstract: A method of determining which computer program functions are changed by a source code modification to a computer program's source code. The method includes compiling the computer program's source code, using a compiler that generates a relocation entry for each program access to a program function or a program data item. The method further includes compiling source code resulting from modifying the computer program's source code with the source code modification, using a compiler that generates a relocation entry for each program access to a program function or a program data item The method further includes constructing a list of object code differences by comparing the compiled source code, and excluding from the list specified object code differences.Type: GrantFiled: April 21, 2009Date of Patent: December 17, 2013Assignee: Oracle International CorporationInventor: Jeffrey Brian Arnold
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Patent number: 8612957Abstract: A computer implemented method for scheduling multithreaded programming instructions based on the dependency graph wherein the dependency graph organizes the programming instruction logically based on blocks, nodes, and super blocks and wherein the programming instructions could be executed outside of a critical section may be executed outside of the critical section by inserting dependency relationship in the dependency graph.Type: GrantFiled: January 26, 2006Date of Patent: December 17, 2013Assignee: Intel CorporationInventors: Xiaofeng Guo, Jinquan Dai, Long Li
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Patent number: 8607208Abstract: An object code hot update system generates hot updates for patching running programs by analyzing upstream post-patch code, augmenting the upstream post-patch code to provide augmented post-patch code with additional initialization functionality. The system further provides techniques to identify a candidate extra-change site in upstream post-patch code and modify the upstream post-patch code to generate a hot update.Type: GrantFiled: November 5, 2010Date of Patent: December 10, 2013Assignee: Oracle International CorporationInventors: Jeffrey Brian Arnold, Timothy Good Abbott, Anders Kaseorg
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Publication number: 20130311981Abstract: Method, program and system for code optimization. The method includes detecting a sign assignment instruction having an input operand and an output operand identical in size to each other. Analyzing and determining whether a value of the input operand results from an add or subtract operation and if the value is greater than the value prior to the operation. If so then removing the sign assignment instruction on the condition that the input operand and the output operand of the sign assignment instruction have their addresses identical to each other and replacing the sign assignment instruction with a copy instruction for copying the value of the input operand of the sign assignment instruction to a value of the output operand on the condition that the addresses of the input operand and the output operand of the sign assignment instruction are not identical and do not overlap each other.Type: ApplicationFiled: May 14, 2013Publication date: November 21, 2013Applicant: International Business Machines CorporationInventor: Motohiro Kawahito
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Patent number: 8589388Abstract: A request to access a web page may be received from a user device. The web page includes a dynamic information portion and a static information portion. A filename is assigned to a static file that is associated with the static information portion of the web page. The filename may be formed at least in part from a timestamp associated with the static file. In response to the request, a dynamic file that is associated with the dynamic information portion of the web page may be sent to the user device. The dynamic file references the static file using the filename, and the timestamp included in the filename enables the user device to determine whether the static information portion of the web page is accessible at the user device.Type: GrantFiled: February 2, 2011Date of Patent: November 19, 2013Assignee: AT&T Intellectual Property I, L.P.Inventors: Duane E. Tiemann, Susan A. Hall
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Patent number: 8589899Abstract: A system, method and article of manufacture of increasing access speed of frequently accessed variables (symbols) in a dynamic language program. The system includes a range identifying unit to identify a range for communizing symbol accesses in the program; an instruction generating unit to generate instructions to access a symbol table using a key, to get an address of a symbol entry, and to store the address; an instruction extracting unit to fetch instructions from the identified range; and an instruction judging unit to determine whether or not each of the fetched instructions is an instruction to access the symbol. If the fetched instruction is an instruction to access the symbol, and the symbol is present when generating an instruction to access the symbol by using an address of the stored symbol entry, an instruction is generated allowing access to the symbol without checking whether the symbol is present.Type: GrantFiled: August 31, 2011Date of Patent: November 19, 2013Assignee: International Business Machines CorporationInventor: Kazuaki Ishizaki
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Publication number: 20130305230Abstract: An optimization apparatus includes an insertion unit inserting a method test for each of the virtual methods included in a code sequence, an acquisition unit acquiring one or more profiled run-time classes of a receiver object used for calling each of the virtual methods at execution of the code sequence into which the method tests have been inserted, and an optimization unit inserting, in place of the inserted method test, a class test that sets a recording-time class and the run-time class of a corresponding receiver object as classes to be permitted on condition that the run-time class of the corresponding receiver object has successfully called all virtual methods requesting the method test for the receiver object.Type: ApplicationFiled: May 3, 2013Publication date: November 14, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: INTERNATIONAL BUSINESS MACHINES CORPORATION
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Patent number: 8584106Abstract: A runtime system implemented in accordance with the present invention provides an application platform for parallel-processing computer systems. Such a runtime system enables users to leverage the computational power of parallel-processing computer systems to accelerate/optimize numeric and array-intensive computations in their application programs. This enables greatly increased performance of high-performance computing (HPC) applications.Type: GrantFiled: February 9, 2012Date of Patent: November 12, 2013Assignee: Google Inc.Inventors: Matthew N. Papakipos, Brian K. Grant, Christopher G. Demetriou, Morgan S. McGuire
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Patent number: 8578352Abstract: A capability for limited customization that utilizes existing virtual dispatch table technology and allows selective customization is provided. Such a capability combines the usage of virtual dispatch tables with both customized and non-customized code to reduce, or even eliminate over-customization. Further, such a capability may employ a runtime system that decides what methods to customize based on several factors including, but not limited to the size of a class hierarchy, the amount of available space for compiled code, and the amount of available time for compilation.Type: GrantFiled: March 31, 2011Date of Patent: November 5, 2013Assignee: Google, Inc.Inventors: Srdjan Mitrovic, Lars Bak
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Patent number: 8578355Abstract: Techniques and systems for scenario based optimization can include generating multiple different versions of a program segment based on different respective execution scenarios associated with an execution of a program, the program operable to use the program segment versions. In another aspect, techniques and systems can include executing a program executable associated with multiple different versions of a program segment, analyzing the execution for an indication of at least one of the execution scenarios to select one of the program segment versions based on the indication, and causing the execution to use the selected program segment version during at least a portion of the execution.Type: GrantFiled: March 19, 2010Date of Patent: November 5, 2013Assignee: Google Inc.Inventors: Jason Mars, Robert Hundt
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Patent number: 8572682Abstract: An embodiment includes a computer-implemented method of managing access control policies on a computer system having two high-level programming language environments. The method includes managing, by the computer system, a structured language environment. The method further includes managing, by the computer system, a dynamic language environment within the structured language environment. The method further includes receiving a policy. The policy is written in a dynamic language. The method further includes storing the policy in the dynamic language environment. The method further includes converting the policy from the dynamic language environment to the structured language environment. The method further includes generating a runtime in the structured language environment that includes the policy.Type: GrantFiled: December 21, 2009Date of Patent: October 29, 2013Assignee: SAP AGInventor: Yuecel Karabulut
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Patent number: 8572593Abstract: Simplifying determination of whether application specific parameters are setup for optimal performance of associated applications. In an embodiment, a monitor program associated with an application specific parameter is identified and executed to cause retrieval of a current value of the parameter. The retrieved current value is then compared with a recommended value for the parameter to determine whether the parameter is setup for optimal performance of the application. The result of comparison may be displayed to the user. Another aspect provides for downloading of the recommended values and the monitor programs associated with application specific parameters from an external system (such as a vendor system). One more aspect enables the user to execute a correction program to correct the value of the parameter for optimal performance of the application.Type: GrantFiled: September 11, 2007Date of Patent: October 29, 2013Assignee: Oracle International CorporationInventor: Venkata Naga Ravikiran Vedula
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Patent number: 8561040Abstract: In embodiments, prior to compilation into machine code, a preprocessor generates directives by processing a source code and/or bytecode representation of a program and/or selecting default directives. The preprocessor embeds the directives in a bytecode representation of the program or a separate stream associated with the bytecode representation of the program. A just-in-time compiler may compile the bytecode representation into machine code directed by the embedded directives in one pass and/or a bytecode interpreter may interpret the bytecode representation of the program. In some embodiments, a computing device generates bytecodes during execution of a program, selects default directives, and embeds the default directives in the bytecodes or a separate stream associated with the bytecodes prior to compilation of the bytecodes into machine code.Type: GrantFiled: March 10, 2009Date of Patent: October 15, 2013Assignee: Oracle America, Inc.Inventor: John Robert Rose
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Patent number: 8555268Abstract: Solving combinatorial optimisation problems using dynamic programming involves automating the integration of bounds propagation into compilation of a dynamic program. This is done by extracting bounds from partial results obtained during dynamic programming, and tightening the bounds throughout execution of the dynamic program. This dramatically reduces the number of “good” solutions that need to be constructed at each stage, improving speed and scalability of algorithms using such dynamic programming.Type: GrantFiled: August 15, 2008Date of Patent: October 8, 2013Assignee: National ICT Australia LimitedInventors: Jakob Puchinger, Peter Stuckey
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Patent number: 8555035Abstract: One embodiment of the present invention sets forth a technique for using a multi-bank register file that reduces the size of or eliminates a switch and/or staging registers that are used to gather input operands for instructions. Each function unit input may be directly connected to one bank of the multi-bank register file with neither a switch nor a staging register. A compiler or register allocation unit ensures that the register file accesses for each instruction are conflict-free (no instruction can access the same bank more than once in the same cycle). The compiler or register allocation unit may also ensure that the register file accesses for each instruction are also aligned (each input of a function unit can only come from the bank connected to that input).Type: GrantFiled: July 7, 2010Date of Patent: October 8, 2013Assignee: NVIDIA CorporationInventors: Anjul Patney, William J. Dally
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Patent number: 8554807Abstract: A technique for incrementally unloading classes using a region-based garbage collector is described. One aspect of such a technique includes maintaining a remembered set for a class set. The remembered set indicates whether instances of the class set are contained in one or more regions in memory, and in which regions the instances are contained. Upon performing an incremental garbage collection process for a subset of the regions in memory, the technique examines the remembered set to determine whether the class set includes instances in regions outside of the subset. If the remembered set indicates that the class set includes instances outside of the subset of regions, the technique identifies the class set as “live.” This will preclude unloading the class set from the subset of regions.Type: GrantFiled: March 28, 2012Date of Patent: October 8, 2013Assignee: International Business Machines CorporationInventors: Peter Wiebe Burka, Jeffrey Michael Disher, Daryl James Maier, Aleksandar Micic, Ryan Andrew Sciampacone
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Patent number: 8555264Abstract: A system and method for efficient compilation and invocation of function type calls in a virtual machine (VM), or other runtime environment, and particularly for use in a system that includes a Java Virtual Machine (JVM). The system comprises a virtual machine for executing a software application; a memory space for the application byte code comprising callsites generated using a function type carrier; a bytecode to machine code compiler which performs MethodHandle invocation optimizations; a memory space for the compiled machine code; and a memory space for storing software objects as part of the software application. The system enables carrying the function type from the original MethodHandle to a callsite in the generated bytecode, including maintaining generics information for a function type acquired from a target function, and generating a callsite based on the generics information for the function object invocation.Type: GrantFiled: January 14, 2011Date of Patent: October 8, 2013Assignee: Oracle International CorporationInventor: Fredrik Ohrstrom
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Patent number: 8555267Abstract: A mechanism for performing register allocation based on priority spills and assignments is disclosed. A method of embodiments of the invention includes repetitively detecting fat points during a compilation process of a software program running on a virtual machine of a computer system, each fat point representing a program point having a high register pressure, the high register pressure occurs when a number of live program variables of the software program living at a given program point of the software program is greater than a number of available processor registers of the computer system. The method further includes choosing a fat point with a highest register pressure, selecting a live program variable having a lowest priority at the chosen fat point, and spilling the lowest priority live program variable to memory of the computer system.Type: GrantFiled: March 3, 2010Date of Patent: October 8, 2013Assignee: Red Hat, Inc.Inventor: Vladimir Makarov
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Patent number: 8549504Abstract: An apparatus and method is described herein for conditionally committing and/or speculative checkpointing transactions, which potentially results in dynamic resizing of transactions. During dynamic optimization of binary code, transactions are inserted to provide memory ordering safeguards, which enables a dynamic optimizer to more aggressively optimize code. And the conditional commit enables efficient execution of the dynamic optimization code, while attempting to prevent transactions from running out of hardware resources. While the speculative checkpoints enable quick and efficient recovery upon abort of a transaction. Processor hardware is adapted to support dynamic resizing of the transactions, such as including decoders that recognize a conditional commit instruction, a speculative checkpoint instruction, or both. And processor hardware is further adapted to perform operations to support conditional commit or speculative checkpointing in response to decoding such instructions.Type: GrantFiled: September 25, 2010Date of Patent: October 1, 2013Assignee: Intel CorporationInventors: Mauricio Breternitz, Jr., Youfeng Wu, Cheng Wang, Edson Borin, Shiliang Hu, Craig B. Zilles
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Patent number: 8549503Abstract: Dangling pointers and memory leak locations within software are detected. As the software allocates and deallocates memory, lists of pointers referencing the memory, and pointer status, are maintained. As the software writes new addresses within pointers and reads addresses referenced by the pointers, the pointer lists are maintained to determine whether the pointers are dangling and to detect memory leak locations. A balanced binary tree having a number of nodes can be maintained. The nodes represent heap or stack records. Each heap record corresponds to heap memory that has been allocated and has a list of pointers referencing the heap memory. Each stack record corresponds to a stack within which a stack frame is allocated each time a function is entered. The stack record has frame records corresponding to the stack frames. Each frame record has a list of pointers referencing the corresponding stack frame.Type: GrantFiled: April 17, 2012Date of Patent: October 1, 2013Assignee: International Business Machines CorporationInventor: Satish Chandra Gupta
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Patent number: 8543993Abstract: A compiler compiling a source code and is implemented in a plurality of processor cores includes a parallel loop processing detection unit configured to detect from the source code a loop processing code for execution of an internal processing operation for a given number of repeating times, and an independent parallel loop processing code in the internal processing operation performed for each repetition to be concurrently processed, and a dynamic parallel conversion unit configured to generate a control core code for control of the number of repeating times in the parallel loop processing code and a parallel processing code for changing the number of repeating times corresponding to the control from the control core code.Type: GrantFiled: March 18, 2010Date of Patent: September 24, 2013Assignee: Fujitsu LimitedInventor: Koichiro Yamashita
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Patent number: 8543991Abstract: Idle processor cores can be used to compile methods that are likely to be executed by a program based on profile data that is captured during one or more previous executions. Methods that are determined by the profile data to be likely to be used can be compiled eagerly on one or more background threads. Transparency can be achieved by ensuring that module load order is not altered because of the background threads by recording the state of loaded modules after each profiled compilation, persisting that data, and waiting to eagerly compile a method until the method to be compiled and all its dependencies has been loaded by the executing program.Type: GrantFiled: March 10, 2011Date of Patent: September 24, 2013Assignee: Microsoft CorporationInventors: Subramanian Ramaswamy, David Hiniker-Roosa, Feng Yuan, Sedar Gokbulut, Ashok C. Kamath, Jan Kotas, Vance P. Morrison
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Patent number: 8539464Abstract: A method of performing distributed just-in-time compilation includes sending a first request message from a client platform to a dedicated compilation server requesting just-in-time compilation of a bytecode sequence generated from a set of code for a source program executing on the client platform; compiling the bytecode sequence at the compilation server into a set of machine code instructions executable by the client platform; storing the set of machine code instructions in a repository managed by the dedicated compilation server; sending a notification message indicating that the set of machine code instructions are available from the dedicated compilation server to the client platform; sending a second request message from the client platform to the dedicated compilation server requesting the set of machine code instructions; and accessing the repository to send the set of machine code instructions from the dedicated compilation server to the client platform.Type: GrantFiled: October 30, 2008Date of Patent: September 17, 2013Assignee: International Business Machines CorporationInventors: Ian O Partridge, Adam J Pilkington, David S Renshaw, Simon Charles Edward Rowland
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Patent number: 8533686Abstract: Embodiments of the present invention provide a system profiler that can be used on any processor architecture. In particular, instead of copying an entire stack every time, the stack is divided into blocks of a fixed size. For each block, a hash value is computed. As stack blocks are sent out of the kernel, the hash value and a copy of the block contents is kept in a user space cache. In the kernel, the hash codes of sent stack blocks are tracked in a table. During system profiling, the kernel module sampling the call stack determines if that stack block was previously sent by checking for the hash value in the kernel table. If the hash matches an entry in the kernel table, then only the hash value is sent. If the hash value is not in the table, the entire block and the hash value is sent.Type: GrantFiled: June 14, 2007Date of Patent: September 10, 2013Assignee: Red Hat, Inc.Inventor: Kristian Hoegsberg Kristensen
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Patent number: 8533665Abstract: A computer-implemented method is disclosed for generating Dojo-conforming JavaScript Object Notation (JSON) objects for base objects of an object-oriented programming environment that have been annotated to denote which attribute declarations of the base object correspond to identified Dojo attributes. In a Java class, for example, annotations may be made to indicate which class attributes correspond to the identifier attribute of a Dojo JSON object and based on those annotations a Dojo-conforming JSON object may be generated.Type: GrantFiled: November 16, 2009Date of Patent: September 10, 2013Assignee: Cisco Technology, Inc.Inventors: Limin Yu, Inderpreet Bhullar, Mukesh Garg
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Patent number: 8516454Abstract: A computing method includes accepting a definition of a computing task (68), which includes multiple atomic Processing Elements (PEs—76) having execution dependencies (80). Each execution dependency specifies that a respective first PE is to be executed before a respective second PE. The computing task is compiled for concurrent execution on a multiprocessor device (32), which includes multiple processors (44) that are capable of executing a first number of the PEs simultaneously, by arranging the PEs, without violating the execution dependencies, in an invocation data structure (90) including a second number of execution sequences (98) that is greater than one but does not exceed the first number. The multiprocessor device is invoked to run software code that executes the execution sequences in parallel responsively to the invocation data structure, so as to produce a result of the computing task.Type: GrantFiled: June 30, 2009Date of Patent: August 20, 2013Assignee: Rocketick Technologies Ltd.Inventors: Shay Mizrachi, Uri Tal, Tomer Ben-David
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Patent number: 8516464Abstract: A computer system and a method are disclosed for use in automatically deploying an application program to execute with one or more library resources. The computer system includes a deployment unit which deploys the application program into a runtime execution environment. When a predetermined trigger condition is detected, the deployment unit clones a first library resource to create a clone, transforms the application to depend upon the clone and resolves the dependencies of the application using the clone. In one embodiment, the trigger condition relates to a pinning situation, whereby a library upon which the application program depends cannot be wired to the application program to resolve the dependency. Here, the clone now satisfies that dependency. In another embodiment, the trigger condition is a mandatory cloning property that requires the library to be cloned. The mandatory cloning property may also be user-specified through a user interface.Type: GrantFiled: October 29, 2009Date of Patent: August 20, 2013Assignee: Gopivotal, Inc.Inventors: Rob Harrop, Glyn Normington, Adrian Mark Colyer
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Patent number: 8516441Abstract: A software optimization device includes performance data storage unit to store data indicating performance of each system call, corresponding to a plurality of system calls, system call extraction unit to extract a system call described in a program source and similar-system-call detection unit to detect, from among the system calls the data indicating the performance of which is stored in the performance data storage unit, a system call having a function similar to that of the system call extracted by the system call extraction unit and having a performance better than that of the extracted system call.Type: GrantFiled: August 27, 2009Date of Patent: August 20, 2013Assignee: Fujitsu Semiconductor LimitedInventors: Masaomi Teranishi, Kenji Suzuki
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Patent number: 8516460Abstract: Methods, apparatuses, and computer program products for real-time temperature sensitive machine level code compilation and execution are provided. Embodiments include compiling and executing, by a just-in-time (JIT) compiler, machine level code; during execution of the machine level code, determining, by the JIT compiler, an execution temperature for the machine level code, including reading temperature measurements from one or more processor temperature sensors; based on the determined execution temperature, identifying, by the JIT compiler, a portion of the machine level code that, when executed, caused temperature measurements of one or more processor temperature sensors to exceed a predetermined threshold temperature; recompiling, by the JIT compiler, the machine level code including modifying the identified portion to generate a new execution temperature that is lower than the previously determined execution temperature; and executing, by the JIT compiler, the recompiled machine level code.Type: GrantFiled: August 2, 2011Date of Patent: August 20, 2013Assignee: International Business Machines CorporationInventors: Cary L. Bates, Nicholas P. Johnson, Justin K. King
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Patent number: 8516229Abstract: A test code generation technique that replaces instructions having a machine state dependent result with special redirection instructions provides generation of test code in which state dependent execution choices are made without a state model. Redirection instructions cause execution of a handler than examines the machine state and replaces the redirection instruction with a replacement instruction having a desired result resolved in accordance with the current machine state. The instructions that are replaced may be conditional branch instructions and the result a desired execution path. The examination of the machine state permits determination of a branch condition for the replacement instruction so that the next pass of the test code executes along the desired path. Alternatively, the handler can execute a jump to the branch instruction, causing immediate execution of the desired branch path.Type: GrantFiled: February 5, 2010Date of Patent: August 20, 2013Assignee: International Business Machines CorporationInventors: Allon Adir, Brad Lee Herold, John Martin Ludden, Pedro Martin-de-Nicolas, Charles Leverett Meissner, Gil Eliezer Shurek
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Patent number: 8510727Abstract: Duplicative code found in modules of high level computer code can be eliminated at link-time. A compiler forms a plurality of object files from a software program in which each object file includes one or more functions associated with the software program. An analyzer examines each function to ascertain whether any of the plurality of object files include functional duplicates. In addition, call and caller routing references are determined for each of the object files and functions contained therein. Responsive to determining that a functional equivalence exists, the routing of duplicative functions is altered to reference a golden copy of the same function. Once the call and caller information has been re-routed, the duplicative function(s) is(are) deleted.Type: GrantFiled: March 18, 2008Date of Patent: August 13, 2013Assignee: Oracle America, Inc.Inventors: Sheldon M. Lobo, Fu-Hwa Wang
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Patent number: 8495605Abstract: A method for policy-based program optimization of existing software code is performed where the code is segmented into code modules. The optimization is based on a performance policy that defines a target characteristic and a sacrificial characteristic relating to the existing software code and further defines an allowable degradation of the sacrificial characteristic resulting from optimization of the target characteristic. This method may include identifying code modules that contribute to suboptimal performance of the software code with respect to the target characteristic; identifying code transformations that increase performance of the suboptimal code modules with respect to the target characteristic; and optimizing the identified code modules by selectively applying the code transformations in accordance with the performance policy to increase performance of the software code with respect to the target characteristic.Type: GrantFiled: June 16, 2008Date of Patent: July 23, 2013Assignee: International Business Machines CorporationInventors: Neeraj Joshi, David L. Kaminsky
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Patent number: 8489653Abstract: A technique for incrementally unloading classes using a region-based garbage collector is described. One aspect of such a technique includes maintaining a remembered set for a class set. The remembered set indicates whether instances of the class set are contained in one or more regions in memory, and in which regions the instances are contained. Upon performing an incremental garbage collection process for a subset of the regions in memory, the technique examines the remembered set to determine whether the class set includes instances in regions outside of the subset. If the remembered set indicates that the class set includes instances outside of the subset of regions, the technique identifies the class set as “live.” This will preclude unloading the class set from the subset of regions.Type: GrantFiled: February 8, 2011Date of Patent: July 16, 2013Assignee: International Business Machines CorporationInventors: Peter Wiebe Burka, Jeffrey Michael Disher, Daryl James Maier, Aleksandar Micic, Ryan Andrew Sciampacone
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Patent number: 8489920Abstract: The invention includes a computerized method responding to a navigation cue from a user by saving the writable state of the application and directing the computer through the window operating system to perform the navigation task 36 indicated by the navigation cue. The invention includes the following, which will each be discussed in turn. An alteration mechanism including means for altering window operating system by altering the hook triggered by each navigation cue to integrate saving the writable state. The window operating system integrating response to each navigation cue and saving the writable state. Source code artifacts which can be installed to implement navigation cues triggering saving the writable state. A business method generating revenue for a business entity.Type: GrantFiled: December 20, 2005Date of Patent: July 16, 2013Assignee: i-Cue Design, Inc.Inventor: Jan Rippingale
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Patent number: 8484376Abstract: A message directed to a first version of a service is received at a content based router in a distributed computing system. The message is transmitted to a second version of the service instead of the first version of the service if the message is compatible with the second version of the service. The message is transmitted to the first version of the service if the message is not compatible with the second version of the service.Type: GrantFiled: October 31, 2007Date of Patent: July 9, 2013Assignee: Red Hat, Inc.Inventor: Mark Cameron Little
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Patent number: 8479180Abstract: Disclosed is a system and method for maintaining software instructions stored in a wireless communications device memory. The software is organized using code sections, where each code section is in a contiguous portion of memory and relocatable independently of other code sections. Maintenance includes the ability to run a unique software component called a compactor while the normal system is not in executable form. The compactor expands, compresses, and relocates code sections to allow downloaded code to be incorporated into the system code base.Type: GrantFiled: October 23, 2006Date of Patent: July 2, 2013Assignee: KYOCERA CorporationInventors: Gowri Rajaram, Diego Kaplan
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Patent number: 8473935Abstract: Pre-compiling postdominating functions. Some embodiments may be practiced in a computing environment including a runtime compilation. For example one method includes acts for compiling functions. The method includes determining that a function of an application has been called. A control flow graph is used to determine one or more postdominance relationships between the function and one or more other functions. The one or more other functions are assigned to be pre-compiled based on the postdominance relationship.Type: GrantFiled: April 21, 2008Date of Patent: June 25, 2013Assignee: Microsoft CorporationInventor: Matthew B. Grice
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Patent number: 8468508Abstract: An optimizing compiler device, a method, a computer program product which are capable of performing parallelization of irregular reductions. The method for performing parallelization of irregular reductions includes receiving, at a compiler, a program and selecting, at compile time, at least one unit of work (UW) from the program, each UW configured to operate on at least one reduction operation, where at least one reduction operation in the UW operates on a reduction variable whose address is determinable when running the program at a run-time. At run time, for each successive current UW, a list of reduction operations accessed by that unit of work is recorded. Further, it is determined at run time whether reduction operations accessed by a current UW conflict with any reduction operations recorded as having been accessed by prior selected units of work, and assigning the unit of work as a conflict free unit of work (CFUW) when no conflicts are found.Type: GrantFiled: October 9, 2009Date of Patent: June 18, 2013Assignee: International Business Machines CorporationInventors: Alexandre E. Eichenberger, Yangchun Luo, John K. O'Brien, Xiaotong Zhuang
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Patent number: 8464217Abstract: Improvements to object-oriented programming methods allow programmers to direct execution of dynamically generated, parallel computing tasks on variety of platforms. Data objects provide their data location information handle, plurality of which can be combined by arithmetic operations, thus providing application specific, computing platform non-specific method to inform executing environment about data needed for each programming object. During execution this information is used to produce platform specific data structure to aid in optimal processing node assignment. A new calling method greatly reduces data exchanges between objects running as separate tasks. These improvements are particularly well suited to programming method and computing machine presented by parent of this divisional patent application.Type: GrantFiled: October 20, 2010Date of Patent: June 11, 2013Inventor: Slawomir Adam Janczewski
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Publication number: 20130139134Abstract: An illustrative embodiment for serialization of pre-initialized objects receives a source code definition of a class, identifies a set of constants associated with the class in the source code to form a set of identified constants, creates a result object corresponding to each constant in the set of identified constants, and compiles the source code into a compiled form of the class. The illustrative embodiment further serializes each result object into a resource file associated with the class to form a set of serialized objects and replaces, in the compiled form of the class, each reference to a respective constant associated with the class from the set of identified constants with a corresponding dynamic instruction using a respective serialized object in the set of serialized objects.Type: ApplicationFiled: August 20, 2012Publication date: May 30, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Peter W. Burka, Daniel J. Heidinga, Karl M. Taylor, Olivier P. Thomann
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Patent number: 8453128Abstract: A method for implementing a just-in-time compiler involves obtaining high-level code templates in a high-level programming language, where the high-level programming language is designed for compilation to an intermediate language capable of execution by a virtual machine, and where each high-level code template represents an instruction in the intermediate language. The method further involves compiling the high-level code templates to native code to obtain optimized native code templates, where compiling the high-level code templates is performed, prior to runtime, using an optimizing static compiler designed for runtime use with the virtual machine. The method further involves implementing the just-in-time compiler using the optimized native code templates, where the just-in-time compiler is configured to substitute an optimized native code template when a corresponding instruction in the intermediate language is encountered at runtime.Type: GrantFiled: September 28, 2007Date of Patent: May 28, 2013Assignee: Oracle America, Inc.Inventors: Laurent Daynes, Bernd J. Mathiske, Gregory M. Wright, Mario I. Wolczko
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Patent number: 8448156Abstract: A runtime system implemented in accordance with the present invention provides an application platform for parallel-processing computer systems. Such a runtime system enables users to leverage the computational power of parallel-processing computer systems to accelerate/optimize numeric and array-intensive computations in their application programs. This enables greatly increased performance of high-performance computing (HPC) applications.Type: GrantFiled: February 27, 2012Date of Patent: May 21, 2013Assignee: Googe Inc.Inventors: Christopher G. Demetriou, Matthew N. Papakipos
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Patent number: 8443353Abstract: An apparatus and method is described herein for conditionally committing and/or speculative checkpointing transactions, which potentially results in dynamic resizing of transactions. During dynamic optimization of binary code, transactions are inserted to provide memory ordering safeguards, which enables a dynamic optimizer to more aggressively optimize code. And the conditional commit enables efficient execution of the dynamic optimization code, while attempting to prevent transactions from running out of hardware resources. While the speculative checkpoints enable quick and efficient recovery upon abort of a transaction. Processor hardware is adapted to support dynamic resizing of the transactions, such as including decoders that recognize a conditional commit instruction, a speculative checkpoint instruction, or both. And processor hardware is further adapted to perform operations to support conditional commit or speculative checkpointing in response to decoding such instructions.Type: GrantFiled: September 25, 2010Date of Patent: May 14, 2013Assignee: Intel CorporationInventors: Mauricio Breternitz, Jr., Youfeng Wu, Cheng Wang, Edson Borin, Shiliang Hu, Craig B. Zilles
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Publication number: 20130117736Abstract: Reactive programming is facilitated. Reactive expressions can be generated automatically from non-reactive expressions or in other words standard expressions. Additionally or alternatively, reactive expressions can be optimized in a number of different ways to minimize computational work.Type: ApplicationFiled: November 8, 2011Publication date: May 9, 2013Applicant: MICROSOFT CORPORATIONInventors: Bart De Smet, Henricus Johannes Maria Meijer