Optimization Patents (Class 717/151)
  • Patent number: 11954011
    Abstract: An apparatus and a method for executing a customized production line using an artificial intelligence development platform, a computing device and a computer readable storage medium are provided. The apparatus includes: a production line executor configured to generate a native form of the artificial intelligence development platform based on a file set, the native form to be sent to a client accessing the artificial intelligence development platform so as to present a native interactive page of the artificial intelligence development platform; and a standardized platform interface configured to provide an interaction channel between the production line executor and the artificial intelligence development platform. The production line executor is further configured to generate an intermediate result by executing processing logic defined in the file set and to process the intermediate result by interacting with the artificial intelligence development platform via the standardized platform interface.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: April 9, 2024
    Inventors: Yongkang Xie, Ruyue Ma, Zhou Xin, Hao Cao, Kuan Shi, Yu Zhou, Yashuai Li, En Shi, Zhiquan Wu, Zihao Pan, Shupeng Li, Mingren Hu, Tian Wu
  • Patent number: 11934816
    Abstract: Generation of an executable file derived from a parent executable file having ranges of physical addresses referencing a binary code of at least one core feature (CR), a binary code of a set of native features (F), bytecodes of a set of java features (Pkg), by selecting at least one native feature from the set of native features to be removed, defining the range of physical addresses where the binary code of the selected native feature is stored, selecting at least one java feature from the set of java features to be relocated, and relocating the bytecodes of said at least one selected java feature in the defined range of physical addresses.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: March 19, 2024
    Inventors: Damien Bertonnier, Nicolas Regnault, Valérie Martin
  • Patent number: 11934867
    Abstract: Warp sharding techniques to switch execution between divergent shards on instructions that trigger a long stall, thereby interleaving execution between diverged threads within a warp instead of across warps. The technique may be applied to mitigate pipeline stalls in applications with low warp occupancy and high divergence. Warp data cache locality may also be improved by concentrating memory accesses within a warp rather than spreading them across warps.
    Type: Grant
    Filed: February 24, 2021
    Date of Patent: March 19, 2024
    Assignee: NVIDIA CORP.
    Inventors: Sana Damani, Mark Stephenson, Ram Rangan, Daniel Robert Johnson, Rishkul Kulkarni
  • Patent number: 11922238
    Abstract: A parametric constant resolves to different values in different contexts, but a single value within a particular context. An anchor constant is a parametric constant that allows for a degree of parametricity for an API point. The context for the anchor constant is provided by a caller to the API point. The anchor constant resolves to an anchor value that records specialization decisions for the API point within the provided context. Specialization decisions may include type restrictions, memory layout, and/or memory size. The anchor value together with an unspecialized type of the API point result in a specialized type of the API point. A class object representing the specialized type is created. The class object may be accessible to the caller, but the full value of the anchor value is not accessible to the caller. The API point is executed based on the specialization decisions embodied in the anchor value.
    Type: Grant
    Filed: January 7, 2022
    Date of Patent: March 5, 2024
    Assignee: Oracle International Corporation
    Inventors: John Robert Rose, Brian Goetz
  • Patent number: 11914978
    Abstract: The present disclosure relates to systems and methods for code optimization. The methods include generating, based on a first macro of a user code, an assembly code corresponding to the user code. The first macro includes one or more parameters relating to one or more branch codes, and the assembly code includes assembly branch codes corresponding to the branch codes and jump codes corresponding to the assembly branch codes. The methods further include obtaining, based on a second macro of the user code, target information for identifying an execution condition of the one or more branch codes, and determining, based on the assembly code and the target information, a compiled user code. When being executed, the compiled user code may call, based on the target information, a procedure to determine a value of the execution condition. The procedure is configured to modify an execution flow of the compiled user code.
    Type: Grant
    Filed: August 19, 2023
    Date of Patent: February 27, 2024
    Inventor: Gaoyuan Qiu
  • Patent number: 11868118
    Abstract: An industrial automation component, a computer program and a computer-readable medium and method for configuring an industrial automation component, wherein at least one feature of the industrial automation component that is not configurable with an engineering system supporting the component, non-supported feature, is configured by interpreting a description of a configuration of the at least one non-supported feature with an on-board compiler of the component and integrating the interpreted description to a basic configuration having been generated with the engineering system and with respect to at least one further feature, supported feature, of the component.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: January 9, 2024
    Inventor: Holger Strobel
  • Patent number: 11860766
    Abstract: Methods and systems provide for a notebook interactive programming environment, having out-of-order code-cell execution, which communicates potential cell execution outcomes. If an event handler receives an event (e.g., open notebook, code change, code execution, etc.) for a cell, without a request for a specific type of analysis (e.g., data-leakage, stale-state), intra-cell analysis is executed based-on the cell's abstract semantics, and an abstract state and pre-summaries are output that indicate the cell's propagation dependency (unbounded variables). If an analysis is associated with the event, starting with the stored abstract state, inter-cell analysis is recursively executed on successor cells having propagation dependencies, until a terminating criteria is reached. Outcomes (e.g., affected cell, line number, bug type, metrics, etc.) are sent via the notebook user-interface to warn users, ahead of concrete code execution, of hypothetical unsafe or safe actions in executing the notebook's code cells.
    Type: Grant
    Filed: October 8, 2021
    Date of Patent: January 2, 2024
    Inventors: Pavle Subotić, Lazar Milikić, Milan Stojić
  • Patent number: 11853734
    Abstract: A processing system includes a compiler that automatically identifies sequences of instructions of tileable source code that can be replaced with tensor operations. The compiler generates enhanced code that replaces the identified sequences of instructions with tensor operations that invoke a special-purpose hardware accelerator. By automatically replacing instructions with tensor operations that invoke the special-purpose hardware accelerator, the compiler makes the performance improvements achievable through the special-purpose hardware accelerator available to programmers using high-level programming languages.
    Type: Grant
    Filed: May 10, 2022
    Date of Patent: December 26, 2023
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Gregory P. Rodgers, Joseph L. Greathouse
  • Patent number: 11847374
    Abstract: In a presentation control, another presentation request of another content is accepted from another application while presenting a content of one application, which content is preferentially presented is arbitrated based on a rule definition including: an attribute of the content that defines either a cancellation for withdrawing the presentation request or an on-standby without withdrawing the presentation request; and a constraint equation that defines an exception rule for defining a setting of the content that has lost arbitration as either the on-standby or the cancellation; and one of the contents arbitrated is presented to a presentation area.
    Type: Grant
    Filed: December 27, 2021
    Date of Patent: December 19, 2023
    Inventors: Daiki Kawashima, Shigeo Katoh, Kentaro Teshima, Keisuke Okamoto, Kazuya Ohtake, Hiroshi Majima, Kazuki Sasamoto
  • Patent number: 11842182
    Abstract: A non-transitory computer-readable recording medium stores a program for causing a computer to execute a process, the process includes extracting an optimization method and an optimization non-applicable condition indicating a reason why the optimization method is not applicable, from an optimization report created at a time of compiling software, determining an index value of optimization application easiness for each of a plurality of processing blocks included in the software, based on the optimization method and the optimization non-applicable condition, and determining an optimization target processing block to be optimized among the plurality of processing blocks included in the software, based on the index value.
    Type: Grant
    Filed: November 10, 2021
    Date of Patent: December 12, 2023
    Inventor: Eiji Ohta
  • Patent number: 11835988
    Abstract: A system and method for load fusion fuses small load operations into fewer, larger load operations. The system detects that a pair of adjacent operations are consecutive load operations, where the adjacent micro-operations refers to micro-operations flowing through adjacent dispatch slots and the consecutive load micro-operations refers to both of the adjacent micro-operations being load micro-operations. The consecutive load operations are then reviewed to determine if the data sizes are the same and if the load operation addresses are consecutive. The two load operations are then fused together to form one load micro-operation with twice the data size and one load data micro-operation with no load component.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: December 5, 2023
    Assignee: Advanced Micro Devices, Inc.
    Inventor: John M. King
  • Patent number: 11822899
    Abstract: Apparatus and methods are disclosed for performing block floating-point (BFP) operations, including in implementations of neural networks. All or a portion of one or more matrices or vectors can share one or more common exponents. Techniques are disclosed for selecting the shared common exponents. In some examples of the disclosed technology, a method includes producing BFP representations of matrices or vectors, at least two elements of the respective matrices or vectors sharing a common exponent, performing a mathematical operation on two or more of the plurality of matrices or vectors, and producing an output matrix or vector. Based on the output matrix or vector, one or more updated common exponents are selected, and an updated matrix or vector is produced having some elements that share the updated common exponents.
    Type: Grant
    Filed: November 20, 2019
    Date of Patent: November 21, 2023
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Ray Bittner, Alessandro Forin
  • Patent number: 11816217
    Abstract: Certain embodiments described herein relate to methods and systems for detecting unexpected behavior associated with a process. In certain embodiments, a method comprises receiving a memory allocation request, the request indicating one or more memory segments to be allocated in memory of a computing system. The method further comprises allocating the one or more memory segments in the memory based on the memory allocation request. The method further comprises allocating one or more decoy memory segments in the memory based on the memory allocation request. The method further comprises trapping an input/output (I/O) operation. The method further comprises detecting an unexpected behavior associated with the I/O operation based on determining that the I/O operation impacts at least one of the one or more decoy memory segments. The method further comprises performing one or more actions based on the detection.
    Type: Grant
    Filed: April 10, 2020
    Date of Patent: November 14, 2023
    Assignee: VMWARE, INC.
    Inventors: Ravi Jagannathan, Glen Robert Simpson
  • Patent number: 11755368
    Abstract: Systems and methods are disclosures for scheduling code in a multiprocessor system. Code is portioned into code blocks by a compiler. The compiler schedules execution of code blocks in nodes. The nodes are connected in a directed acyclical graph with a top node, terminal node and a plurality of intermediate nodes. Execution of the top node is initiated by the compiler. After executing at least one instance of the top node, an instruction in the code block indicates to the scheduler to initiate at least one intermediary node. The scheduler schedules a thread for execution of the intermediary node. The data for the nodes resides in a plurality of data buffers; the index to the data buffer is stored in a command buffer.
    Type: Grant
    Filed: August 8, 2021
    Date of Patent: September 12, 2023
    Assignee: Blaize , Inc.
    Inventors: Satyaki Koneru, Val G. Cook, Ke Yin
  • Patent number: 11748072
    Abstract: A data processing apparatus adapted to output recommendation information for modifying source code, includes: compiler circuitry to compile the source code and to output compiled code for the source code, processing circuitry to execute the compiled code, profile circuitry to monitor the execution of the compiled code by the processing circuitry and to generate profile information for the execution of the compiled code, the profile information including one or more statistical properties for the execution of the compiled code, and recommendation circuitry to output the recommendation information for the source code, the recommendation circuitry including a machine learning model to receive at least a portion of the profile information and trained to output the recommendation information for the source code in dependence upon one or more of the statistical properties, in which the recommendation information is indicative of one or more editing instructions for modifying the source code.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: September 5, 2023
    Assignee: Sony Interactive Entertainment Inc.
    Inventors: Fabio Cappello, Gregory James Bedwell, Daryl Cooper, Timothy Edward Bradley, Guy Moss
  • Patent number: 11704101
    Abstract: The present disclosure provides computer-executable tools which, implemented in a programming language library, may enable source code written using the library to be compiled to object code instrumented for function-level dynamic analysis of memory allocation functions. By tracking heap reads and writes of each target function, symbols may be mapped to memory addresses allocated therefor, and values of input arguments of functions may be mapped to values of output returns. Based on this information, pure functions which embody redundant computations across multiple executions thereof may be identified, while non-pure functions may be screened out.
    Type: Grant
    Filed: July 2, 2020
    Date of Patent: July 18, 2023
    Inventors: Pengcheng Li, Shasha Wen
  • Patent number: 11650803
    Abstract: Systems and methods of cyber hardening software by modifying one or more assembly source files. In some embodiments, the disclosed SME tool transparently and seamlessly integrates into the build process of the assembly source files being modified. For example, upon integration of the disclosed SME tool into the application's development environment, the modifications in the final executable are transparent to the developer and can support other cyber hardening techniques. The SME tool includes a preprocessing tool for identifying attributes (e.g., functions) associated with the assembly source file. The SME tool also includes a transformation tool for making modifications of the assembly source file. In some embodiments, the transformations correspond to applying one or more transformations to the attributes associated with the assembly source file.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: May 16, 2023
    Inventors: Erik Raymond Lotspeich, Shane Paulsen Fry, Doug Britton
  • Patent number: 11637918
    Abstract: Various systems and methods are provided for implementing a software defined industrial system. In an example, self-descriptive control applications and software modules are provided in the context of orchestratable distributed systems. The self-descriptive control applications may be executed by an orchestrator or like control device, configured to: identify available software modules adapted to perform functional operations in a control system environment; identify operational characteristics that identify characteristics of execution of the available software modules that are available to implement a control system application; select a software module for execution based on the operational configuration and the operational characteristics identified in the manifest; and cause the execution of the selected software module in the control system environment based on an application specification for the control system application.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: April 25, 2023
    Assignee: Intel Corporation
    Inventors: Mark Yarvis, Rita H. Wouhaybi, Ron Kuruvilla Thomas, Casey Rathbone, Aaron R. Berck, Sharad Garg, Robert Chavez, Kirk Smith, Mandeep Shetty, Xubo Zhang, Ansuya Negi
  • Patent number: 11615014
    Abstract: Provided are techniques for using relocatable debugging information entries to save compile time when there are changes to source code. While compiling source code, for an unchanged function, a copy is made of a relocatable debugging information entries table and of a relocation information table. In addition, for a changed function, a new relocatable debugging information entries table and a new relocation information table are generated. The copy of the relocatable debugging information entries table and the new relocatable debugging information entries table are merged. The copy of the relocation information table and the new relocation information table are merged. The relocatable debugging information entries in the merged relocatable debugging information entries table are resolved according to information in the merged relocation information table to generate relocated Debugging with Attributed Record Formats information, which is stored in an object file that corresponds to the source code.
    Type: Grant
    Filed: July 29, 2021
    Date of Patent: March 28, 2023
    Inventors: Zheng Chen, Jinsong Ji, Chaofan Qiu, Xiong Hu Luo
  • Patent number: 11609717
    Abstract: A distributed computing environment is provided with a system and method for supporting rare copy-on-write data access. The system operates a data structure in a read only pattern suitable for serving a plurality of read requests with reduced overhead. The system, upon receiving a write request, creates a copy of data to execute the write request. The system defers writing the mutated data back to the read-only data structure. The system thus allows for multiple mutations to be made to the copy of the data using a read/write access pattern. After a number of read-only requests are received, the mutated data is written back to the read-only data structure. A monitor counts read and write requests in order to reduce overall read/write overhead and enhance performance of the distributed data grid.
    Type: Grant
    Filed: October 5, 2021
    Date of Patent: March 21, 2023
    Inventor: Mark Falco
  • Patent number: 11599344
    Abstract: A computer system, designed according to a particular architecture, compiles and execute a general quantum program. Computer systems designed in accordance with the architecture are suitable for use with a variety of programming languages and a variety of hardware backends. The architecture includes a classical computer and a quantum device (which may be remote from the local computer) which includes both classical execution units and a quantum processing unit (QPU).
    Type: Grant
    Filed: September 3, 2020
    Date of Patent: March 7, 2023
    Assignee: Zapata Computing, Inc.
    Inventor: Yudong Cao
  • Patent number: 11593449
    Abstract: There are provided systems and methods for reducing computing calls for webpage load times and resources to reduce power usage and/or carbon footprints caused by repetitive navigations. A service provider, such as an online transaction processor, may provide computing services to users, which require computing devices of the users to interact with the service provider and load data on the computing devices, including webpages and application interfaces. Each of data loading event may have a cost, where repeating events may lead to unnecessary power usage, carbon emissions and/or a carbon footprint. A graph algorithmic process may utilize state diagrams of processing flows for data loading events with attributes for each data loading event to identify problematic repeated events. Once the problematic events are identified, the service provider may identify corrective actions to avoid or reduce the repetitive events, such as by merging data into one or more events.
    Type: Grant
    Filed: August 4, 2021
    Date of Patent: February 28, 2023
    Assignee: PAYPAL, INC.
    Inventor: Yash Bansal
  • Patent number: 11582326
    Abstract: Methods and systems are presented for providing a scalable communication framework for facilitating computing services to computer nodes across multiple availability zones. One or more communication servers act as a communication proxy for a processing server configured to perform the computing services. Upon receiving a service request from a computer node, the communication server establishes a synchronous communication session with the computer node. The communication server generates a request message and inserts the request message in a downstream queue accessible by the processing server. The processing server retrieves the request message from the downstream queue and performs the computing services based on the request message. Outputs from the computing services are encapsulated within a response message and then inserted in an upstream queue.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: February 14, 2023
    Assignee: PayPal, Inc.
    Inventors: Nikita Alekseyevich Lukyanenko, Alexander Y. Shvid
  • Patent number: 11500617
    Abstract: In some implementations, there is provided a method that includes generating a user interface to enable selection of configuration information and initiation of a build of an application instance; receiving, from the user interface, an indication to initiate the build of the application instance; assigning at least one slave node to build, based on the configuration information, the application instance; obtaining, from at least one repository, build information including at least one of a command script, a dataset, and an application instance template; generating, based on the build information, a container file; storing the container file; generating the container image and storing the container image; and executing the image to provide a container. Related systems and articles of manufacture are also disclosed.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: November 15, 2022
    Assignee: SAP SE
    Inventor: Thomas Coan
  • Patent number: 11403090
    Abstract: This application describes methods, systems, and apparatus, including computer programs encoded on computer storage media, of an AI-assisted compiler. An example method includes obtaining intermediate code and executable code generated by compiling a computer program with a compiler; determining a reward based on one or more traces obtained by executing the executable code in a runtime system; generating an embedding vector based on the intermediate code and the one or more traces to represent code execution states; determining, using a reinforcement learning agent, one or more optimization actions based on the embedding vector and the reward; and updating the compiler by applying the one or more optimization actions.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: August 2, 2022
    Inventors: Yuanwei Fang, Yen-kuang Chen
  • Patent number: 11403200
    Abstract: Systems, methods, and computer-readable for defining host functionalities in a computing environment include obtaining two or more snapshots comprising information pertaining to two or more processes executing in two or more hosts, the two or more snapshots being obtained at two or more points in time from the two or more hosts. One or more long-running processes amongst the two or more processes are identified based on one or more criteria associated with long-running processes. One or more priorities associated with the one or more long-running processes and used for defining functionalities for at least a subset of the two or more hosts, where high priorities are assigned to long-running processes, such as web server or database server processes, which are unique to at least the subset of the two or more hosts. Resources may be provisioned based on these host functionalities.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: August 2, 2022
    Inventors: Xin Liu, Sunil Gupta, Thanh Trung Ngo, Xuan Loc Bui, Hoang Viet Nguyen, Shashi Gandham, Navindra Yadav
  • Patent number: 11397747
    Abstract: A system and method for managing data storage and data access with querying data in a distributed system without buffering the results on intermediate operations in disk storage.
    Type: Grant
    Filed: October 31, 2020
    Date of Patent: July 26, 2022
    Assignee: Snowflake Inc.
    Inventors: Thierry Cruanes, Benoit Dageville, Allison Waingold Lee
  • Patent number: 11379195
    Abstract: During source code compilation to a first processor instruction set architecture (ISA), a compiler encounters a memory ordering constraint specified in the source code. The compiler generates binary emulation metadata that is usable during emulation of emitted machine code instructions of the first ISA, in order to enforce the memory ordering constraint within corresponding machine code instructions of a second ISA. An emulator utilizes this binary emulation metadata during emulation of a resulting executable image at a processor implementing the second ISA. When the emulator encounters a machine code instruction in the image that performs a memory operation, it identifies an instruction memory address corresponding to the instruction. The emulator determines whether the binary emulation metadata identifies the instruction memory address as being associated with a memory ordering constraint.
    Type: Grant
    Filed: December 3, 2020
    Date of Patent: July 5, 2022
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Henry Morgan, Ten Tzen, Christopher Martin McKinsey, YongKang Zhu, Terry Mahaffey, Pedro Miguel Sequeira de Justo Teixeira, Arun Upadhyaya Kishan, Youssef M. Barakat
  • Patent number: 11348655
    Abstract: The present disclosure relates to an apparatus, and a method for memory management and more a memory device structured with internal analogic measurement mode features. The memory device includes memory component having a memory array, a memory controller coupled to the memory component, a JTAG interface in the memory controller, voltage and current reference generators, and an analogic measurement block driven by the JTAG interface.
    Type: Grant
    Filed: May 31, 2019
    Date of Patent: May 31, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Alberto Troia, Antonino Mondello
  • Patent number: 11334334
    Abstract: Software releases can be generated based on controller metadata in some examples. In one such example, a system can receive metadata files including a set of properties for controllers executable in a distributed computing environment to manage software components collectively forming a software application. Each metadata file can specify respective properties for a respective controller. The system can extract deployment details from the set of properties included in the metadata files, where the deployment details can specify how the controllers are to be deployed in the distributed computing environment. The system can then generate combined metadata that includes the deployment details from the metadata files. The system can incorporate the combined metadata into a software release, so that the software release can be used to deploy the controllers in accordance with the combined metadata.
    Type: Grant
    Filed: August 27, 2020
    Date of Patent: May 17, 2022
    Assignee: Red Hat, Inc.
    Inventors: Ido Rosenzwig, Daniel Belenky, Gal Ben Haim, Simone Tiraboschi
  • Patent number: 11334349
    Abstract: A system and method automatically refactor mature program code having interdependent features to remove instructions pertaining to features that are no longer used. To facilitate reduction of the number of feature dependencies to test, instrumentation data are analyzed to determine which of the available features are in actual use. A graph of feature dependencies is built based on the program configuration, and the program code is simulated, according to existing testing protocols, with various combinations of features disabled to determine whether the program continues to function without error. When features are found that can be safely removed, the codebase is automatically refactored to eliminate the implementing code corresponding to the features. The refactored code then may be further automatically retested and deployed into the production environment.
    Type: Grant
    Filed: September 19, 2019
    Date of Patent: May 17, 2022
    Assignee: Dell Products L.P.
    Inventor: Shubham Gupta
  • Patent number: 11329683
    Abstract: Devices, systems and methods for reconfigurable and/or updatable lightweight embedded devices or systems are disclosed. Via use of such a device, system, or method, various capabilities for a user are provided, simplified, secured, and/or made more convenient. The system may interact with various other devices or systems, including those that are cloud-based or communicate through the cloud, and may utilize various local sensors, in order to provide one or more of improved access, monitoring, or diagnostics, and so forth.
    Type: Grant
    Filed: August 15, 2019
    Date of Patent: May 10, 2022
    Assignee: Life365, Inc.
    Inventors: Kent Dicks, Eric Vandewater, Randolph Strength
  • Patent number: 11307883
    Abstract: This invention relates to a method of optimization of a computer program, comprising: a first step (S11, S12, S13, S14) of determination of a call of a function having at least one input parameter, said call corresponding to a first criterion according to which said input parameter is inside an interval substantially smaller than the range of possible values for said input parameter, and to a second criterion corresponding to a desired accuracy for said call; a second step (S2) of automatic generation of an executable code for implementing said function, minimizing execution time for said input parameter being within said interval and compliant with said desired accuracy; a third step (S3) of replacing the existing code implementing said function by the executable code generated at said second step.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: April 19, 2022
    Assignee: BULL SAS
    Inventors: Romain Dolbeau, David Guibert
  • Patent number: 11294670
    Abstract: Embodiments detailed herein relate to reduction operations on a plurality of data element values. In one embodiment, a process comprises decoding circuitry to decode an instruction and execution circuitry to execute the decoded instruction. The instruction specifies a first input register containing a plurality of data element values, a first index register containing a plurality of indices, and an output register, where each index of the plurality of indices maps to one unique data element position of the first input register. The execution includes to identify data element values that are associated with one another based on the indices, perform one or more reduction operations on the associated data element values based on the identification, and store results of the one or more reduction operations in the output register.
    Type: Grant
    Filed: March 27, 2019
    Date of Patent: April 5, 2022
    Inventors: Christopher J. Hughes, Jonathan D. Pearce, Guei-Yuan Lueh, ElMoustapha Ould-Ahmed-Vall, Jorge E. Parra, Prasoonkumar Surti, Krishna N. Vinod, Ronen Zohar
  • Patent number: 11294649
    Abstract: Systems and methods are described herein for translating code segments from one high-level programming language to another. The system may maintain any suitable number of decoding computing modules each configured to translate code of a corresponding language to an intermediate configuration object that represents an abstracted version of the code that identifies the operations performed on one or more variables and the order by which these operations are performed in the code. The intermediate configuration object can be used to generate new code segments expressed in different programming languages. In some embodiments, generating the a new code segment in a given programming language from the intermediate configuration object can be performed by an encoding computing module that is specific to that language.
    Type: Grant
    Filed: January 13, 2021
    Date of Patent: April 5, 2022
    Assignee: Amazon Technologies, Inc.
    Inventors: Surya Vara Prasad Vishnubotla, Mansi Goel, Anoop Putheth Balakrishnan, Nalin Nanda
  • Patent number: 11281991
    Abstract: A model optimization system can reduce the delays caused by cache misses and page faults by converting a model of one or more decision trees into machine code that is optimized to avoid these memory faults. The model optimization system can convert a model into machine code by converting each tree of the model into a series of nested if/then statements and converting each series of nested if/then statements into optimized machine code. In some implementations, the model can be converted into optimized machine code only when an amount of processing required to convert the model into the optimized machine code is less than the expected cost savings of using the optimized machine code, instead of an unmodified version of the model, over the life of the model.
    Type: Grant
    Filed: November 7, 2017
    Date of Patent: March 22, 2022
    Assignee: Meta Platforms, Inc.
    Inventor: Denis Raskovalov
  • Patent number: 11249757
    Abstract: A system, processor, and/or technique configured to: determine whether two or more load instructions are fusible for execution in a load store unit as a fused load instruction; in response to determining that two or more load instructions are fusible, transmit information to process the two or more fusible load instructions into a single entry of an issue queue; issue the information to process the two or more fusible load instructions from the single entry in the issue queue as a fused load instruction to the load store unit using a single issue port of the issue queue, wherein the fused load instruction contains the information to process the two or more fusible load instructions; execute the fused load instruction in the load store unit; and write back data obtained by executing the fused load instruction simultaneously to multiple entries in the register file.
    Type: Grant
    Filed: August 14, 2020
    Date of Patent: February 15, 2022
    Assignee: International Business Machines Corporation
    Inventors: Bryan Lloyd, Brian W. Thompto, Dung Q. Nguyen, Sheldon Bernard Levenstein, Brian D. Barrick, Christian Gerhard Zoellin
  • Patent number: 11237943
    Abstract: According to an aspect of an embodiment, a method may include obtaining a computer-readable program and analyzing the computer-readable program to identify a constant in code of the computer-readable program. The method may also include obtaining context data associated with the constant from a portion of the code that includes an occurrence of the constant. The method may also include determining a location in the computer-readable program of the occurrence of the constant and analyzing the context data to identify a property of potential inputs to the computer-readable program at the location. The method may also include generating an input for the computer-readable program based on the constant and the identified property and providing the generated input to the computer-readable program during execution of the computer-readable program when execution of the computer-readable program reaches the location.
    Type: Grant
    Filed: March 8, 2019
    Date of Patent: February 1, 2022
    Inventors: Praveen Murthy, Quoc-Sang Phan
  • Patent number: 11221870
    Abstract: Disclosed aspects relate to agent flow arrangement management in a distributed commit processing environment. A first set of agent utilization data may be collected with respect to a first commit processing agent. A second set of agent utilization data may be collected with respect to a second commit processing agent. An agent flow arrangement may be determined based on a first value with respect to the first set of agent utilization data exceeding a second value with respect to the second set of agent utilization data. The agent flow arrangement may have the first commit processing agent subsequent to the second commit processing agent. The distributed commit operation may be processed using the agent flow arrangement which has the first commit processing agent subsequent to the second commit processing agent.
    Type: Grant
    Filed: March 5, 2019
    Date of Patent: January 11, 2022
    Assignee: International Business Machines Corporation
    Inventors: Joshua H. Armitage, Michael P. Clarke, John A. W. Kaputin, King-Yan Kwan, Andrew Wright
  • Patent number: 11210452
    Abstract: Markup language documents including server side scripting code using PHP syntax are executed efficiently in response to requests received by a server. The processing of the markup language document results in generation of a transformed markup language document that is returned in response to the request. The server side script code is input to a compiler that generates C++ code (or code in any object-based language based on C language) implementing the functionality of the server side script code. The C++ code is compiled to generated object code which is executed in order to process the markup language document. The generated C++ code includes functionality supported by PHP language including redeclaration of functions, dynamic variables, global variables, and the like. The generated C++ code invokes memory allocation code that allocates and deallocates objects obtained by instantiating the generated C++ classes.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: December 28, 2021
    Assignee: Meta Platforms, Inc.
    Inventors: Iain Andrew Russell Proctor, Minghui Yang, Haiping Zhao
  • Patent number: 11204943
    Abstract: A system and method for managing data storage and data access with querying data in a distributed system without buffering the results on intermediate operations in disk storage.
    Type: Grant
    Filed: October 31, 2020
    Date of Patent: December 21, 2021
    Assignee: Snowflake Inc.
    Inventors: Thierry Cruanes, Benoit Dageville, Allison Waingold Lee
  • Patent number: 11157321
    Abstract: A runtime system for distributing work between multiple threads in multi-socket shared memory machines that may support fine-grained scheduling of parallel loops. The runtime system may implement a request combining technique in which a representative thread requests work on behalf of other threads. The request combining technique may be asynchronous; a thread may execute work while waiting to obtain additional work via the request combining technique. Loops can be nested within one another, and the runtime system may provide control over the way in which hardware contexts are allocated to the loops at the different levels. An “inside out” approach may be used for nested loops in which a loop indicates how many levels are nested inside it, rather than a conventional “outside in” approach to nesting.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: October 26, 2021
    Assignee: Oracle International Corporation
    Inventor: Timothy L. Harris
  • Patent number: 11157297
    Abstract: The objective of the present invention is to prevent a conflict between variable names and consequently the unintentional overwriting of data when a plurality of programs that define a shared variable exist. A control device (1) is equipped with a program management part (11), a data storage part (13a), and a shared variable symbol table (13b). The program management part (11) acquires an identifier for a first user program, generates a shared variable name that includes the identifier and a variable name of a shared variable defined in the first user program, associates the shared variable name and an address of the shared variable with each other, and records these in the shared variable symbol table (13b).
    Type: Grant
    Filed: June 18, 2019
    Date of Patent: October 26, 2021
    Assignee: OMRON Corporation
    Inventor: Wataru Arai
  • Patent number: 11138034
    Abstract: The method for collecting information includes obtaining, based on a method identifier of the target method, the quantity of times of invoking the target method, recording method information of the target method based on the quantity of times of invoking the target method, a first threshold, and a second threshold, and setting a method status of the target method, the method status is one of a first state and a second state, the first state corresponds to the first threshold, the second state corresponds to the second threshold.
    Type: Grant
    Filed: January 8, 2019
    Date of Patent: October 5, 2021
    Inventors: Yifan Lu, Haitao Huang, Yongyong Yang, Yongjian Chen, Mingliang Yi
  • Patent number: 11119889
    Abstract: According to one or more embodiments, operations may include identifying a plurality of source code edits made between a buggy version of first source code of a first software program and a repaired version of the first source code. The operations may also include identifying a plurality of clusters of the source code edits. Each cluster of the plurality of clusters includes one or more source code edits of the plurality of source code edits. The operations may also include identifying a plurality of valid clusters of the plurality of clusters and identifying one or more invalid clusters of the plurality of clusters based on compiling of the first source code. Moreover, the operations may include identifying, as a first repair of the first error, a particular set of one or more valid clusters of the plurality of valid clusters while excluding the one or more invalid clusters from consideration.
    Type: Grant
    Filed: July 22, 2020
    Date of Patent: September 14, 2021
    Inventors: Hiroaki Yoshida, Mukul R. Prasad
  • Patent number: 11113244
    Abstract: An integrated data pipeline can take advantage of a streaming service, which can handle tasks such as automated redelivery, as well as a processing service, which can allocate workers on a task- or event-specific basis. Event data is aggregated and compressed for delivery by the streaming service. The streaming service can deliver the data asynchronously to the processing service, which can disaggregate and decompress the data to obtain the original data records. The type of event for each record can be determined to determine whether the data should be processed using online and/or offline processing. For online processing the appropriate fields are determined and data extracted to be passed to the online processing services. For offline processing the record data is concatenated sequentially into mini-batches, then compacted into larger batch files that are stored for subsequent offline processing.
    Type: Grant
    Filed: January 30, 2017
    Date of Patent: September 7, 2021
    Assignee: A9.COM, INC.
    Inventors: Gang Chen, Abraham Hossain Bagherjeiran, Chein-Hsin Liu
  • Patent number: 11080373
    Abstract: Embodiments of the present disclosure relate to anti-tamper computer systems, in particular to methods and systems which can embed protection code into software. Among other things, the protection code helps prevent (and make it more costly) to reverse engineer to tamper with the protected software with malicious intent, such as, but not restricted to: the removal of a license protection mechanism; the removal of code displaying advertisements; the injection of a malicious thread into the program memory space; illicit usage; or any other kind of unauthorized modification of the software.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: August 3, 2021
    Assignee: Snap Inc.
    Inventors: Johan Wehrli, Julien Rinaldini
  • Patent number: 11080251
    Abstract: There is provided a method to optimize memory usage in hash tables by organizing data storage in the hash table with arrays instead of linked lists where sizes of arrays can be predicted with high accuracy. The method has certain conditions and range of applicability, including where hash function of key provides uniform distribution of values. The method is more applicable if the number of entries is more than 60,000.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: August 3, 2021
    Inventor: Viktor Boldyshev
  • Patent number: 11055202
    Abstract: A system and method for accessing a tagged global variable in software, including: randomly generating tags for global variables in the software; tagging the global variables with the random tags; creating a pointer to each global variable with the random tags in unused bits of the pointer wherein the pointer points to the associated global variable; accessing one global variable indirectly using the tagged pointer; determining whether tag on the accessed global variable matches the tag on the accessed pointer; and indicating a fault when the tag on the accessed global variable does not match the tag on the accessed pointer.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: July 6, 2021
    Assignee: NXP B.V.
    Inventors: Jan Hoogerbrugge, Marcel Medwed
  • Patent number: 11029929
    Abstract: A system and method are provided for emulating a code sequence while compiling the code sequence into compiled operations for later execution of the code sequence. In one embodiment, the system includes an emulation model for executing operations and a compilation model for compiling operations. The emulation model may execute operations of the code sequence and the compilation model may compile the operations of the code sequence into compiled operations. The system may transfer execution of the operations from the emulation model to the compiled operations. In certain implementations, the transfer may include transferring flow information and program execution information. In further implementations, the transfer may occur after detecting that a current compilation level of the code sequence exceeds a compilation threshold.
    Type: Grant
    Filed: January 24, 2019
    Date of Patent: June 8, 2021
    Assignee: Red Hat, Inc.
    Inventor: Nathaniel Philip McCallum