Abstract: Contention for shared resources in a shared resource environment may be determined based on measurements from a probe running in the shared resource environment. The measurements can be compared to benchmarks, and a contention value may be determined based on the comparison.

Abstract: The present invention extends to methods, systems, and computer program products for providing consistent tenant experiences at multi-tenant database. Embodiments of the invention include an import service that facilitates data imports without any distribution logic on a tenant. A tenant (caller) provides data in essentially any order. The import service understands the distribution of data across multiple databases and determines for any given piece of import data what database the import data is to be inserted into. Accordingly, the tenant (caller) is relieved from having to know how the data is distributed across a set (of potentially hundreds or thousands) of databases. The import service can optimize an import process to provide load balancing and fairness across a dynamic distributed database system. For example, the import service can insure that a large import by one tenant does not deprive the import other tenants of appropriate resources.

Abstract: An approach for dynamic test topology visualization is provided. The approach retrieves test data from one or more databases. The approach retrieves test data from an application under test. The approach creates a visual diagram, wherein the visual diagram includes one or more topological elements, one or more topological relationships between the one or more topological elements, the test data, and a screen snapshot of an application under test. The approach overlays the visual diagram with user interaction information. The approach associates the visual diagram to the test execution performed on the application under test.

Abstract: One embodiment of the present disclosure sets forth a technique for enforcing cross stream dependencies in a parallel processing subsystem such as a graphics processing unit. The technique involves queuing waiting events to create cross stream dependencies and signaling events to indicated completion to the waiting events. A scheduler kernel examines a task status data structure from a corresponding stream and updates dependency counts for tasks and events within the stream. When each task dependency for a waiting event is satisfied, an associated task may execute.

Abstract: Multiple clients may attempt to utilize a coprocessor engine within a coprocessor simultaneously. However, each engine may accomplish the particular function for which it is designed for one client at a time. Therefore, to transition from performing coprocessor engine operations between clients, the coprocessor engine may be suspended from performing operations for a first client so that it may begin performing operations for a second client. Prior to such transition, the coprocessor engine saves metadata about its operation state at the time of the suspend. At a subsequent time, when operations for the first client are to resume, the operating state of the coprocessor engine is determined utilizing the metadata and operations for the first client resume.

Abstract: A method and a system for enabling resource consumption for one or more applications running in a virtual production environment within a production environment based on a testing analysis. The method and system includes generating a multi-stage virtual computing environment within a computing production environment. A software application can run in the virtual computing environment. The method and system provides access to resources in the computing production environment from the virtual computing environment. The method and system allows the software application access to the computing production environment based on a testing analysis and uses abstraction layers to control allocation of resources in the production environment.

Abstract: Provided are a computer program product, system, and method for using queues corresponding to attribute values associated with units of work to select the units of work to process. A plurality of queues for each of a plurality of attribute types of attributes are associated with the units of work to process, wherein there are queues for different possible attribute values for each of the attribute types. A unit of work to process is received. A determination is made for each of the attribute types at least one of the queues corresponding to at least one attribute value for the attribute type associated with the received unit of work. A record for the received unit of work is added to each of the determined queues.

Abstract: Resource configuration to exploit elastic network capability is provided by establishing an elastic network bandwidth allocation level to provide for an application for transfer of data between the application and an elastic network, the application hosted at a data center, then dynamically configuring, for the application, elastic network bandwidth allocation from the network service provider in accordance with the established elastic network bandwidth allocation level, and allocating storage resources of the data center for the application and processing resources of the data center for the application, the allocating being based on the established elastic network bandwidth allocation level and providing storage resources and processing resources to operate at a level commensurate with the established elastic network bandwidth allocation level.

Abstract: A method and a system for enabling resource consumption for one or more applications running in a virtual production environment within a production environment based on a testing analysis. The method and system includes generating a multi-stage virtual computing environment within a computing production environment. A software application can run in the virtual computing environment. The method and system provides access to resources in the computing production environment from the virtual computing environment. The method and system allows the software application access to the computing production environment based on a testing analysis and uses abstraction layers to control allocation of resources in the production environment.

Abstract: In the described embodiments, entities in a computing device selectively write specified values to a lock variable in a local cache and one or more lower levels of a memory hierarchy to enable multiple entities to enable the concurrent execution of corresponding critical sections of program code that are protected by a same lock.

Abstract: A method for migration of operations between CPU cores, the method includes: processing, by a source core, one or more tasks and one or more interrupt service routines; accessing a mapping corresponding to a task of the one or more tasks and an interrupt service routine of the one or more interrupt service routines; identifying, based on the mapping, a target core that corresponds to the task and the interrupt service routine; blocking the task from being processed by the source core in response to identifying the target core; in response to identifying the target core, disabling an interrupt corresponding to the interrupt service routine; in response to identifying the target core, assigning the task and the interrupt to the target core; after assigning the interrupt to the target core, enabling the interrupt; and after assigning the task to the target core, processing the task by the target core.

Abstract: A reconfigurable, multi-core processor includes a plurality of memory blocks and programmable elements, including units for processing, memory interface, and on-chip cognitive data routing, all interconnected by a self-routing cognitive on-chip network. In embodiments, the processing units perform intrinsic operations in any order, and the self-routing network forms interconnections that allow the sequence of operations to be varied and both synchronous and asynchronous data to be transmitted as needed. A method for programming the processor includes partitioning an application into modules, determining whether the modules execute in series, program-driven parallel, or data-driven parallel, determining the data flow required between the modules, assigning hardware resources as needed, and automatically generating machine code for each module.

Abstract: In the network-based group management and floor control mechanism disclosed herein, a server may receive a request to occupy a shared IoT resource from a member device in an IoT device group and transmit a message granting the member IoT device permission to occupy the shared IoT resource based on one or more policies. For example, the granted permission may comprise a floor that blocks other IoT devices from accessing the shared IoT resource while the member IoT device holds the floor. Furthermore, the server may revoke the permission if the member IoT device fails to transmit a keep-alive message before a timeout period expires, a high-priority IoT device pre-empts the floor, and/or based on the policies. Alternatively, the server may make the shared IoT resource available if the member IoT device sends a message that voluntarily releases the floor.

Abstract: A control apparatus of an on-vehicle electronic equipment. The control apparatus of the on-vehicle electronic equipment monitors an execution time of each normal processing obtained by subdividing a control program of the on-vehicle electronic equipment by means of an MCU which is provided in the control apparatus. In a case that an abnormality in the execution time of the normal processing is detected by a timer interruption processing based on a general-purpose timer built in the MCU and software, an alternative processing to be paired with the normal processing is performed to continue a control of the on-vehicle electronic equipment by replacing the normal processing with the alternative processing in a next period.

Abstract: Described is a technology by which independent computing functions such as corresponding to separate operating systems may be partitioned into coexisting partitions. A virtual machine manager, or hypervisor, manages the input and output of each partition to operate computer system hardware. One partition may correspond to a special purpose operating system that quickly boots, such as to provide appliance-like behavior, while another partition may correspond to a general purpose operating system that may load while the special purpose operating system is already running. The computer system that contains the partitions may transition functionality and devices from one operating system to the other. The virtual machine manager controls which computer hardware devices are capable of being utilized by which partition at any given time, and may also facilitate inter-partition communication.

Abstract: Systems and methods are provided for receiving a request for an allocation of a task in a cluster comprising a plurality of client nodes, determining a node type for the task, based on mapping the task to a list of categories, wherein at least two of categories in the list of categories overlap in range. The systems and methods further providing for searching for available client nodes based on the node type for the task to select a client node to allocate the task, determining a zone of the selected client node, wherein the zone is mapped to the list of categories, determining a wait algorithm associated with the zone of the selected node, and contacting the selected client node and passing the task and the wait algorithm to the selected client node.

Abstract: A thread on one processor may be used to enable another processor to lock or release a mutex. For example, a central processing unit thread may be used by a graphics processing unit to secure a mutex for a shared memory.

Abstract: Methods, systems, and articles of manufacture for dynamic resource allocation in MapReduce are provided herein. A method includes partitioning input data into one or more sized items of input data associated with a MapReduce job; determining a total number of mapper components, and a total number of reducer components for the MapReduce job based on said partitioning; dynamically determining an allocation of resources to each of the total number of mapper components and reducer components during run-time of the MapReduce job, wherein said dynamically determining the allocation of resources comprises monitoring one or more utilization parameters for each of the total number of mapper components and total number of reducer components during run-time of the MapReduce job; and dynamically determining a number of concurrently executing mapper components and reducer components from the total number of mapper components and the total number of reducer components for the MapReduce job.

Abstract: A method is described for generating procedural textures for a computer having a unified CPU/GPU memory architecture, to generate textures for contents that are managed by a graphics card (GPU), and including the steps of: receiving the data of a graph consisting of a plurality of filters and sequentially traversing said graph such as to allow, for each filter traversed, the steps of: identifying the processor preselected for executing this filter; receiving the instructions for the preselected version of the filter; receiving parameters of the current filter; receiving the buffer addresses of the current filter; applying the values provided for the digital-valued filter inputs; executing the filter instructions with the set parameters; storing the intermediate results obtained; and, when all of the filters of the graph have been executed, generating at least one display texture.

Abstract: At an electronic device with a display, a microphone, and an input device: while the display is on, receiving user input via the input device, the user input meeting a predetermined condition; in accordance with receiving the user input meeting the predetermined condition, sampling audio input received via the microphone; determining whether the audio input comprises a spoken trigger; and in accordance with a determination that audio input comprises the spoken trigger, triggering a virtual assistant session.

Abstract: In an approach for selecting and issuing an oldest ready instruction in an issue queue, one or more processors receive one or more instructions in an issue queue. Ready to execute instructions are identified. An age of the instructions are represented in a first age array. One or more subsets of the instructions are generated for subset age arrays that each hold an age of the instructions in a subset. A 1-hot signal is generated that identifies an oldest ready instruction in the first age array and a 1-hot signal is simultaneously generated that identifies an oldest ready instruction in each subset age array. A candidate instruction is selected with each subset signal that is represented in the subset age array of the subset signal, wherein a candidate instruction is an oldest ready instruction in the subset age array. A candidate instruction is selected with the major signal and issued.

Abstract: Systems, methods, and computer-readable media for generating a data set are provided. One method includes generating a data set based on input data using a plurality of brokers. The method further includes receiving a request from a user and determining whether the request can be fulfilled using data currently in the data set. When the request can be fulfilled using data currently in the data set, the data is accessed using broker(s) configured to provide access to data within the data set. When the request cannot be fulfilled using data currently in the data set, at least one new broker is spawned using existing broker(s) and additional data needed to fulfill the request is added to the data set using the new broker. The method further includes generating a response to the request using one or more of the plurality of brokers.

Abstract: A data processing apparatus includes a first execution mechanism, such as an out-of-order processing circuitry, and a second execution mechanism 6 such as an in-order processing circuitry. Switching control circuitry controls switching between which of the first execution circuitry and the second execution circuitry is active at a given time. Latency indicating signals indicative of the latency associated with a candidate switching operation to be performed are supplied to the switching control circuitry and used to control the switching operation. The control of the switching operation may be to accelerate the switching operation, prevent the switching operation, perform early architectural state data transfer or other possibilities.

Abstract: Described herein are systems, devices, and methods for using a job scheduler that allocates jobs to cluster nodes in a data warehouse. The cluster nodes in the data warehouse may generate information about the availability to execute new jobs. The job scheduler may use the information about the availability to determine which cluster node to allocate a particular job based on current information or a prediction of availability. As a result the data warehouse becomes more stable.

Abstract: A description of a resource associated with a service of an entity can be captured. The service can be associated with one or more resources, a constraint, and a demand. The resource can be associated with one or more characteristics including a utility, a limited availability, and a consumption rate. The entity can be an organization or a system. An initial allocation problem associated with the resource can be formulated as a two phase problem. The first phase can be an optimization problem and the second phase can be a restricted allocation problem. The initial allocation problem can be associated with reconfiguring a previously established allocation of a baseline scenario. The optimization problem can be solved optimally or approximately to establish a favorable allocation. The favorable allocation can minimizes the reconfiguration cost of the reconfiguring. The baseline scenario can be a normal operation of the service.

Abstract: The deterministic algorithm may analyze data by defining a plurality of blocks, identify a task for each of the blocks, and identify any operations on which the task is dependent. The algorithm may store in a first data structure an entry for each of the blocks identifying whether a precondition must be satisfied before tasks associated with the blocks can be initiated, store in a second data structure a status value for each of the blocks and make the stored status values changeable by multiple threads, and assign a plurality of the tasks to a plurality of threads, wherein each thread is assigned a unique task, wherein each of the plurality of threads executes its assigned task when the status of the block corresponding to its assigned task indicates that the assigned task is ready to be performed and the precondition associated with the block has been satisfied if the precondition exists.

Abstract: A memory device may include a latency control circuit configured to control a write latency and a read latency. The memory device compensates a write latency corresponding to a write command in response to a clock signal for a delay time on a data input path, and generates a write latency control signal. Write data input to a data bus in response to the write latency control signal is immediately aligned with the clock signal and latched and provided to a memory cell array.

Abstract: A method is provided for applying tasks. The method can include receiving a plurality of tasks for a plurality of applications, an application of the plurality of applications is hosted by a computing environment utilizing a monitoring agent, and a task is performed for an operation of the application during a first period of time. The method can also include determining a first resource type and a first resource amount from the computing environment for performing the task. The method can also include grouping the plurality of tasks into a set of tasks based on the first resource type, at least two tasks from the set of tasks being performable in parallel during the first period of time. The method can also include determining whether the first resource amount of the first resource type is present in the computing environment during the first period of time.

Abstract: A system and method can support an adaptive self-tuning locking mechanism in a transactional middleware machine environment. The system allows each process in a plurality of processes to perform one or more test-and-set (TAS) operations in order to obtain a lock for data in a shared memory. Then, the system can obtain a spin failed rate for a current tuning period, wherein a spin failure happens when a process fails to obtain the lock after performing a maximum number of rounds of TAS operations that are allowed. Furthermore, the system can adaptively configuring a spin count for a next tuning period based on the obtained spin failure rate, wherein the spin count specifies the maximum number of rounds of TAS operations that are allowed for the next tuning period.

Abstract: Methods and arrangements for assembling tasks in a progressive queue. At least one job is received, each job comprising a dependee set of tasks and a depender set of at least one task. The dependee tasks are assembled in a progressive queue for execution, and the dependee tasks are executed. Other variants and embodiments are broadly contemplated herein.

Abstract: The present invention provides a loading calculation method and a loading calculation system for a processor in an electronic device is disclosed. The loading calculation system comprises: a detecting unit, a determining unit, a generating unit, and a calculating unit. The loading calculation method comprises: detecting a plurality of switching actions of the processor to generate a detecting result; determining a time interval to separate the detecting result to generate a plurality of time periods; generating a log file of scheduling according to the detecting result and the plurality of time periods; utilizing the processor for enabling the log file of scheduling; and calculating the processor loading according to the log file of scheduling.

Abstract: A multi-threaded processor may support efficient pattern matching techniques. An input data buffer may be provided, which may be shared between a fast path and a slow path. The processor may retire the data units in the input data buffer that is not required and thus avoids copying the data unit used by the slow path. The data management and the execution efficiency may be enhanced as multiple threads may be created to verify potential pattern matches in the input data stream. Also, the threads, which may stall may exit the execution units allowing other threads to run. Further, the problem of state explosion may be avoided by allowing the creation of parallel threads, using the fork instruction, in the slow path.

Abstract: A method processes data records. The method partitions the data records into groups and assigns each group to a respective process of a first plurality of processes, which execute in parallel. For each group, the assigned process extracts information from the data records, applies a script with information processing commands applied sequentially to produce intermediate values, stores the intermediate values in a respective intermediate data structure, and updates the status of the group to indicate completion. When the predefined threshold percentage of the data records are completed, the process assigns each group to a respective second process as a backup. When each of the groups has been completed by at least one process (either the original or the backup), the method executes a second plurality of processes to aggregate intermediate values from the intermediate data structures to produce output data. The aggregation includes intermediate values only once for each group.

Abstract: A cache apparatus stores part of a plurality of accessible data blocks into a cache area. A calculation part calculates, for each pair of data blocks of the plurality of data blocks, an expected value of the number of accesses made after one of the data blocks is accessed until the other of the data blocks is accessed, on the basis of a probability that when each of the plurality of data blocks is accessed, each data block that is likely to be accessed next is accessed next. When a data block is read from outside the cache area, a determination part determines a data block to be discarded from the cache area, on the basis of the expected value of the number of accesses made after the read data block is accessed until each of the plurality of data blocks is accessed.

Abstract: A method, system, and computer program product for managing system resources within a data processing system. A resource management moderator (RMM) utility assigns a priority to each application within a group of management applications, facilitated by a RMM protocol. When a request for control of a particular resource is received, the RMM utility compares the priority of the requesting application with the priority of the controlling application. Control of the resource is ultimately given to the management application with the greater priority. If the resource is not under control of an application, control of the resource may be automatically granted to the requester. Additionally, the RMM utility provides support for legacy applications via a “manager of managers” application. The RMM utility registers the “manager of managers” application with the protocol and enables interactions (to reconfigure and enable legacy applications) between the “manager of managers” application and legacy applications.

Abstract: A dispatch stage of a processor core dispatches designated operations (e.g. load/store operations) to a temporary queue when the resources to execute the designated operations are not available. Once the resources become available to execute an operation at the temporary queue, the operation is transferred to a scheduler queue where it can be picked for execution. By dispatching the designated operations to the temporary queue, other operations behind the designated operations in a program order are made available for dispatch to the scheduler queue, thereby improving instruction throughput at the processor core.

Abstract: Software is deployed to, and executed at, one or more computing devices in a computing system based on current conditions in the computing system and the capabilities of the different computing devices to handle the software. A request to run a software process calls a manager which determines an optimal place to run the software process. The manager can consider factors such as response time, user demands, bandwidth, processor utilization, storage utilization, security considerations, compatibility considerations and cost. Once a computing device is selected to run the software process, the manager facilitates movement of code and/or data to the computing device.

Abstract: A non-volatile storage apparatus comprises a controller, one or more memory packages, a system temperature sensor, and one or more memory temperature sensors. The system temperature sensor is located at or on the controller. Each of the one or more memory temperature sensors are positioned at one of the one or more memory packages. The controller monitors system temperature using the system temperature sensor. If the system temperature is above a first threshold, then temperature is sensed at the memory packages using the one or more memory temperature sensors. Individual memory packages have their performance throttled if their temperature exceeds a second threshold.

Abstract: An industrial control system may receive processing information from at least two control systems associated with at least two components within an industrial automation system. The processing information may include a processing load value for each of the at least two control systems. The industrial control system may then distribute processing loads associated with the at least two control systems when a total processing load between the at least two control systems is unbalanced.

Abstract: An aspect includes include selective purging of entries from translation look-aside buffers (TLBs). A method includes building multiple logical systems in a computing environment, the multiple logical systems including at least two level-two guests. TLB entries are created in a TLB for the level-two guests by executing fetch and store instructions. A subset of the TLB entries is purged in response to a selective TLB purge instruction, the subset including TLB entries created for a first one of the level-two guests. Subsequent to the purging, verifying that the subset of the TLB entries were purged from the TLB, and determining whether a second one of the level-two guests is operational, the determining including executing at least one instruction that accesses a TLB entry of the second one of the level-two guests. Test results are generated based on the verifying and the determining. The test results are output.

Abstract: Embodiments for performing cooperative user mode scheduling between user mode schedulable (UMS) threads and primary threads are disclosed. In accordance with one embodiment, privileged hardware states are transferred from a kernel portion of a UMS thread to a kernel portion of a primary thread.

Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for allocating tasks to computing nodes using multiple resource allocators. One of the methods includes providing, by each resource allocator of a plurality of resource allocators, a first request to compute a first score to each computing node of a plurality of computing nodes, the first score representing a measure of availability for the computing node to take a particular task. A first score is received from each of the plurality of computing nodes and the nodes are ranked according to the first scores. A second request is provided to a highest-ranked computing node to compute a second score. If the difference between the first score and the second score satisfies a threshold, assigning the task to the highest-ranked computing node if and only if the difference between the first score and the second score satisfies the threshold.

Abstract: Read operations are performed in a multi-plane memory device. A state machine interfaces an external controller to each plane of memory cells to allow reading from selected word lines in the planes. In one approach, different types of read operations are performed in different planes, such as a multi-level cell read, e.g., a lower, middle or upper page read and a single-level cell (SLC) read. When the read operation in one plane uses fewer read voltages than another plane, the read data can be output early from the one plane while read operations continue on the other plane. The external controller can also command a cache release for one plane after outputting data from the caches of another plane. Read voltages can be set for each plane in a respective set of registers.

Abstract: A method for executing an application in a multitasking system is provided. The application is composed of at least one task for which the temporal triggering is specified in a first temporal reference frame that is asynchronous relative to the physical time, called first external clock domain, defined by a synchronous basic clock with changes of state of a peripheral device of the system. The method comprises a set of steps executed by the system upon reception of an occurrence of an interrupt in order to render the execution of the task deterministic or quasi-deterministic.

Abstract: Error concealment techniques for video decoding are described. For example, a video decoder after finding a corrupted picture in a bit stream, finds a suitable neighbor for the corrupted picture. For example, the video decoder favors pictures with the same parity as the corrupted picture and considers picture order count and picture corruption in choosing a neighbor. The decoder then modifies syntax elements for the encoded video in the bit stream to allow the neighbor to be used in concealing the corruption in the corrupted picture. The modification of syntax elements can depend on the particular video decoder implementation. For example, in a software-only multithreaded video decoder, a task graph is modified, while in a system utilizing video acceleration, syntax elements for reference lists are modified.

Abstract: Systems and methods for timer-based virtual processor scheduling. An example method may comprise: selecting, by a hypervisor executing on a computer system, an active virtual processor among two or more virtual processors; determining a first time period being less than a second time period, the second time period equal to a time remaining till a next scheduled timer interrupt of a timer communicatively coupled to the active virtual processor; and suspending the active virtual processor for at least the first time period.

Abstract: The present invention relates to a method for selecting a virtual slot to start up an instance of an application in a distributed system comprising a plurality of physical machines distributed on a network, each physical machine housing at least one virtual machine, and each virtual machine comprising at least one virtual slot for running an application instance in said virtual machine. The method according to the invention comprises selecting an application slot to start up an instance of an application including the following steps: determining a set of free application slots, i.e., those not occupied by an application instance in use, computing a score for each free application slot, the score computation depending on at least one constraint, selecting the application slot to start up the considered application instance, said selected application slot being that having the best score.

Abstract: A system includes a plurality of queues configured to hold tasks and state information associated with such tasks. The system further includes a plurality of listeners configured to query one of the plurality of queues for a task, receive, in response to querying one of the plurality of queues for a task, a task together with state information associated with the task, effect processing of the received task, and communicate a result of the received task to another queue of the plurality of queues, the another queue of the plurality of queues being selected based on the processing of the received task.

Abstract: A system includes a plurality of arithmetic devices configured to execute arithmetic processes in parallel. Each of plurality of arithmetic devices is configured to: determine whether a time period from the start of collective communication to reception from another arithmetic device involved in the collective communication is equal to or shorter than a predetermined threshold, determine a target arithmetic device that is among the plurality of arithmetic devices and for which a waiting scheme involved in the collective communication is to be changed when the time period is determined to be equal to or shorter than the predetermined threshold, and transmit, to the target arithmetic device, an instruction to change the waiting scheme involved in the collective communication.

Abstract: One embodiment sets forth a method for efficiently determining memory resource dependencies between instructions included in a software application. For each instruction, a dependency analyzer uses overlapping search techniques to identify one or more overlaps between the memory elements included in the current instruction and the memory elements included in previous instructions. The dependency analyzer then maps objects included in the instructions to a set of partition elements wherein each partition element represents a set of memory elements that are functionally equivalent for dependency analysis. Subsequently, the dependency analyzer uses the set of partition elements to determine memory dependencies between the instructions at the memory element level.