Context Switching Patents (Class 718/108)
  • Patent number: 11093270
    Abstract: A method and apparatus for configuring an overlay network are provided. In the method and apparatus, an application source comprising an executable portion is obtained. A computer system instance is caused to execute at least some of the executable portion, and a snapshot of the computer system instance after partial but incomplete execution of the executable portion is obtained such that the snapshot is usable to instantiate another computer system instance to continue execution of the executable portion from a point in execution at which the snapshot was obtained.
    Type: Grant
    Filed: September 6, 2017
    Date of Patent: August 17, 2021
    Assignee: Amazon Technologies, Inc.
    Inventor: Nicholas Alexander Allen
  • Patent number: 11080095
    Abstract: Systems and methods are disclosed for scheduling threads on a processor that has at least two different core types, such as an asymmetric multiprocessing system. Each core type can run at a plurality of selectable voltage and frequency scaling (DVFS) states. Threads from a plurality of processes can be grouped into thread groups. Execution metrics are accumulated for threads of a thread group and fed into a plurality of tunable controllers for the thread group. A closed loop performance control (CLPC) system determines a control effort for the thread group and maps the control effort to a recommended core type and DVFS state. A closed loop thermal and power management system can limit the control effort determined by the CLPC for a thread group, and limit the power, core type, and DVFS states for the system. Deferred interrupts can be used to increase performance.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: August 3, 2021
    Assignee: Apple Inc.
    Inventors: Jeremy C. Andrus, John G. Dorsey, James M. Magee, Daniel A. Chimene, Cyril de la Cropte de Chanterac, Bryan R. Hinch, Aditya Venkataraman, Andrei Dorofeev, Nigel R. Gamble, Russell A. Blaine, Constantin Pistol
  • Patent number: 11061503
    Abstract: In one embodiment, an apparatus and associated method are provided, comprising: at a device having a display and a touch-sensitive surface: displaying a first user interface of a first application on the display; while displaying the first user interface of the first application on the display, detecting an input by a first contact; and in response to detecting the input by the first contact: in accordance with a determination that the input meets first one or more criteria, wherein the first one or more criteria require that the first movement meets a first directional condition in order for the first one or more criteria to be met, displaying a second user interface; and in accordance with a determination that the input meets second one or more criteria, wherein the second one or more criteria require that the first movement meets a second directional condition that is distinct from the first directional condition in order for the second one or more criteria to be met, displaying a home screen user interfac
    Type: Grant
    Filed: December 21, 2019
    Date of Patent: July 13, 2021
    Assignee: P4TENTS1, LLC
    Inventor: Michael S Smith
  • Patent number: 10963310
    Abstract: Computer program products and a system for managing processing resource usage at a workload manager and an application are described. The workload manager and application may utilize safe stop points to reduce processing resource usage during high cost processing periods while preventing contention in the processing resources. The workload manager and application may also implement lazy resumes or processing resource utilization at the application to allow for continued reduced usage of the processing resources.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: March 30, 2021
    Assignee: International Business Machines Corporation
    Inventors: Nigel G. Slinger, Matt Helliwell, Wen Jie Zhu
  • Patent number: 10949236
    Abstract: A method and apparatus for configuring an overlay network are provided. In the method and apparatus, an application source comprising an executable portion is obtained. A computer system instance is caused to execute at least some of the executable portion, and a snapshot of the computer system instance after partial but incomplete execution of the executable portion is obtained such that the snapshot is usable to instantiate another computer system instance to continue execution of the executable portion from a point in execution at which the snapshot was obtained.
    Type: Grant
    Filed: September 6, 2017
    Date of Patent: March 16, 2021
    Assignee: Amazon Technologies, Inc.
    Inventor: Nicholas Alexander Allen
  • Patent number: 10938831
    Abstract: An information handling system includes a service master and a command router. The service master is configured to host one or more service threads running under different access levels. The command router is configured to receive a request for a service from an application, the request including an access control token, determine the access control token matches the service and an access level corresponding to the access control token, and route the request to a service thread matching the access level of the access control token.
    Type: Grant
    Filed: June 13, 2018
    Date of Patent: March 2, 2021
    Assignee: Dell Products, L.P.
    Inventors: Abu Shaher Sanaullah, Danilo O. Tan, Srikanth Kondapi
  • Patent number: 10922135
    Abstract: A method is disclosed for dynamic multitasking in a storage system, the storage system including a first storage server configured to execute a first I/O service process and one or more second storage servers, the method comprising: detecting a first event for triggering a context switch; transmitting to each of the second storage servers an instruction to stop transmitting internal I/O requests to the first I/O service process, the instruction including an identifier corresponding to the first I/O service process, the identifier being arranged to distinguish the first I/O service process from other first I/O service processes that are executed by the first storage server concurrently with the first I/O service process; deactivating the first I/O service process by pausing a frontend of the first I/O service process, and pausing one or more I/O providers of the first I/O service process; and executing a first context switch between the first I/O service process and a second process.
    Type: Grant
    Filed: September 19, 2019
    Date of Patent: February 16, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Lior Kamran, Amitai Alkalay, Zvi Schneider
  • Patent number: 10901794
    Abstract: Provided is a control unit of an automation system for determining the execution time of a user program, including a first time-determining unit, wherein the first time-determining unit determines the execution time for the control unit and/or another control unit in a first operating mode, wherein at least one boundary condition is taken into account in the determination of the execution time, and wherein statistical data about the running time of commands of the user program of the control unit or of a linear representation of the real time of the control unit are taken into account in the determination of the execution time. A corresponding method and to a computer program product is also provided.
    Type: Grant
    Filed: June 12, 2017
    Date of Patent: January 26, 2021
    Assignee: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Rene Ermler, Cornelia Krebs, Jörg Neidig, Gustavo Arturo Quiros Araya
  • Patent number: 10871982
    Abstract: Systems and methods for scheduling virtual processors via memory monitoring are disclosed. An example method comprises: detecting, by a hypervisor of a host computer system, an event associated with a virtual processor running on a physical processor of the host computer system; testing a polling flag residing in a memory accessible by guest software running on the virtual processor, wherein a first state of the polling flag indicates that the virtual processor is monitoring modifications to a memory region comprising a waiting task flag, and wherein the waiting task flag indicates whether a task has been queued for the virtual processor; setting the polling flag to a second state, wherein testing the polling flag and setting the polling flag to the second state is performed in an atomic operation; and processing the detected event.
    Type: Grant
    Filed: July 17, 2018
    Date of Patent: December 22, 2020
    Assignee: Red Hat, Inc.
    Inventor: Michael Tsirkin
  • Patent number: 10853123
    Abstract: The access control circuit writes to the first storage unit a context information transmitted in one cycle from the CPU through the first bus, a context number identifying the context information, and a link context number identifying the context information transmitted from the CPU prior to the interrupt when the request for evacuating the task context information is received by the interrupt. After writing to the first storage unit, the access control circuit transfers the data including the context information and the link context number stored in the first storage unit to the second storage unit in a plurality of cycles through the internal bus (second bus) in association with the context number stored in the first storage unit.
    Type: Grant
    Filed: June 6, 2019
    Date of Patent: December 1, 2020
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Tatsuhiro Tachibana
  • Patent number: 10827304
    Abstract: A method for safely and efficiently requesting transportation services through the use of mobile communications devices capable of geographic location is described. Individual and package transportation may be provided. New customers may be efficiently serviced, and the requester and transportation provider locations may be viewed in real time on the mobile devices.
    Type: Grant
    Filed: June 1, 2018
    Date of Patent: November 3, 2020
    Assignee: LYFT, INC.
    Inventors: Olaf Martin Lubeck, John H. Hall
  • Patent number: 10795872
    Abstract: A method comprising: processing an update to a search tree and updating statistics, the search tree storing information about one or more objects indexed by corresponding object keys; determining to rebuild a first Bloom filter based on the statistics, the first Bloom filter associated with the search tree; generating a second Bloom filter associated with the search tree; populating the second Bloom filter as part of a tracing garbage collection process; and replacing the first Bloom filter with the second Bloom filter.
    Type: Grant
    Filed: January 5, 2017
    Date of Patent: October 6, 2020
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Mikhail Danilov, Mikhail Malygin, Ivan Tchoub, Alexander Fedorov, Nikita Gutsalov
  • Patent number: 10733031
    Abstract: An information processing apparatus is provided including a first operating system incapable of adding or deleting an application and a second operating system capable of adding and deleting an application; and determines whether a received command is a command directed to the first operating system or a command directed to the second operating system by referencing a table in which the command and an operating system for processing the command are associated with each other; retains the table; controls a memory so that the first operating system or the second operating system can start processing based on a result of the determining by the means for determining; and transfers the received command to the first operating system or the second operating system based on the result of the determining.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: August 4, 2020
    Assignee: Sony Corporation
    Inventor: Yasuo Takeuchi
  • Patent number: 10514958
    Abstract: A device, that provides serverless computing, receives a request to execute multiple jobs, and determines criteria for each of the plurality of jobs, wherein the criteria for each of the multiple jobs includes at least one of job posting criteria, job validation criteria, job retry criteria, or a disaster recovery criteria. The device stores information associated with the multiple jobs in a repository, wherein the information associated with the multiple jobs includes the criteria for each of the multiple jobs. The device provides a particular job, of the multiple jobs, to a cluster computing framework for execution, determines modified criteria for the particular job, and provides the modified criteria for the particular job to the cluster computing framework. The device receives, from the cluster computing framework, information indicating that execution of the particular job is complete, and validates a success of completion of the execution of the particular job.
    Type: Grant
    Filed: February 14, 2018
    Date of Patent: December 24, 2019
    Assignee: Capital One Services, LLC
    Inventors: Ashwini Kumar, Lakshmi Narasimha Sarma Kattamuri
  • Patent number: 10489296
    Abstract: Embodiments here relate to managing a cache by exploiting a cache line hierarchy is provided. Managing the cache includes reading cache references of a first task from a cache reference save area of a first task data structure in response to a context switch. Further, managing the cache includes prefetching and restoring cache lines of the first task to the cache based on the cache references. Note that the cache lines can be predetermined from a plurality of cache lines associated with the first task during an extraction operation with respect to the first task and the cache line hierarchy.
    Type: Grant
    Filed: September 22, 2016
    Date of Patent: November 26, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Wolfgang Gellerich, Peter M. Held, Gerrit Koch, Christoph Raisch, Martin Schwidefsky
  • Patent number: 10437599
    Abstract: A processor that reduces pipeline stall including a front end, a load queue, a scheduler, and a load buffer. The front end issues instructions while a first full indication is not provided, but otherwise stalls issuing instructions. The load queue stores issued load instruction entries including information needed to execute the issued load instruction. The load queue provides a second full indication when full. The scheduler dispatches issued instructions for execution except for stalled load instructions, such as when not yet been stored in the load queue. The load buffer transfers issued load instructions to the load queue when the load queue is not full. When the load queue is full, the load buffer temporarily buffers issued load instructions until the load queue is no longer full. The load buffer allows more accurate load queue full determination, and allows processing to continue even when the load queue is full.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: October 8, 2019
    Assignee: SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.
    Inventor: Qianli Di
  • Patent number: 10402221
    Abstract: A device, such as a constrained device that includes a processing device and memory, schedules user-defined independently executable functions to execute from a single stack common to all user-defined independently executable functions according to availability and priority of the user-defined independently executable functions relative to other user-defined independently executable functions and preempts currently running user-defined independently executable function by placing the particular user-defined independently executable function on a single stack that has register values for the currently running user-defined independently executable function.
    Type: Grant
    Filed: December 28, 2017
    Date of Patent: September 3, 2019
    Assignee: TYCO FIRE & SECURITY GMBH
    Inventors: Vincent J. Lipsio, Jr., Paul B. Rasband
  • Patent number: 10387686
    Abstract: Hardware based isolation for secure execution of virtual machines (VMs). At least one virtual machine is executed via operation of a hypervisor and an ultravisor. A first memory component is configured for access by the hypervisor and the ultravisor, and a second memory component is configured for access by the ultravisor and not by the hypervisor. A first mode of operation is operated, such that the virtual machine is executed using the hypervisor, wherein the first memory component is accessible to the virtual machine and the second memory component is not accessible to the virtual machine. A second mode of operation is operated, such that the virtual machine is executed using the ultravisor, wherein the first memory component and the second memory component are accessible to the virtual machine, thereby executing application code and operating system code using the second memory component without code changes.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: August 20, 2019
    Assignee: International Business Machines Corporation
    Inventors: Richard H. Boivie, Bradly G. Frey, William E. Hall, Benjamin Herrenschmidt, Guerney D. H. Hunt, Jentje Leenstra, Paul Mackerras, Cathy May, Albert J. Van Norstrand, Jr.
  • Patent number: 10346276
    Abstract: Techniques to implement physically aware kernels are described. A kernel or operating system controlling resources and processing on a computer is rendered environmentally aware. The physical environment of a computer is measured by one or more sensors. The measurements or observations are evaluated. When a pre-specified environmental condition exists according the measurements or observations, the kernel is adapted accordingly. The core behavior of the kernel, such as how it manages memory or how it manages processes, is modified in light of sensed environmental conditions. That is, kernel-level functionality, as opposed to user-space application code, is modified in response to specific environmental conditions. An embodiment may have a policy engine that monitors sensor observations and an enforcement module that reaches into the kernel to modify the kernel based on conclusions reached by the policy engine. In another embodiment, the kernel itself stores, monitors, and responds to environment data.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: July 9, 2019
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventor: Jeremiah Spradlin
  • Patent number: 10198259
    Abstract: A method and apparatus for scheduling instructions of a shader program for a graphics processing unit (GPU) with a fixed number of registers. The method and apparatus include computing, via a processing unit (PU), a liveness-based register usage across all basic blocks in the shader program, computing, via the PU, the range of numbers of waves of a plurality of registers for the shader program, assessing the impact of available post-register allocation optimizations, computing, via the PU, the scoring data based on number of waves of the plurality of registers, and computing, via the PU, the number of waves for execution for the plurality of registers.
    Type: Grant
    Filed: June 23, 2016
    Date of Patent: February 5, 2019
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventors: Robert A. Gottlieb, Christopher L. Reeve, Michael John Bedy
  • Patent number: 10176014
    Abstract: A method for operating a multithread processing system is provided, including assigning, by a controller, a subset of a plurality of tasks to a plurality of threads during a time N, collecting, by the controller, data during the time N concerning the operation of the plurality of threads, analyzing, by the controller, the data to determine at least one condition concerning the operation of the plurality of threads during the time N, and adjusting, by the controller, a number of the plurality of threads available in time N+1 in accordance with the at least one condition.
    Type: Grant
    Filed: July 27, 2015
    Date of Patent: January 8, 2019
    Assignee: Futurewei Technologies, Inc.
    Inventors: Liya Chen, Chen Tian, Feng Ye, Ziang Hu
  • Patent number: 10095542
    Abstract: Techniques are provided for restoring threads within a processing core. The techniques include, for a first thread group included in a plurality of thread groups, executing a context restore routine to restore from a memory a first portion of a context associated with the first thread group, determining whether the first thread group completed an assigned function, and, if the first thread group completed the assigned function, then exiting the context restore routine, or if the first thread group did not complete the assigned function, then executing one or more operations associated with a trap handler routine.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: October 9, 2018
    Assignee: NVIDIA CORPORATION
    Inventors: Gerald F. Luiz, Philip Alexander Cuadra, Luke Durant, Shirish Gadre, Robert Ohannessian, Lacky V. Shah, Nicholas Wang, Arthur Merlin Danskin
  • Patent number: 10079695
    Abstract: The present disclosure is directed to packet processing via reconfigurable packet processing system. A network device is configured to identify a processing order of multiple function units based on a first flow parameter of a first packet, execute a first function unit according to the processing order, update a processing status for the first packet to indicate processing by the first function unit is complete, and transmit the first packet responsive to determining from the processing status that the processing order has been completed. The network device is configured to receive a second packet including a second flow parameter, identify the second packet as a response packet of the first packet based on the first and second flow parameters, identify a reverse of the first processing order of the multiple function units, and execute a second function unit according to the reverse processing order.
    Type: Grant
    Filed: October 28, 2015
    Date of Patent: September 18, 2018
    Assignee: Citrix Systems, Inc.
    Inventor: Sankar Muthu Paramasivam
  • Patent number: 9971680
    Abstract: A semiconductor device including a register controller and a processor which includes a register is provided. The register includes a first circuit and a second circuit which includes a plurality of memory portions. The first circuit and the plurality of memory portions can store data by an arithmetic process of the processor. Which of the plurality of memory portions the data is stored in depends on a routine by which the data is processed. The register controller switches the routine in response to an interrupt signal. The register controller can make any one of the plurality of memory portions which corresponds to the routine store the data in the first circuit every time the routine is switched. The register controller can make data stored in any one of the plurality of memory portions which corresponds to the routine be stored in the first circuit every time the routine is switched.
    Type: Grant
    Filed: June 5, 2015
    Date of Patent: May 15, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Wataru Uesugi, Tomoaki Atsumi, Naoaki Tsutsui, Hikaru Tamura, Takahiko Ishizu, Takuro Ohmaru
  • Patent number: 9967835
    Abstract: An information processing system includes a GW and a portable communication device. The GW includes a transmitter that transmits, to the portable communication device that is located within a given area, a request to transmit information; a receiver that receives a response to the request to transmit information from the portable communication device; and a data acquisition controller that, when the number of responses received is larger than a maximum allowable number to the GW, adjusts the area to which the request to transmit information is transmitted such that the number of responses is equal to or smaller than the maximum allowable number and that, when the number of responses is equal to or smaller than the maximum allowable number to the GW, adjusts an area to which the request to transmit information is transmitted, which is an area different from the area to which the request has been transmitted.
    Type: Grant
    Filed: February 14, 2017
    Date of Patent: May 8, 2018
    Assignee: FUJITSU LIMITED
    Inventors: Shizuko Ichikawa, Hisatoshi Yamaoka, Takashi Imai, Miwa Okabayashi, Tatsuro Matsumoto
  • Patent number: 9958932
    Abstract: In an embodiment, an integrated circuit may include one or more processors. Each processor may include multiple processor cores, and each core has a different design/implementation and performance level. For example, a core may be implemented for high performance, and another core may be implemented at a lower maximum performance, but may be optimized for efficiency. Additionally, in some embodiments, some features of the instruction set architecture implemented by the processor may be implemented in only one of the cores that make up the processor. If such a feature is invoked by a code sequence while a different core is active, the processor may swap cores to the core the implements the feature. Alternatively, an exception may be taken and an exception handler may be executed to identify the feature and activate the corresponding core.
    Type: Grant
    Filed: November 20, 2014
    Date of Patent: May 1, 2018
    Assignee: Apple Inc.
    Inventors: David J. Williamson, Gerard R. Williams, III, James N. Hardage, Jr., Richard F. Russo
  • Patent number: 9886305
    Abstract: A computer hardware system configured to perform runtime analysis and runtime control of a multithreaded computer program includes at least one processor. The at least one processor is configured to initiate and/or perform the following. A plurality of the threads are folded, under control of a supervisor thread, together to be executed as a single folded thread. The execution of the folded thread is monitored to determine a status of the threads. At least one indicator corresponding, to the determined status of the threads, is presented in a user interface.
    Type: Grant
    Filed: April 15, 2016
    Date of Patent: February 6, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Kirk J. Krauss
  • Patent number: 9851996
    Abstract: A method includes running a scale-up hypervisor on a server complex including at least one server and running a single operating system and at least one application on top of the scale-up hypervisor. The method further includes identifying a firmware update available for a first hardware component within the server complex. The scale-up hypervisor removes all workload from the first hardware component, and the identified firmware update is applied to the first hardware component while the first hardware component is idle and the hypervisor continues running the single operating system and the at least one application. Preferably, the method may be used to sequentially apply firmware updates to various hardware components across the plurality of servers without ever shutting down the entire plurality of servers.
    Type: Grant
    Filed: March 24, 2015
    Date of Patent: December 26, 2017
    Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
    Inventors: Sumeet Kochar, Randolph S. Kolvick, John M. Borkenhagen
  • Patent number: 9772878
    Abstract: A job scheduler system includes one or more hardware processors, a memory including a job group queue stored in the memory, and a job scheduler engine configured to create a first job group in the job group queue, the first job group includes a generation counter having an initial value, receive a first request to steal the first job group, determine a state of the first job group based at least in part on the generation counter, the state indicating that the first job group is available to steal, based on the determining the state of the first job group, atomically increment the generation counter, thereby making the first job group unavailable for stealing, and alter an execution order of the first job group ahead of at least one other job group in the job group queue.
    Type: Grant
    Filed: June 24, 2016
    Date of Patent: September 26, 2017
    Assignee: Unity IPR ApS
    Inventor: Benoit Sevigny
  • Patent number: 9772926
    Abstract: A method and computer system for compiling, by a computing device, a list of hosting software classes included in the hosting software fix pack when a fix is available. An execution path of each application hosted on a hosting software may be recorded. The execution path may be stored in a data store for each application. It may be determined which operations of each application interact with the hosting software. The operations of each application used at runtime that interact with the hosting software may be stored, including storing invoked hosting software operations and classes used by the operations of each application. The invoked hosting software operations and classes may be compared with corresponding operations and classes provided in the list included in the hosting software fix pack. A list of each intersection of the comparison for each application impacted by the hosting software fix pack may be generated.
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: September 26, 2017
    Assignee: International Business Machines Corporation
    Inventors: Kulvir S. Bhogal, Samir A. Nasser
  • Patent number: 9766952
    Abstract: One or more techniques and/or systems are provided for implementing a reverse protocol launch. For example, the reverse protocol launch may be implemented between apps (e.g., as an app-to-app protocol) such that a user may navigate between apps in a contextually relevant manner using the reverse protocol launch. In an example, a search app may display vacation search results based upon a search query. Responsive to a selection of a vacation movie search result, a transition to a movie app may occur. A context, specifying a contextual state of the search app (e.g., information regarding the vacation search results, the search query, etc.), may be sent to the movie app. The movie app may implement a reverse protocol launch using the context to transition from the movie app back to the search app in the contextual state (e.g., the search app may be repopulated with the vacation search results, etc.).
    Type: Grant
    Filed: August 23, 2013
    Date of Patent: September 19, 2017
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Mirko Mandic, Brian Uphoff, Jonathan Gordner, Richie Fang, Chaitanya Dev Sareen
  • Patent number: 9753896
    Abstract: A computer-implemented system and method for flexibly taking actions upon activation of rule-based triggers are provided. A collection of documents is stored in a storage device within a computing environment. An activity of a user performed on a document from the collection is observed. At least one of an application, operation, key word, time, place, project, topic, different document from the collection, and different user is identified. A connection associated with the user is determined to at least one of the application, operation, key word, time, place, project, topic, different document from the collection, and different user based on the observed activity. A rule based on the connection and the observed activity is defined. The rule and a corresponding action are stored as a trigger. Rule satisfaction by at least one of a further activity, event, and stimuli activates the trigger, which causes performance of the corresponding action.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: September 5, 2017
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Eric Allan Bier, Teresa F. Lunt, Oliver Brdiczka
  • Patent number: 9740467
    Abstract: Functionality is disclosed herein for using a context sensitive framework to identify relevant applications to a current context and to provide data received from the relevant applications to a user. Instead of a user having to manually locate and launch an application, relevant applications determined by a contextual service may provide data in response to receiving the context data. The applications that are identified as relevant to the context determine the application data to provide to the contextual service. The contextual service selects at least a portion of the application data to provide for display within a user interface. In some configurations, the selected application data is displayed within a user interface that maintains a same look and feel regardless of the application data that is displayed.
    Type: Grant
    Filed: February 17, 2015
    Date of Patent: August 22, 2017
    Assignee: Amazon Technologies, Inc.
    Inventor: Ethan Zane Evans
  • Patent number: 9690618
    Abstract: A method for task scheduling and an electronic device using the same are provided. The method for scheduling tasks in an electronic device includes assigning a task to one of first processing units functionally connected to the electronic device, measuring a task load of the task, and controlling migration of the task to one of second processing units functionally connected to the electronic device based on the task load.
    Type: Grant
    Filed: July 1, 2015
    Date of Patent: June 27, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyunjin Park, Dohyoung Kim, Joohwan Kim
  • Patent number: 9633206
    Abstract: A computing platform 20 runs a compartmented operating system 22 and includes a trusted device 23 for forming an integrity metric which a user can interrogate to confirm integrity of the operating system. Also, the integrity of an individual compartment 24 is verified by examining status information for that compartment including, for example, the identity of any open network connections, the identity of any running processes, and the status of a section of file space allocated to that compartment 24. Hence, the integrity of an individual compartment 24 of the compartmented operating system 22 can be demonstrated.
    Type: Grant
    Filed: June 7, 2002
    Date of Patent: April 25, 2017
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Christopher I. Dalton
  • Patent number: 9569256
    Abstract: A method may include associating, with a timer-B, a second application in a terminal device; setting the terminal device in a standby mode; and executing the second application when a processor in the terminal device wakes up after the timer-B measures a second amount of elapsed time. The timer-B may not initiate wake-up of the processor. The method may further include determining whether the second application is associated with the timer-B or a timer-A when the terminal device receives a command of setting the terminal device in the standby mode; and when the second application is determined as being associated with the timer-A, unassociating the second application with the timer-A. The timer-A may initiate wake-up of the processor when the timer-A measures another second amount of elapsed time while the terminal device is the standby mode. A timer associated with a first application may initiate wakeup of the processor.
    Type: Grant
    Filed: September 25, 2012
    Date of Patent: February 14, 2017
    Assignees: Sony Corporation, Sony Mobile Communications Inc.
    Inventor: Koichi Kato
  • Patent number: 9519480
    Abstract: A system provides complex branch execution hardware and a hardware-based Multiplexer (MUX) to multiplex a fetch address of a future branch and a preloaded branch fetch address to create an index hash value that is used to index a branch target prediction table for execution by a processor core, in order to reduce branch mis-prediction by preloading.
    Type: Grant
    Filed: February 11, 2008
    Date of Patent: December 13, 2016
    Assignee: International Business Machines Corporation
    Inventors: Gregory W. Alexander, Anton Blanchard, Milton D. Miller, II, Todd A. Venton, Kenneth L. Wright
  • Patent number: 9489457
    Abstract: Some embodiments relate to techniques for receiving a query from a device, the query comprising content; determining based at least in part on the content of the query that an application is to be launched on the device; and causing the device to launch the application using at least some information determined from the content of the query. Some embodiments relate to techniques for receiving a free-form query from a user; transferring a representation of the query to at least one computer; and receiving from the at least one computer at least one instruction to launch an application on the device.
    Type: Grant
    Filed: July 14, 2011
    Date of Patent: November 8, 2016
    Assignee: Nuance Communications, Inc.
    Inventors: Marc W. Regan, Vladimir Sejnoha, Gunnar Evermann, Sean P. Brown, Stephen W. Laverty, Jeremy A. Slater, John R. Watson, Peter K. Lyons, Ryan S. LaSante
  • Patent number: 9454372
    Abstract: Embodiments relate to thread context restoration. One aspect is a multithreading computer system including a configuration with a core configurable between a single thread (ST) mode and a multithreading (MT) mode. The ST mode addresses a primary thread and the MT mode addresses the primary thread and one or more secondary threads on shared resources of the core. A multithreading facility is configured to control utilization of the configuration to perform a method including disabling one or more secondary threads based on switching from MT mode to ST mode. A thread context of secondary threads is made unavailable to programs. Based on a last-set program-specified maximum thread-id indicating MT, the thread context is obtained by a) executing a set MT instruction to resume the MT mode, and b) based on being in the resumed MT mode, accessing the thread context.
    Type: Grant
    Filed: August 6, 2015
    Date of Patent: September 27, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jonathan D. Bradbury, Fadi Y. Busaba, Mark S. Farrell, Charles W. Gainey, Jr., Dan F. Greiner, Lisa Cranton Heller, Jeffrey P. Kubala, Damian L. Osisek, Donald W. Schmidt, Timothy J. Slegel
  • Patent number: 9442759
    Abstract: A time slice group (TSG) is a grouping of different streams of work (referred to herein as “channels”) that share the same context information. The set of channels belonging to a TSG are processed in a pre-determined order. However, when a channel stalls while processing, the next channel with independent work can be switched to fully load the parallel processing unit. Importantly, because each channel in the TSG shares the same context information, a context switch operation is not needed when the processing of a particular channel in the TSG stops and the processing of a next channel in the TSG begins. Therefore, multiple independent streams of work are allowed to run concurrently within a single context increasing utilization of parallel processing units.
    Type: Grant
    Filed: December 9, 2011
    Date of Patent: September 13, 2016
    Assignee: NVIDIA Corporation
    Inventors: Samuel H. Duncan, Lacky V. Shah, Sean J. Treichler, Daniel Elliot Wexler, Jerome F. Duluk, Jr., Philip Browning Johnson, Jonathon Stuart Ramsay Evans
  • Patent number: 9400701
    Abstract: Detecting stalling of a software process in a computer system includes receiving identification of a task thread group executing in a work process executing on a computer system. The task thread group includes one or more threads and the receiving includes receiving identification of the one or more threads by a control process executing on a computer system. The detecting includes detecting whether there is a thread state change for the task thread group, marking the task as running responsive to detecting a thread state change for the task thread group, marking the task as stalled responsive to detecting an absence of a thread state change for at least a predefined amount of time, and marking the work process as stalled responsive detecting an absence of a predetermined signal from the work process for at least a predefined amount of time.
    Type: Grant
    Filed: July 7, 2014
    Date of Patent: July 26, 2016
    Assignee: International Business Machines Corporation
    Inventors: Jeremy R. Geddes, Hugh E. Hockett, Aaron J. Quirk, Kristin R. Whetstone
  • Patent number: 9378391
    Abstract: A system and method for creating switchable desktops each with its own authorization. The system provides a custom authentication and authorization data store that defines permission sets called roles, and lists which roles each user may assume. The system also provides a custom virtual desktop manager that creates new virtual desktops using the permissions defined by the roles. When a user requests a new virtual desktop and role from the desktop manager, the manager requests new virtual desktop components from the operating system. The desktop manager intercepts a request by the operating system to the Local Security Authority module for permissions to grant the new virtual desktop. The manager substitutes the user's requested role permissions for the permissions granted by the LSA module. The LSA module and operating system grant those role permissions in a newly created virtual desktop.
    Type: Grant
    Filed: October 11, 2013
    Date of Patent: June 28, 2016
    Assignee: CENTRIFY CORPORATION
    Inventor: Hon Wai Kwok
  • Patent number: 9372717
    Abstract: Embodiments include an apparatus comprising a processor and a computer readable storage medium having computer usable program code. The computer usable program code can be configured to determine whether priority of a requested task is higher than a priority of a currently executing task. The computer usable program code can be further configured to determine whether a value indicates that the currently executing task can be interrupted. The computer usable program code can be configured to trigger execution of the requested task on the processor, if the value indicates that the currently executed task can be interrupted. The computer usable program code can be further configured to wait for lapse of a time period and, interrupt the currently executing task upon detection of lapse of the time period or detection of a change to the value, if the value indicates that the currently executing task cannot be interrupted.
    Type: Grant
    Filed: May 8, 2014
    Date of Patent: June 21, 2016
    Assignee: International Business Machines Corporation
    Inventors: Bishop Brock, Tilman Gloekler, Andreas Koenig, Cedric Lichtenau, Preetham M Lobo
  • Patent number: 9367356
    Abstract: Various embodiments can control access to a computing resource (e.g., a memory resource) by detecting that a high priority activity is accessing the resource and preventing a lower priority activity from accessing the resource. The lower priority activity can be allowed access to the resource after the high priority activity is finished accessing the resource. Various embodiments enable memory operations to be mapped to account for changes in data ordering that can occur when a lower priority activity is suppressed. For example, when an activity requests that data be written to a logical memory region, a mapping is created that maps the logical memory region to a physical memory region. The data can then be written to the physical memory region.
    Type: Grant
    Filed: June 17, 2010
    Date of Patent: June 14, 2016
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Brent Charles Allen, Joerg Raymond Brown, Neil A. Brench
  • Patent number: 9361171
    Abstract: In accordance with the concepts described herein, a system for providing data storage includes at least one virtual server comprising at least one virtual storage device; at least one physical server comprising at least one physical storage device; a data structure, stored on each of the at least one physical storage devices, the data structure comprising: at least one table of contents, the table of contents configured to map storage locations within the virtual storage device to node structures that provide pointers to corresponding storage locations within the physical storage device; a tree structure having a predetermined number of hierarchical levels, each level containing node structures, the node structures containing pointers that point to other node structures or to data locations on the physical storage device; and one or more core software modules executed by one or more virtual machines, one or more physical machines or both and configured to receive requests to access data in the storage locatio
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: June 7, 2016
    Assignee: ProfitBricks, Inc.
    Inventors: Conrad N. Wood, Achim Weiss
  • Patent number: 9342350
    Abstract: The speed of task scheduling by a multitask OS is increased. A task processor includes a CPU, a save circuit, and a task control circuit. The CPU is provided with a processing register and an execution control circuit operative to load data from a memory into a processing register and execute a task in accordance with the data in the processing register. The save circuit is provided with a plurality of save registers respectively associated with a plurality of tasks. In executing a predetermined system call, the execution control circuit notifies the task control circuit as such. The task control circuit switches between tasks for execution upon receipt of the system call signal, by saving, in the save register associated with a task being executed, the data in the processing register, selecting a task to be executed next, and loading data in the save register associated with the selected task into the processing register.
    Type: Grant
    Filed: August 24, 2006
    Date of Patent: May 17, 2016
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Naotaka Maruyama
  • Patent number: 9335754
    Abstract: A method that tests the real-time behavior of an operating system having a first time system (e.g., a SMI tracer real-time extension) responsible for the real-time behavior of the operating system, wherein a test routine is periodically called for execution and the actual point in time of execution of the test routine is compared with an expected periodic point in time of execution of the test routine.
    Type: Grant
    Filed: July 20, 2010
    Date of Patent: May 10, 2016
    Assignee: Siemens Aktiengesellschaft
    Inventors: Jens Kydles, Markus Walter
  • Patent number: 9275229
    Abstract: A method to circumvent malicious software via a system configured to bypass a device driver stack and, consequently, also bypass the malicious software that may be adversely affecting the device driver stack by using an alternative stack such as a crash dump I/O stack. The crash dump I/O stack is poorly documented relative to the device driver stack and functions independently from the device driver stack.
    Type: Grant
    Filed: March 15, 2012
    Date of Patent: March 1, 2016
    Assignee: MANDIANT, LLC
    Inventor: Aaron LeMasters
  • Patent number: 9258252
    Abstract: A system is provided that monitors a first and second virtual server on a first physical server containing a physical processor, monitors physical processor usage wherein capacity is allocated to a first entitlement comprising a first percentage of the capacity guaranteed to the first virtual server, to a second entitlement comprising a second percentage guaranteed to the second virtual server, and to a third percentage one of unallocated and partially and totally allocated to a virtual server based on need, and wherein the percentages total to one hundred percent. The system monitors usage of a first virtual processor associated with the first virtual server, receives a request for first virtual processor utilization by percentage, determines utilization comprising first virtual processor usage divided by a first allocated processing capacity comprising the first entitlement and a portion of the third percentage currently allocated to the first virtual server, and reports the utilization.
    Type: Grant
    Filed: August 1, 2014
    Date of Patent: February 9, 2016
    Assignee: Sprint Communications Company L.P.
    Inventors: Gregory J. Atchity, Michael R. Hartwig, Dustin T. Holub, Justin A. Martin, Terry L. Reeves, Brian J. Washburn
  • Patent number: 9207965
    Abstract: A method and system for managing software application states selects a plurality of stateful applications for reinstatement at a later time. A set of data contexts is generated based on the selected applications. The set of data contexts is pushed onto a data stack. Thereafter the set of data contexts is popped from the data stack for reinstatement. Each step or function may be initiated automatically or through user input, and may be used in a single-user, multi-user or collaborative setting.
    Type: Grant
    Filed: June 10, 2013
    Date of Patent: December 8, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Robert J. McKeown, Patrick J. O'Sullivan