Deposition Of Materials (e.g., Coating, Cvd, Or Ald, Etc.) Patents (Class 977/890)
  • Patent number: 11942624
    Abstract: A battery electrode composition is provided comprising composite particles, with each composite particle comprising active material and a scaffolding matrix. The active material is provided to store and release ions during battery operation. For certain active materials of interest, the storing and releasing of the ions causes a substantial change in volume of the active material. The scaffolding matrix is provided as a porous, electrically-conductive scaffolding matrix within which the active material is disposed. In this way, the scaffolding matrix structurally supports the active material, electrically interconnects the active material, and accommodates the changes in volume of the active material.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: March 26, 2024
    Assignee: SILA NANOTECHNOLOGIES, INC.
    Inventors: Gleb Yushin, Bogdan Zdyrko, Addison Shelton, Eugene Berdichevsky, Igor Luzinov, Alexander Jacobs, Eerik Hantsoo, George Gomes
  • Patent number: 11862636
    Abstract: Gate-all-around integrated circuit structures having depopulated channel structures, and methods of fabricating gate-all-around integrated circuit structures having depopulated channel structures using a selective bottom-up approach, are described. For example, an integrated circuit structure includes a vertical arrangement of nanowires above a substrate. The vertical arrangement of nanowires has one or more active nanowires above one or more oxide nanowires. A first gate stack is over and around the one or more active nanowires. A second gate stack is over and around the one or more oxide nanowires.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: January 2, 2024
    Assignee: Intel Corporation
    Inventors: Nicole Thomas, Ehren Mannebach, Cheng-Ying Huang, Marko Radosavljevic
  • Patent number: 11794247
    Abstract: There are provided reactive metal powder in-flight heat treatment processes. For example, such processes comprise providing a reactive metal powder; and contacting the reactive metal powder with at least one additive gas while carrying out said in-flight heat treatment process, thereby obtaining a raw reactive metal powder.
    Type: Grant
    Filed: January 28, 2022
    Date of Patent: October 24, 2023
    Assignee: AP&C Advanced Powders & Coatings, Inc.
    Inventors: Frédéric Larouche, Frédéric Marion, Matthieu Balmayer
  • Patent number: 11777013
    Abstract: Embodiments herein describe techniques for a three dimensional transistor above a substrate. A three dimensional transistor includes a channel structure, where the channel structure includes a channel material and has a source area, a drain area, and a channel area between the source area and the drain area. A source electrode is coupled to the source area, a drain electrode is coupled to the drain area, and a gate electrode is around the channel area. An electrode selected from the source electrode, the drain electrode, or the gate electrode is in contact with the channel material on a sidewall of an opening in an inter-level dielectric layer or a surface of the electrode. The electrode is further in contact with the channel structure including the source area, the drain area, or the channel area. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: October 3, 2023
    Assignee: Intel Corporation
    Inventors: Abhishek Sharma, Willy Rachmady, Van H. Le, Jack T. Kavalieros, Gilbert Dewey, Matthew Metz
  • Patent number: 11764031
    Abstract: The present invention concerns a method and a system for imaging at least a part of a specimen by means of two microscopy imaging methods, where a surface (11) of the specimen (10) is imaged by means of a first microscopy imaging method, where a replica (25) of the surface (11) to be imaged by means of the first microscopy imaging method is produced and this replica (25) is simultaneously imaged by means of a second microscopy imaging method, where the images produced by means of the first and the second microscopy imaging methods are overlaid at the correct scale.
    Type: Grant
    Filed: January 30, 2020
    Date of Patent: September 19, 2023
    Assignee: Leica Mikrosysteme GmbH
    Inventor: Peer Oliver Kellermann
  • Patent number: 11749487
    Abstract: A field emitter array (FEA) vacuum transistor is disclosed which includes a substrate and a plurality of nanorods formed of a first polarity dopant on the substrate, wherein the dopant density is between about 1013 cm?3 to about 1015 cm?3.
    Type: Grant
    Filed: March 22, 2022
    Date of Patent: September 5, 2023
    Assignee: Purdue Research Foundation
    Inventors: Saeed Mohammadi, Shabnam Ghotbi
  • Patent number: 11740173
    Abstract: Systems for detecting, capturing, and/or measuring nanoparticles. The system may include a first vacuum chamber, where nanoparticles are formed inside a first cavity of the first vacuum. The system may also include a second vacuum chamber in fluid communication with the first vacuum chamber, a particle collection component positioned within a second cavity of the second vacuum chamber, and a particle collection medium disposed over the particle collection component. Additionally, the system may include a particle counter in fluid communication with the second vacuum chamber, and a control system operably coupled to the component. The control system may be configured to aerosolize the nanoparticles by adjusting a temperature of the component to a first temperature that establishes the medium in the solid phase, and adjusting the temperature of the component to a second temperature to transition the medium from the solid phase to a gaseous phase.
    Type: Grant
    Filed: June 1, 2021
    Date of Patent: August 29, 2023
    Assignee: University of New York
    Inventor: Gregory Denbeaux
  • Patent number: 11646125
    Abstract: The present invention relates to a process for manufacturing a composite material comprising a non-pulverulent carbon-based conductive material and metal nanoparticles dispersed within said non-pulverulent carbon-based conductive material, to said composite material, to the use of the composite material for manufacturing an electrically conductive element, and to an electric cable comprising at least one such composite material, as electrically conductive element.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: May 9, 2023
    Assignee: NEXANS
    Inventor: Thibault Paniagua
  • Patent number: 11628181
    Abstract: This disclosure relates to N4-hydroxycytidine derivatives, compositions, and methods related thereto. In certain embodiments, the disclosure relates to the treatment and prophylaxis of viral infections.
    Type: Grant
    Filed: July 6, 2020
    Date of Patent: April 18, 2023
    Assignee: Emory University
    Inventors: George R. Painter, David Guthrie, Gregory R. Bluemling, Michael G. Natchus
  • Patent number: 11588018
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a first nanostructure over the substrate. The semiconductor device structure includes a gate stack over the substrate and surrounding the first nanostructure. The semiconductor device structure includes a first source/drain layer surrounding the first nanostructure and adjacent to the gate stack. The semiconductor device structure includes a contact structure surrounding the first source/drain layer, wherein a first portion of the contact structure is between the first source/drain layer and the substrate.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: February 21, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sai-Hooi Yeong, Bo-Feng Young, Ching-Wei Tsai
  • Patent number: 11444215
    Abstract: A device and method for fabricating a photovoltaic device includes forming a double layer transparent conductive oxide on a transparent substrate. The double layer transparent conductive oxide includes forming a doped electrode layer on the substrate, and forming a buffer layer on the doped electrode layer. The buffer layer includes an undoped or p-type doped intrinsic form of a same material as the doped electrode layer. A light-absorbing semiconductor structure includes a p-type semiconductor layer on the buffer layer, an intrinsic layer and an n-type semiconductor layer.
    Type: Grant
    Filed: January 13, 2020
    Date of Patent: September 13, 2022
    Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, BAY ZU PRECISION CO., LTD.
    Inventors: Shun-Ming Chen, Chien-Chih Huang, Joel P. Desouza, Augustin J. Hong, Jeehwan Kim, Chien-Yeh Ku, Devendra K. Sadana, Chuan-Wen Wang
  • Patent number: 9040121
    Abstract: Vacuum deposited thin films of material are described to create an interface that non-preferentially interacts with different domains of an underlying block copolymer film. The non-preferential interface prevents formation of a wetting layer and influences the orientation of domains in the block copolymer. The purpose of the deposited polymer is to produce nanostructured features in a block copolymer film that can serve as lithographic patterns.
    Type: Grant
    Filed: February 7, 2013
    Date of Patent: May 26, 2015
    Assignee: Board of Regents The University of Texas System
    Inventors: C. Grant Willson, William Durand, Christopher John Ellison, Christopher Bates, Takehiro Seshimo, Julia Cushen, Logan Santos, Leon Dean, Erica Rausch
  • Patent number: 9040626
    Abstract: The invention discloses novel morphology shifting micelles and amphiphilic coated metal nanofibers. Methods of using and making the same are also disclosed.
    Type: Grant
    Filed: February 1, 2012
    Date of Patent: May 26, 2015
    Assignee: The Regents of the University of California
    Inventors: Miao-Ping Chien, Nathan C. Gianneschi
  • Patent number: 9040158
    Abstract: A generic route for synthesis of asymmetric nanostructures. This approach utilizes submicron magnetic particles (Fe3O4—SiO2) as recyclable solid substrates for the assembly of asymmetric nanostructures and purification of the final product. Importantly, an additional SiO2 layer is employed as a mediation layer to allow for selective modification of target nanoparticles. The partially patched nanoparticles are used as building blocks for different kinds of complex asymmetric nanostructures that cannot be fabricated by conventional approaches. The potential applications such as ultra-sensitive substrates for surface enhanced Raman scattering (SERS) have been included.
    Type: Grant
    Filed: September 18, 2012
    Date of Patent: May 26, 2015
    Assignee: UChicago Argonne LLC
    Inventors: Yugang Sun, Yongxing Hu
  • Patent number: 9037214
    Abstract: In certain embodiments novel nanoparticles (nanowontons) are provided that are suitable for multimodal imaging and/or therapy. In one embodiment, the nanoparticles include a first biocompatible (e.g., gold) layer, an inner core layer (e.g., a non-biocompatible material), and a biocompatible (e.g., gold) layer. The first gold layer includes a concave surface that forms a first outer surface of the layered nanoparticle. The second gold layer includes a convex surface that forms a second outer surface of the layered nanoparticle. The first and second gold layers encapsulate the inner core material layer. Methods of fabricating such nanoparticles are also provided.
    Type: Grant
    Filed: February 23, 2010
    Date of Patent: May 19, 2015
    Assignee: The Regents of the University of California
    Inventors: Fanqing Chen, Louis-Serge Bouchard
  • Patent number: 9029248
    Abstract: A nano-ionic memory device is provided. The memory device includes a substrate, a chemically inactive lower electrode provided on the substrate, a solid electrolyte layer provided on the lower electrode and including a silver (Ag)-doped telluride (Te)-based nano-material, and an oxidizable upper electrode provided on the electrolyte layer.
    Type: Grant
    Filed: October 30, 2008
    Date of Patent: May 12, 2015
    Assignee: EWHA University-Industry Collaboration Foundation
    Inventors: William Jo, Ah-Reum Jeong
  • Patent number: 9023457
    Abstract: Described herein are various methods for making textured articles, textured articles that have improved fingerprint resistance, and methods of using the textured articles. The methods generally make use of masks comprising nanostructured metal-containing features to produce textured surfaces that also comprise nanostructured features. These nanostructured features in the textured surfaces can render the surfaces hydrophobic and oleophobic, thereby beneficially providing the articles with improved fingerprint resistance relative to similar or identical articles that lack the texturing.
    Type: Grant
    Filed: November 28, 2012
    Date of Patent: May 5, 2015
    Assignee: Corning Incorporated
    Inventors: Albert Carrilero, Prantik Mazumder, Johann Osmond, Valerio Pruneri, Paul Arthur Sachenik, Lili Tian
  • Patent number: 9012887
    Abstract: The present invention relates to growth of III-V semiconductor nanowires (2) on a Si substrate (3). Controlled vertical nanowire growth is achieved by a step, to be taken prior to the growing of the nanowire, of providing group III or group V atoms to a (111) surface of the Si substrate to provide a group III or group V 5 surface termination (4). A nanostructured device including a plurality of aligned III-V semiconductor nanowires (2) grown on, and protruding from, a (111) surface of a Si substrate (3) in an ordered pattern in compliance with a predetermined device layout is also presented.
    Type: Grant
    Filed: October 24, 2011
    Date of Patent: April 21, 2015
    Assignee: Qunano AB
    Inventors: Lars Samuelson, Jonas Ohlsson, Thomas Mårtensson, Patrik Svensson
  • Patent number: 9012278
    Abstract: In some embodiments, a method for manufacturing forms a semiconductor device, such as a transistor. A dielectric stack is formed on a semiconductor substrate. The stack comprises a plurality of dielectric layers separated by one of a plurality of spacer layers. Each of the plurality of spacer layers is formed of a different material than immediately neighboring layers of the plurality of dielectric layers. A vertically-extending hole is formed through the plurality of dielectric layers and the plurality of spacer layers. The hole is filled by performing an epitaxial deposition, with the material filling the hole forming a wire. The wire is doped and three of the dielectric layers are sequentially removed and replaced with conductive material, thereby forming upper and lower contacts to the wire and a gate between the upper and lower contacts. The wire may function as a channel region for a transistor.
    Type: Grant
    Filed: October 3, 2013
    Date of Patent: April 21, 2015
    Assignee: ASM IP Holding B.V.
    Inventors: Qi Xie, Vladimir Machkaoutsan, Jan Willem Maes
  • Patent number: 9006810
    Abstract: A semiconductor nanowire is formed integrally with a wraparound semiconductor portion that contacts sidewalls of a conductive cap structure located at an upper portion of a deep trench and contacting an inner electrode of a deep trench capacitor. The semiconductor nanowire is suspended from above a buried insulator layer. A gate dielectric layer is formed on the surfaces of the patterned semiconductor material structure including the semiconductor nanowire and the wraparound semiconductor portion. A wraparound gate electrode portion is formed around a center portion of the semiconductor nanowire and gate spacers are formed. Physically exposed portions of the patterned semiconductor material structure are removed, and selective epitaxy and metallization are performed to connect a source-side end of the semiconductor nanowire to the conductive cap structure.
    Type: Grant
    Filed: June 7, 2012
    Date of Patent: April 14, 2015
    Assignee: International Business Machines Corporation
    Inventors: Josephine B. Chang, Jeffrey W. Sleight
  • Patent number: 9006130
    Abstract: The invention relates to a hydrodesulfurization nanocatalyst, use of the hydrodesulfurization nanocatalyst in a hydrodesulfurization process and a process for producing the hydrodesulfurization nanocatalyst. The hydrodesulfurization nanocatalyst can include a nanostructured alumina material, at least one metal selected from group VI B of the periodic table of elements, and at least one metal selected from group VIII B of the periodic table of elements.
    Type: Grant
    Filed: October 4, 2011
    Date of Patent: April 14, 2015
    Assignee: Research Institute of Petroleum Industry (RIPI)
    Inventors: Fereshteh Rashidi, Alimorad Rashidi, Kheirollah Jafari Jozani, Ali Nemati Kharat Ghaziani, Morteza Rezapour, Hamidreza Bozorgzadeh
  • Patent number: 8999458
    Abstract: A method and apparatus for fabricating or altering a microstructure use means for heating to facilitate a local chemical reaction that forms or alters the submicrostructure.
    Type: Grant
    Filed: April 16, 2012
    Date of Patent: April 7, 2015
    Assignee: International Business Machines Corporation
    Inventors: Supratik Guha, Hendrik F. Hamann, Herschel M. Marchman, Robert J. Von Gutfeld
  • Patent number: 8993438
    Abstract: According to one embodiment, a semiconductor device manufacturing method comprises defining a region in which absorptance of light illuminated for annealing to a substrate on which a pattern of a semiconductor integrated circuit is formed is not larger than a preset value as a coarse pattern region, locally forming a thin film that enhances light absorptance on the coarse pattern region, and annealing the substrate by illuminating light onto the substrate on which the pattern of the integrated circuit and thin film are formed.
    Type: Grant
    Filed: March 22, 2011
    Date of Patent: March 31, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hiroshi Ohno
  • Patent number: 8987016
    Abstract: The invention relates to light-emitting devices, and related components, systems and methods. In one aspect, the present invention is related to light emitting diode (LED) light extraction efficiency. A non-limiting example, the application teaches a method for improving light emitting diode (LED) extraction efficiency, by providing a nano-rod light emitting diode; providing quantum wells; and reducing the size of said nano-rod LED laterally in the quantum-well plane (x and y), thereby improving LED extraction efficiency.
    Type: Grant
    Filed: August 16, 2011
    Date of Patent: March 24, 2015
    Assignee: Rensselaer Polytechnic Institute
    Inventors: Mei-Ling Kuo, Shawn-Yu Lin, Yong Sung Kim, Mei-Li Hsieh
  • Publication number: 20150079770
    Abstract: Selective layer disordering in a doped III-nitride superlattice can be achieved by depositing a dielectric capping layer on a portion of the surface of the superlattice and annealing the superlattice to induce disorder of the layer interfaces under the uncapped portion and suppress disorder of the interfaces under the capped portion. The method can be used to create devices, such as optical waveguides, light-emitting diodes, photodetectors, solar cells, modulators, laser, and amplifiers.
    Type: Application
    Filed: November 13, 2014
    Publication date: March 19, 2015
    Inventors: Jonathan J. Wierer, JR., Andrew A. Allerman
  • Publication number: 20150062686
    Abstract: An apparatus is described that selectively absorbs electromagnetic radiation. The apparatus includes a conducting surface, a dielectric layer formed on the conducting surface, and a plurality of conducting particles distributed on the dielectric layer. The dielectric layer can be formed from a material and a thickness selected to yield a specific absorption spectrum. Alternatively, the thickness or dielectric value of the material can change in response to an external stimulus, thereby changing the absorption spectrum.
    Type: Application
    Filed: April 16, 2013
    Publication date: March 5, 2015
    Applicant: Duke University
    Inventors: David R. Smith, Antoine Moreau, Cristian Ciraci, Jack J. Mock
  • Patent number: 8961935
    Abstract: The present invention relates to a magnetic resonance imaging (MRI) contrast agent coated with carboxylated mannan, particularly a carboxylated mannan coated superparamagnetic MRI contrast agent specifically targeting antigen presenting cells and having excellent in vivo stability, and a method for producing the same. The MRI contrast agent coated with carboxylated mannan of the present invention can provide excellent in vivo stability and biocompatibility owing to its high surface negative charge, and can be introduced specifically into antigen presenting cells owing to mannose of mannan, so as to visualize the antigen presenting cells and the tissue containing the antigen presenting cells in MRI.
    Type: Grant
    Filed: April 15, 2011
    Date of Patent: February 24, 2015
    Assignee: Intron Biotechnology, Inc.
    Inventors: Seong Jun Yoon, Soo Youn Jun, An Sung Kwon, Sang Hyeon Kang, Yong Yeon Jeong, In Kyu Park, Chong Su Cho, You Kyoung Kim, Won Jong Kim, Ran Namgung
  • Patent number: 8962731
    Abstract: This disclosure relates to a method of preparing a metal nanobelt. According to the method, a metal nanobelt having various applicabilities, for example, capable of easily forming a conductive film or a conductive pattern with excellent conductivity, may be easily prepared by a simple process at room temperature and atmospheric pressure. The method comprises reacting a conductive polymer and a metal salt.
    Type: Grant
    Filed: March 10, 2011
    Date of Patent: February 24, 2015
    Assignee: LG Chem, Ltd.
    Inventors: Won-Jong Kwon, Sung-Ho Yoon, Kyung-Hoon Lee
  • Patent number: 8957318
    Abstract: Zinc salts have been found to provide anticorrosion properties when incorporated into silver nanowire containing films. Such salts may be incorporated into one of more silver nanowire containing layers or in one or more layers disposed adjacent to the silver nanowire containing layers.
    Type: Grant
    Filed: February 18, 2014
    Date of Patent: February 17, 2015
    Assignee: Carestream Health, Inc.
    Inventors: Chaofeng Zou, James B. Philip, Jr., Brian C. Willett
  • Publication number: 20150044383
    Abstract: Systems, methods, and devices of the various embodiments provide thermoset (or thermoplastic)/carbon nanotube (CNT) sheet nanocomposites fabricated by resistive heating assisted infiltration and cure (RHAIC) of a polymer matrix resin. In an embodiment, resin infusion may achieved by applying a first lower voltage to a CNT reinforcement. Once the resin infusion process is complete, the voltage may be increased to a second higher voltage which may rapidly cure the polymer matrix. In an embodiment, an epoxy SC-85 and hardener may be used. In another embodiment, present a bismaleimide (BMI) may be used for the matrix material.
    Type: Application
    Filed: July 10, 2014
    Publication date: February 12, 2015
    Inventors: Jae-Woo Kim, Godfrey Sauti, Emilie J. Siochi
  • Patent number: 8951444
    Abstract: In a method for functionalizing a carbon nanotube surface, the nanotube surface is exposed to at least one vapor including at least one functionalization species that non-covalently bonds to the nanotube surface, providing chemically functional groups at the nanotube surface, producing a functionalized nanotube surface. A functionalized nanotube surface can be exposed to at least one vapor stabilization species that reacts with the functionalization layer to form a stabilization layer that stabilizes the functionalization layer against desorption from the nanotube surface while providing chemically functional groups at the nanotube surface, producing a stabilized nanotube surface. The stabilized nanotube surface can be exposed to at least one material layer precursor species that deposits a material layer on the stabilized nanotube surface.
    Type: Grant
    Filed: June 22, 2010
    Date of Patent: February 10, 2015
    Assignee: President and Fellows of Harvard College
    Inventors: Roy G. Gordon, Damon B. Farmer
  • Patent number: 8951567
    Abstract: Discrete microstructures of predefined size and shape are prepared using sol-gel phase-reversible hydrogel templates. An aqueous solution of hydrogel-forming material is covered onto a microfabricated silicon wafer master template having predefined microfeatures, such as pillars. A hydrogel template is formed, usually by lowering the temperature, and the formed hydrogel template is peeled away from the silicon master template. The wells of predefined size and shape on the hydrogel template are filled with a solution or a paste of a water-insoluble polymer, and the solvent is removed to form solid structures. The formed microstructures are released from the hydrogel template by simply melting the hydrogel template in water. The microstructures are collected by centrifugation. The microstructures fabricated by this method exhibit pre-defined size and shape that exactly correspond to the microwells of the hydrogel template.
    Type: Grant
    Filed: September 27, 2008
    Date of Patent: February 10, 2015
    Assignee: Akina, Inc.
    Inventors: Kinam Park, Ghanashyam Acharya, Haesun Park
  • Patent number: 8945409
    Abstract: The present invention provides a porous medium with increased hydrophobicity and a method of manufacturing the same, in which a micro-nano dual structure is provided by forming nanoprotrusions with a high aspect ratio by performing plasma etching on the surface of a porous medium with a micrometer-scale surface roughness and a hydrophobic thin film is deposited on the surface of the micro-nano dual structure, thus significantly increasing hydrophobicity. When this highly hydrophobic porous medium is used as a gas diffusion layer of a fuel cell, it is possible to efficiently discharge water produced during electrochemical reaction of the fuel cell, thus preventing flooding in the fuel cell. Moreover, it is possible to sufficiently supply reactant gases such as hydrogen and air (oxygen) to a membrane electrode assembly (MEA), thus improving the performance of the fuel cell.
    Type: Grant
    Filed: August 16, 2011
    Date of Patent: February 3, 2015
    Assignees: Hyundai Motor Company, Korea Institute of Science and Technology
    Inventors: Bo Ki Hong, Sae Hoon Kim, Kwang Ryeol Lee, Myoung Woon Moon
  • Patent number: 8945410
    Abstract: Disclosed is a fuel cell with enhanced mass transfer characteristics in which a highly hydrophobic porous medium, which is prepared by forming a micro-nano dual structure in which nanometer-scale protrusions with a high aspect ratio are formed on the surface of a porous medium with a micrometer-scale roughness by plasma etching and then by depositing a hydrophobic thin film thereon, is used as a gas diffusion layer, thereby increasing hydrophobicity due to the micro-nano dual structure and the hydrophobic thin film. When this highly hydrophobic porous medium is used as a gas diffusion layer for a fuel cell, it is possible to reduce water flooding by efficiently discharging water produced by an electrochemical reaction of the fuel cell and to improve the performance of the fuel cell by facilitating the supply of reactant gases such as hydrogen and air (oxygen) to a membrane-electrode assembly (MEA).
    Type: Grant
    Filed: June 19, 2012
    Date of Patent: February 3, 2015
    Assignees: Hyundai Motor Company, Korea Institute of Science and Technology
    Inventors: Bo Ki Hong, Sae Hoon Kim, Kook Il Han, Kwang Ryeol Lee, Myoung Woon Moon
  • Patent number: 8940244
    Abstract: The present invention relates to hierarchical structured nanotubes, to a method for preparing the same and to an application for the same, wherein the nanotubes include a plurality of connecting nanotubes for constituting a three-dimensional multi-dendrite morphology; and the method includes the following steps: (A) providing a polymer template including a plurality of organic nanowires; (B) forming an inorganic layer on the surface of the organic nanowires in the polymer template; and (C) performing a heat treatment on the polymer template having the inorganic layer on the surface so that partial atoms of the organic nanowires enter the inorganic layer.
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: January 27, 2015
    Assignee: National Tsing Hua University
    Inventors: Hsueh-Shih Chen, Po-Hsun Chen, Jeng Liang Kuo, Tsong-Pyng Perng
  • Patent number: 8937366
    Abstract: An embodiment of the present disclosure is directed to a semiconductor device. The semiconductor devise comprises a substrate. An epitaxially grown semiconductor material is disposed over at least a portion of the substrate. A nanotemplate structure is disposed at least partially within the semiconductor material. The nanotemplate structure comprises a plurality of dielectric nanoscale features defining a plurality of nanoscale windows. An air gap is disposed between at least a portion of one or more of the nanoscale features and the semiconductor material.
    Type: Grant
    Filed: April 26, 2012
    Date of Patent: January 20, 2015
    Assignee: STC.UNM
    Inventors: Sang M. Han, Darin Leonhardt, Swapnadip Ghosh
  • Patent number: 8912545
    Abstract: A method is provided for fabricating a nanowire-based semiconductor structure. The method includes forming a first nanowire with a first polygon-shaped cross-section having a first number of sides. The method also includes forming a semiconductor layer on surface of the first nanowire to form a second nanowire with a second polygon-shaped cross-section having a second number of sides, the second number being greater than the first number. Further, the method includes annealing the second nanowire to remove a substantial number of vertexes of the second polygon-shaped cross-section to form the nanowire with a non-polygon-shaped cross-section corresponding to the second polygon-shaped cross-section.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: December 16, 2014
    Assignee: Semiconductor Manufacturing International Corp.
    Inventors: Deyuan Xiao, James Hong
  • Publication number: 20140353579
    Abstract: The present invention relates to colloidal quantum dots, to a process for producing such colloidal quantum dots, to the use thereof and to optoelectronic components comprising colloidal quantum dots.
    Type: Application
    Filed: April 3, 2014
    Publication date: December 4, 2014
    Inventors: Tonino Greco, Christian Ippen, Armin Wedel
  • Patent number: 8901672
    Abstract: An intermediate transistor structure includes a fin structure disposed on a surface of an insulating layer. The fin structure has a gate structure disposed thereon between first and second ends of the fin structure. A first portion of the fin structure is a first doped portion that is disposed over a first recess in the surface of the insulating layer and a second portion of the fin structure is a second doped portion disposed over a second recess in the surface of the insulating layer. The intermediate transistor structure further includes source and drain metal disposed around the first and second doped portions, each inducing one of compression strain or tensile strain in a portion of the fin structure that is disposed within the gate structure and that functions during operation of the transistor as a channel of the transistor.
    Type: Grant
    Filed: August 15, 2013
    Date of Patent: December 2, 2014
    Assignee: International Business Machines Corporation
    Inventors: Kangguo Cheng, Bruce B Doris, Pouya Hashemi, Ali Khakifirooz, Alexander Reznicek
  • Publication number: 20140345921
    Abstract: Disclosed are a nanowire composition and a method of fabricating a transparent electrode. The nanowire composition includes a metallic nanowire, an organic binder, a surfactant, and a solvent. The metallic nanowire has a diameter of 30 nm to 50 nm, and a length of 15 ?m to 40 ?m, and a weight percentage of the metallic nanowire is in a range of 0.01% to 0.4%. The method of fabricating the transparent electrode includes preparing a nanowire composition, coating the nanowire composition on a substrate, and performing heat treatment with respect to the nanowire composition. The nanowire composition includes a metallic nanowire, an organic binder, a surfactant, and a solvent, and the metallic nanowire has a diameter of 30 nm to 50 nm, a length of 15 ?m to 40 ?m, and a weight percentage of 0.01% to 0.4%.
    Type: Application
    Filed: December 12, 2012
    Publication date: November 27, 2014
    Inventors: Jong Woon Moon, Sun Young Lee, Bo Ra Kang, Young Sun You, Kyoung Hoon Chai
  • Patent number: 8889044
    Abstract: The present invention relates to a method for producing mesoporous silica particles including a silica-containing outer shell portion with a mesoporous structure. The method includes the steps of: (I) pressurizing a mixed solution containing a hydrophobic organic compound, a surfactant, and an aqueous solvent by a high-pressure emulsification method so as to form an emulsion that includes emulsion droplets containing the hydrophobic organic compound; (II) adding a silica source to the emulsion so as to form a silica-containing outer shell portion with a mesoporous structure on a surface of the emulsion droplets, and precipitating composite silica particles including the outer shell portion and the emulsion droplets on an inner side relative to the outer shell portion; and (III) removing the emulsion droplets from the composite silica particles.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: November 18, 2014
    Assignee: Kao Corporation
    Inventors: Toshihiro Yano, Masaki Komatsu, Hiroji Hosokawa, Jun Yoshida
  • Patent number: 8889217
    Abstract: A method of making a transparent conductive film includes the steps of: providing a carbon nanotube array. At least one carbon nanotube film extracted from the carbon nanotube array. The carbon nanotube films are stacked on the substrate to form a carbon nanotube film structure. The carbon nanotube film structure is irradiated by a laser beam along a predetermined path to obtain a predetermined pattern. The predetermined pattern is separated from the other portion of the carbon nanotube film, thereby forming the transparent conductive film from the predetermined pattern of the carbon nanotube film.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: November 18, 2014
    Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.
    Inventors: Zhuo Chen, Kai-Li Jiang, Shou-Shan Fan
  • Patent number: 8889226
    Abstract: A method of bonding a metal to a substrate is disclosed herein. The method involves forming a nano-brush on a surface of the substrate, where the nano-brush includes a plurality of nano-wires extending above the substrate surface. In a molten state, the metal is introduced onto the substrate surface, and the metal surrounds the nano-wires. Upon cooling, the metal surrounding the nano-wires solidifies, and during the solidifying, at least a mechanical interlock is formed between the metal and the substrate.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: November 18, 2014
    Assignee: GM Global Technology Operations LLC
    Inventors: Michael J. Walker, Bob R. Powell, Jr.
  • Patent number: 8883471
    Abstract: A material comprising positively and negatively charged nanoparticles, wherein one of said nanoparticles contained a magnetically responsive element, are combined with a support molecule, which is a long natural or synthetic molecule or polymer to make a magnetic nanoparticle assembly. When the magnetic nanoparticle assembly is combined with cells, it will magnetize those cells. The magnetized cells can then be washed to remove the magnetic nanoparticle assembly and the magnetized cells manipulated in a magnetic field.
    Type: Grant
    Filed: September 27, 2010
    Date of Patent: November 11, 2014
    Assignee: N3D Biosciences, Inc.
    Inventor: Glauco R. Souza
  • Publication number: 20140319406
    Abstract: A magnetic material is disclosed, which includes magnetic particles containing at least one magnetic metal selected from the group including Fe, Co and Ni, and at least one non-magnetic metal selected from Mg, Al, Si, Ca, Zr, Ti, Hf, Zn, Mn, rare earth elements, Ba and Sr; a first coating layer of a first oxide that covers at least a portion of the magnetic particles; oxide particles of a second oxide that is present between the magnetic particles and constitutes an eutectic reaction system with the first oxide; and an oxide phase that is present between the magnetic particles and has an eutectic structure of the first oxide and the second oxide.
    Type: Application
    Filed: July 14, 2014
    Publication date: October 30, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tomohiro Suetsuna, Seiichi Suenaga, Toshihide Takahashi, Tomoko Eguchi, Koichi Harada, Yasuyuki Hotta
  • Patent number: 8871623
    Abstract: Methods are provided for forming a nanostructure array. An example method includes providing a first layer, providing nanostructures dispersed in a solution comprising a liquid form of a spin-on-dielectric, wherein the nanostructures comprise a silsesquioxane ligand coating, disposing the solution on the first layer, whereby the nanostructures form a monolayer array on the first layer, and curing the liquid form of the spin-on-dielectric to provide a solid form of the spin-on-dielectric. Numerous other aspects are provided.
    Type: Grant
    Filed: April 11, 2014
    Date of Patent: October 28, 2014
    Assignee: SanDisk Corporation
    Inventors: Jian Chen, Karen Chu Cruden, Xiangfeng Duan, Chao Liu, J. Wallace Parce
  • Patent number: 8859050
    Abstract: A method for forming a nanoporous film pattern on a substrate comprising imparting differential surface energy to a surface of a substrate to define first areas having a first surface energy conducive to maintenance of a nanoporous film thereon and second areas having a second surface energy non-conducive to maintenance of a nanoporous film thereon, said first and second areas defining a differential surface energy pattern on the substrate; depositing a nanoporous film precursor onto the differential surface energy pattern; and curing the nanoporous film precursor to form the nanoporous film pattern.
    Type: Grant
    Filed: March 14, 2011
    Date of Patent: October 14, 2014
    Assignee: The Curators of the University of Missouri
    Inventors: Venumadhav Korampally, Shubhra Gangopadhyay, Keshab Gangopadhyay
  • Patent number: 8859423
    Abstract: Embodiments of methods for fabricating polymer nanostructures and nanostructured electrodes are disclosed. Material layers are deposited onto polymer nanostructures to form nanostructured electrodes and devices including the nanostructured electrodes, such as photovoltaic cells, light-emitting diodes, and field-effect transistors. Embodiments of the disclosed methods are suitable for commercial-scale production of large-area nanostructured polymer scaffolds and large-area nanostructured electrodes.
    Type: Grant
    Filed: August 11, 2011
    Date of Patent: October 14, 2014
    Assignee: The Arizona Board of Regents on behalf of the University of Arizona
    Inventors: Jayan Thomas, Nasser N. Peyghambarian, Robert A. Norwood, Palash Gangopadhyay, Akram A. Khosroabadi
  • Patent number: 8853020
    Abstract: Extension regions 7 are formed through implantation using offset sidewalls 6a of a footing profile as a mask, and sidewalls 9 are formed on the offset sidewalls 6a so that source and drain regions 10 are formed into the sidewall through implantation, so that the extension regions 7 are made separated away from both edges of the gate, contributing to enlargement in an effective gate length, and dealing with the narrowed gate pitch, without increasing the number of processes.
    Type: Grant
    Filed: May 25, 2011
    Date of Patent: October 7, 2014
    Assignee: PS4 Luxco S.a.r.l.
    Inventor: Mika Nishisaka
  • Patent number: 8841189
    Abstract: An intermediate transistor structure includes a fin structure disposed on a surface of an insulating layer. The fin structure has a gate structure disposed thereon between first and second ends of the fin structure. A first portion of the fin structure is a first doped portion that is disposed over a first recess in the surface of the insulating layer and a second portion of the fin structure is a second doped portion disposed over a second recess in the surface of the insulating layer. The intermediate transistor structure further includes source and drain metal disposed around the first and second doped portions, each inducing one of compression strain or tensile strain in a portion of the fin structure that is disposed within the gate structure and that functions during operation of the transistor as a channel of the transistor. A method to fabricate the structure is also disclosed.
    Type: Grant
    Filed: June 14, 2013
    Date of Patent: September 23, 2014
    Assignee: International Business Machines Corporation
    Inventors: Kangguo Cheng, Bruce B Doris, Pouya Hashemi, Ali Khakifirooz, Alexander Reznicek