Patents Examined by Anthony Ho
  • Patent number: 11683947
    Abstract: An organic light emitting display device may include a substrate, a first pixel electrode on the substrate, a pixel defining layer on the substrate, the pixel defining layer having an opening exposing a portion of the first pixel electrode, a second pixel electrode on the portion of the first pixel electrode exposed by the opening, a hole injection layer on the second pixel electrode, the hole injection layer including a metal oxide, an organic light emitting layer on the hole injection layer; and a common electrode on the organic light emitting layer.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: June 20, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sungjoo Kwon, Hyuneok Shin, Juhyun Lee
  • Patent number: 11680476
    Abstract: Disclosed herein are devices, systems and methods useful for downhole sensors and electronics suitable for harsh thermal and mechanical environment associated with high-temperature geothermal drilling and high-temperature/high-pressure oil and gas drilling.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: June 20, 2023
    Assignee: Alliance for Sustainable Energy, LLC
    Inventors: David Samuel Ginley, Philip Anthony Parilla, Daniel Joseph Friedman
  • Patent number: 11682636
    Abstract: A method includes encapsulating a package component in an encapsulating material, with the encapsulating material including a portion directly over the package component. The portion of the encapsulating material is patterned to form an opening revealing a conductive feature in the package component. A redistribution line extends into the opening to contact the conductive feature. An electrical connector is formed over and electrically coupling to the conductive feature.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: June 20, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Po-Han Wang, Yu-Hsiang Hu, Hung-Jui Kuo, Chen-Hua Yu
  • Patent number: 11678485
    Abstract: A vertical memory device, including: a substrate including a cell array region and an extension region; gate electrodes stacked on each other with a plurality of levels, wherein each of the gate electrodes includes a pad, and wherein the pads disposed on the gate electrodes form at least one staircase structure on the extension region of the substrate; a channel extending in a first direction on the cell array region of the substrate through at least one of the gate electrodes; and dummy gate electrode groups disposed on the extension region of the substrate, wherein the dummy gate electrode groups includes dummy gate electrodes, wherein each of the dummy gate electrodes are spaced apart from a corresponding gate electrode among the gate electrodes stacked at a same level, wherein the dummy gate electrode groups are spaced apart from each other in a second direction.
    Type: Grant
    Filed: January 20, 2020
    Date of Patent: June 13, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Seok-Cheon Baek
  • Patent number: 11678523
    Abstract: A display device includes a base layer on which a display area and a non-display area are defined, a circuit layer including a first power electrode and driving circuits, which are disposed in the non-display area, a first planarization layer in which a first opening through which the first power electrode is exposed is defined and which covers the driving circuits, a second power electrode disposed on the first planarization layer to contact the first power electrode that is exposed through the first opening and overlapping at least a portion of the driving circuits, and a second planarization layer disposed on the first planarization layer to cover a portion of the second power electrode and having a groove part in an area overlapping the first planarization layer and the second power electrode in a plan view.
    Type: Grant
    Filed: January 14, 2022
    Date of Patent: June 13, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Zail Lhee, Keunsoo Lee
  • Patent number: 11670717
    Abstract: A semiconductor device includes a fin feature in a substrate, a stack of semiconductor layers over the fin feature. Each of the semiconductor layers does not contact each other. The device also includes a semiconductor oxide layer interposed between the fin feature and the stack of the semiconductor layers. A surface of the semiconductor oxide layer contacts the fin feature and an opposite surface of the semiconductor oxide layer contacts a bottom layer of the stack of semiconductor layers. The device also includes a conductive material layer encircling each of the semiconductor layers and filling in spaces between each of two semiconductor layers.
    Type: Grant
    Filed: June 22, 2020
    Date of Patent: June 6, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Lien Huang, Tung Ying Lee, Chun-Hsiang Fan
  • Patent number: 11666046
    Abstract: Apparatus and associated methods relate to a pest repelling magnetic field generating device (PRD) having a temperature sensor to detect the temperature of a solenoid coil during operation. The detected temperature to be used to ensure that the PRD operates within an ideal temperature range. Additionally, a fan is oriented within a housing of the PRD to force the flow of air from inside a housing of the PRD to outside a housing the PRD. In an illustrative example, the PRD may shut off if the temperature of the solenoid coil moves outside the ideal temperature range. By operating the PRD within an ideal temperature range, the service life of the PRD may be extended. Further, the fan may mitigate dust collection within the housing of the pest repelling magnetic field generating device.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: June 6, 2023
    Assignee: Scopat Properties, LLC
    Inventor: Raymond Connell
  • Patent number: 11672168
    Abstract: A light emitting element includes: a member including a semiconductor layer and an active layer; and at least one ligand bonded to a surface of the member; wherein the at least one ligand includes: a first ligand including two or more functional group chains; and a second ligand having a shorter carbon length than the first ligand.
    Type: Grant
    Filed: April 5, 2021
    Date of Patent: June 6, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: YunKu Jung, YunHyuk Ko, HyoJin Ko, DukKi Kim, JunBo Sim, JaeKook Ha
  • Patent number: 11672148
    Abstract: A first organic resin layer is formed over a first substrate; a first insulating film is formed over the first organic resin layer; a first element layer is formed over the first insulating film; a second organic resin layer is formed over a second substrate; a second insulating film is formed over the second organic resin layer; a second element layer is formed over the second insulating film; the first substrate and the second substrate are bonded; a first separation step in which adhesion between the first organic resin layer and the first substrate is reduced; the first organic resin layer and a first flexible substrate are bonded with a first bonding layer; a second separation step in which adhesion between the second organic resin layer and the second substrate is reduced; and the second organic resin layer and a second flexible substrate are bonded with a second bonding layer.
    Type: Grant
    Filed: May 4, 2021
    Date of Patent: June 6, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masakatsu Ohno, Hiroki Adachi, Satoru Idojiri, Koichi Takeshima
  • Patent number: 11664171
    Abstract: The present application discloses stilbene derivative compounds and phenyl-benzofuran compositions, useful in the manufacture of dye-sensitized solar cells and other similar technology.
    Type: Grant
    Filed: May 8, 2018
    Date of Patent: May 30, 2023
    Assignee: AMBIENT PHOTONICS, INC.
    Inventor: John C. Warner
  • Patent number: 11664438
    Abstract: A method for forming a semiconductor structure includes providing a semiconductor substrate, forming a sacrificial layer over the semiconductor substrate, etching the sacrificial layer to form a sacrificial pattern, etching the semiconductor substrate using the sacrificial pattern as an etching mask to form an active region of the semiconductor substrate, trimming the sacrificial pattern, and replacing the trimmed sacrificial pattern with a gate electrode.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: May 30, 2023
    Assignee: WINBOND ELECTRONICS CORP.
    Inventors: Shu-Ming Lee, Yung-Han Chiu, Chia-Hung Liu, Tzu-Ming Ou Yang
  • Patent number: 11664305
    Abstract: An interconnect structure is disclosed. The interconnect structure includes a first line of interconnects and a second line of interconnects. The first line of interconnects and the second line of interconnects are staggered. The individual interconnects of the second line of interconnects are laterally offset from individual interconnects of the first line of interconnects. A dielectric material is adjacent to at least a portion of the individual interconnects of at least one of the first line of interconnects and the second line of interconnects.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: May 30, 2023
    Assignee: Intel Corporation
    Inventors: Kevin Lai Lin, Manish Chandhok, Miriam Reshotko, Christopher Jezewski, Eungnak Han, Gurpreet Singh, Sarah Atanasov, Ian A. Young
  • Patent number: 11665946
    Abstract: A display panel, a display device, and a method for manufacturing the display panel are provided. The display panel includes two electrode layers and a luminous functional layer stacked between the two electrode layers. Each electrode layer has a first surface and a second surface opposite to each other in a thickness direction thereof. The first surface of each electrode layer is attached to and in contact with the luminous functional layer. Each electrode layer includes at least one insulation section and at least one electrode section integrated as a single body. A material of the electrode section is a conductively modified form of a material of the insulation section. The electrode section is in contact with the luminous functional layer and is in a conductive state at least at the first surface. The electrode layer in the present disclosure has no conductive pattern and will not cause optical disturbance.
    Type: Grant
    Filed: April 16, 2021
    Date of Patent: May 30, 2023
    Assignee: YUNGU (GU'AN) TECHNOLOGY CO., LTD.
    Inventors: Li Lin, Shixing Cai, Junhui Lou
  • Patent number: 11659731
    Abstract: An integrated light-emitting device and a fabricating method thereof. The integrated light-emitting device includes a first electrode, an insulating layer, a second electrode, a light-emitting layer, and a third electrode which are sequentially laminated; the first electrode, the insulating layer, the second electrode, and the third electrode together constitute a field effect transistor unit, and the first electrode, the second electrode and the third electrode are respectively a gate, a source and a drain of the field effect transistor unit, and a surface of the insulating layer adjacent to the second electrode is provided with a nano-pit array structure configured for condensing light; and the second electrode, the light-emitting layer and the third electrode together constitute a light-emitting unit, the light-emitting unit configured to emit light toward the first electrode along the second electrode.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: May 23, 2023
    Assignee: TCL TECHNOLOGY GROUP CORPORATION
    Inventors: Hui Lei, Weiran Cao, Lei Qian
  • Patent number: 11654590
    Abstract: An example system includes a cutting tool and a device configured to remotely control the cutting tool. In response to receiving information indicative of actuation of a first user interface item, the device sends a first signal to the cutting tool so as to request enabling the cutting tool to be operated remotely. The cutting tool sends a second signal to the device indicating that remote operation of the cutting tool has been enabled. The cutting tool receives information indicating that the trigger has been activated, and sends a third signal to the device indicating that the cutting tool is ready to perform a cutting operation. The device receives information indicative of actuation of a second user interface item, and responsively, sends a fourth signal to the cutting tool so as to cause the cutting tool to perform the cutting operation.
    Type: Grant
    Filed: August 17, 2021
    Date of Patent: May 23, 2023
    Assignee: Milwaukee Electric Tool Corporation
    Inventors: Luke J. Skinner, Burtrom L. Stampfl, Timothy J. Bartlett, Carter H. Ypma, Timothy R. Obermann, Benjamin O. Cabot, Kris J. Kanack, Thomas C. Hanks, Ian C. Zimmermann
  • Patent number: 11652126
    Abstract: An event-based vision sensor is fabricated using an advanced stacking technique, known as Three-Dimensional Integrated Circuit, which stacks more wafers (or dies) and interconnects them vertically. The electronic integrated circuits of the sensor are then distributed between the two or more electrically connected dies.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: May 16, 2023
    Assignee: SONY ADVANCED VISUAL SENSING AG
    Inventors: Raphael Berner, Christian Brändli, Massimo Zannoni
  • Patent number: 11653514
    Abstract: A light-emitting device is provided. The light-emitting device includes an anode, a cathode, and a combined charge transport and emissive layer (CCTEL) disposed between the anode and the cathode. The CCTEL includes a crosslinked charge transport material, a first plurality of quantum dots having a first energy gap, and a second plurality of quantum dots having a second energy gap wider than the first energy gap.
    Type: Grant
    Filed: May 18, 2021
    Date of Patent: May 16, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Alessandro Minotto, Valerie Berryman-Bousquet
  • Patent number: 11641755
    Abstract: A top-emission type organic electroluminescent (EL) element and a top-emission type organic EL device are provided. The top-emission type organic EL element includes a first electrode, an organic functional layer disposed on the first electrode, and a second electrode disposed on a side of the organic functional layer facing away from the first electrode. The second electrode includes a work-function adjustment layer and a transparent metal oxide layer. The work-function adjustment layer is disposed on the side of the organic functional layer facing away from the first electrode, and the transparent metal oxide layer is disposed on a side of the work-function adjustment layer facing away from the organic functional layer. The top-emission type organic EL element and the top-emission type organic EL device can improve the luminous efficiency and prolong the service life.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: May 2, 2023
    Assignee: XIANYANG CAIHONG OPTOELECTRONICS TECHNOLOGY CO., LTD
    Inventors: Qizhe Cai, Yuanyuan Qi
  • Patent number: 11637045
    Abstract: Embodiments described herein provide an anisotropic conductive film (ACF) positioned on a semiconductor package and techniques of using the ACF to test semiconductor devices positioned in or on the semiconductor package. In one example, a semiconductor package comprises: a die stack comprising one or more dies; a molding compound encapsulating the die stack; a substrate on the molding compound; a contact pad on a surface of the substrate and coupled to the die stack; a test pad on the surface of the substrate; a conductive path between the contact pad and the test pad, where an electrical break is positioned along the conductive path; and an ACF over the electrical break. Compressing the ACF by a test pin creates an electrical path that replaces the electrical break. Data can be acquired by test pin and provided to a test apparatus, which determines whether the dies in the die stack are operating properly.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: April 25, 2023
    Assignee: Intel Corporation
    Inventor: Hyoung Il Kim
  • Patent number: 11638381
    Abstract: The present invention discloses a thin-film light-emitting device including a charge generating junction layer and a method of fabricating the thin-film light-emitting device. The thin-film light-emitting device including a charge generating junction layer according to one embodiment of the present invention includes a negative electrode; at least one light-emitting unit formed on the negative electrode and including a charge generating junction layer, an electron injection/transport layer, a thin-film light-emitting layer, and a hole injection/transport layer in a sequential order; and a negative electrode formed on the light-emitting unit.
    Type: Grant
    Filed: June 9, 2022
    Date of Patent: April 25, 2023
    Assignee: UNIVERSITY-INDUSTRY COOPERATION GROUP OF KYUNG HEE UNIVERSITY
    Inventors: Jin Jang, Hyo Min Kim