Abstract: A method for predicting failure parameters of semiconductor devices can include receiving a set of data that includes (i) characteristics of a sample semiconductor device, and (ii) parameters characterizing a stress condition. The method further includes extracting a plurality of feature values from the set of data and inputting the plurality of feature values into a trained model executing on the one or more processors, wherein the trained model is configured according to an artificial intelligence (AI) algorithm based on a previous plurality of feature values, and wherein the trained model is operable to output a failure prediction based on the plurality of feature values. Further, the method includes generating, via the trained model, a predicted failure parameter of the sample semiconductor device due to the stress condition.

Abstract: A flaw detection apparatus for use with a tubular has a helixing conveyor adapted to receive the tubular thereon, a frame positioned over a center section of the helixing conveyor, and a plurality of inspection devices retained by the frame so as to detect flaws in the tubular as said helixing conveyor moves the tubular through the frame. The helixing conveyor has a plurality of sets of rollers that are angularly adjustable relative to a longitudinal axis of the helixing conveyor. The plurality of inspection devices include a longitudinal inspection device, a Hall Effect wall thickness inspection device, an oblique inspection device, a transverse inspection device, and a grade verification/comparator device.

Abstract: An over-the-air (OTA) measurement system is described. The OTA measurement system includes a plurality of measurement antennas, a DUT positioner, and a controller (e.g., control circuit). The DUT positioner is configured to position a device under test at a test location. At least two measurement antennas of the plurality of measurement antennas are arranged at different distances from the test location. The at least two measurement antennas are arranged at different elevation angles and/or at different azimuth angles with respect to the test location. The controller is configured to control the DUT positioner to rotate the device under test at the test location in azimuth and/or elevation. The controller is configured to control the DUT positioner to rotate the device under test into a first orientation for a first OTA power measurement by a first one of the at least two measurement antennas.

Abstract: A tester for a relay comprises an enclosure, a testing circuit that includes a controller, electronic switch components, a power source, indicator LEDs, a test start switch, a relay selector switch, and five electric leads each connected with one terminal of the relay. With the relay selector switch toggled to indicate the type of relay being tested, with power supplied to each lead, and with the test start switch actuated, the controller sets each lead to ground, in turn, and then count the number of other leads that are grounded as a result. The controller then illuminates the at least one indicator to indicate either the passing relay test or the failed relay test based on the counts measured. Once the leads connected to the relay coil are identified, cyclic testing of the relay can be performed.

Abstract: Methods and apparatus relating to processor and chipset continuity testing of package interconnect for functional safety applications are described. In an embodiment, voltage divider logic circuitry divides a reference voltage. Controller logic circuitry compares a divided voltage value from a node of the voltage divider logic circuitry and a threshold voltage value. A first end of the voltage divider logic circuitry is coupled to receive the reference voltage and a second end of the voltage divider logic circuitry is coupled to a Non-Critical-To-Function (NCTF) solder ball. The controller logic circuitry generates an error signal in response to a mismatch between the divided voltage value and the threshold voltage value. Other embodiments are also disclosed and claimed.

Abstract: A method of training a neural network modeling physical phenomena of semiconductor material includes receiving plurality of training pairs corresponding to a semiconductor material. Each training pair comprises an input charge to a distinct voxel of the semiconductor material and one or more output signals generated by the distinct voxel in response to the input charge. A neural network is trained using the training pairs. The neural network models the semiconductor material and each voxel is represented in the neural network by a tensor field defined by (i) a location of the voxel within the semiconductor material and (ii) one or more physics-based phenomena within the voxel at the location.

Abstract: The invention relates to means for a calibration standards-compliant determination of the electrical energy transferred from a charging station, which make a measurement at the transfer point, that is to say at the vehicle-side end of the charging cable, unnecessary. Here, the electrical energy transferred from a charging station is determined by a measurement of the energy before the transfer point, wherein the reactive power component from the termination point as far as the transfer point is compensated. The reactive power component is determined from at least one second electrical variable, for example a resistance of a conductor or a conductor shield, which is in a fixed relationship with an analog electrical variable that is relevant to the transferred electrical energy, for example an ohmic total resistance of at least two conductors involved in a charging circuit.

Abstract: Various embodiments relate to detecting loss of electrical energy. A method of detecting loss of electrical energy may include determining, for a number of time samples, a neutral current and an imputed neutral current of an electrical energy metering system. Further, the method may include determining, for each of the number of time samples, a squared difference between the neutral current and the imputed neutral current. The method may further include detecting, based on the squared difference, loss of electrical energy from the electrical energy metering system.

Abstract: Detecting whether a target device that includes multiple electronic components is genuine or suspected counterfeit by: performing a test sequence of energizing and de-energizing the target device and collecting electromagnetic interference (EMI) signals emitted by the target device; generating a target EMI fingerprint from the EMI signals collected; retrieving a plurality of reference EMI fingerprints from a database library, each of which corresponds to a different configuration of electronic components of a genuine device of the same make and model as the target device; iteratively comparing the target EMI fingerprint to the retrieved reference EMI fingerprints and generating a similarity metric between each compared set; and indicating that the target device (i) is genuine where the similarity metric for any individual reference EMI fingerprint satisfies a threshold test, and is a suspect counterfeit device where no similarity metric for any individual reference EMI fingerprint satisfies the test.

Abstract: A signal generating device for generation of measurement signals for an electrical system includes a housing which features an electrically conducting material, an energy reservoir arranged in the housing, a data interface arranged at the housing and designed to receive signal data, a coupling interface arranged at the housing and coupled to the electrical system, and a signal generator arranged in the housing. The signal generator is coupled to the electrical energy reservoir, to the data interface and to the coupling interface. The signal generator is designed, based on the signal data, to generate the measurement signals and to output them via the coupling interface. A corresponding measuring device is also included.

Abstract: An inspection apparatus includes: a plurality of inspection devices configured to respectively inspect electronic devices of inspection objects on a plurality of chuck tops; a measurement device configured to measure height positions of a plurality of points on a surface of each of the plurality of chuck tops, which are respectively disposed to correspond to the plurality of inspection devices, or to measure distances in a height direction from a measurement reference point to the plurality of points; a calculation device configured to calculate adjustment amounts in the height direction at the plurality of points of each chuck top, based on the height positions of the plurality of points or the distances in the height direction from the measurement reference point to the plurality of points; and an adjustment mechanism configured to adjust, for each chuck top, an angle of the respective chuck top based on the adjustment amounts.

Abstract: The invention relates to a broadband high power amplifier that comprises a signal input adapted to receive an input signal, at least one amplifier stage adapted to amplify the received input signal, a signal output adapted to output the signal amplified by the at least one amplifier stage as an output signal, a monitoring unit adapted to monitor signal characteristics of the input signal and the output signal and a control unit adapted to operate the at least one amplifier stage at an optimal operating point depending on the current signal characteristics monitored by said monitoring unit.

Abstract: A voltage tracking circuit includes a first, second, third and fourth transistor. The first transistor is in a first well, and includes a first gate, a first drain and a first source coupled to a first voltage supply. The second transistor includes a second gate, a second drain and a second source. The second source is coupled to the first drain. The second gate is coupled to the first gate and the pad voltage terminal. The third transistor includes a third gate, a third drain and a third source. The fourth transistor includes a fourth gate, a fourth drain and a fourth source. The fourth drain is coupled to the third source. The fourth source is coupled to the pad voltage terminal. At least the third transistor is in a second well different from the first well, and is separated from the first well in a first direction.

Abstract: The present invention concerns a heating assembly (10, 15) for generating heat in order to carry out temperature-dependent tests on an electronic component (3, 200) arranged inside a socket (2), the heating assembly (10, 15) comprising: A heating device (10) comprising an electrically conductive material (25) in such a manner as to allow the passage of an electrical current to produce heat. According to the invention, the assembly further comprises: A covering (15) of a thermally insulating material suitable for containing said heating device (10) inside, the covering having at least one opening at one side for allowing the heat diffusion through said opening; Fastening means for fastening said covering (15) to a support surface (5B), in such a manner that, while used, the heating device (10), arranged inside said covering (15), faces said support surface (5B) through said opening.

Abstract: A device having an impedance measurement circuit that allows for reduction of flicker noise can be implemented in a variety of applications. A carrier suppression technique can be implemented that substantially removes the carrier signal with removal of noise artifacts associated with the carrier signal from sidebands of the carrier signal. Carrier suppression in an AC impedance measurement circuit can be implemented by sensing a carrier signal of the measurement circuit at a transmit location of the measurement circuit and subtracting a weighted version of the carrier signal at a receive location of the measurement circuit. One or more compensation impedances can be used such that the sidebands of the carrier signal are received with the carrier signal suppressed with respect to the receive location.

Abstract: A method of calibrating a thermal sensor device is provided. The method includes extracting an incremental voltage to temperature curve for a diode array from a first incremental voltage of the diode array at a first temperature. The diode array and a device under test (DUT) which includes a thermal sensor are heated. After heating the diode array, a first incremental temperature is determined from the incremental voltage to temperature curve for the diode array and a second incremental voltage of the diode array after heating the diode array. An incremental voltage to temperature curve is extracted for the DUT from the first incremental temperature, a first incremental voltage for the DUT at the first temperature, and a second incremental voltage of the DUT after heating the device under test. A temperature error for the thermal sensor is determined from the incremental voltage to temperature curve for the DUT.

Abstract: A test system, a method for manufacturing an electronic device, and a method for testing a wafer or electronic device that includes coupling a transistor in a series circuit with a capacitor and a resistor, coupling a voltage source to the capacitor to charge the capacitor to a non-zero DC voltage while the transistor is turned off, disconnecting the voltage source from the capacitor while the transistor is turned off, turning the transistor on while the voltage source is disconnected from the capacitor, measuring a voltage signal across the resistor while the transistor is turned on, and determining a test result indicating whether the transistor has an acceptable dynamic on-state resistance according to the voltage signal across the resistor.

Abstract: Sampling timings at a plurality of measurement points at which waveform data of a power line is sampled are easily synchronized to each other. A measurement device includes: a sampling unit configured to sample a waveform of at least one of a voltage and a current at a measurement point of a power line at a predetermined sampling timing; a processing unit configured to execute processing of the waveform sampled by the sampling unit; a time information acquisition unit configured to acquire time information from a time information provision device that is communicatively connected through a network; and an adjustment unit configured to adjust a processing timing of the processing on the basis of the time information acquired by the time information acquisition unit.

Abstract: A current sensing circuit includes a sensing resistor, a current monitor, a variable resistor, and a processor. The sensing resistor is disposed on a to-be-sensed circuit and coupled between first and second first voltage terminals of the to-be-sensed circuit. The current monitor includes first and second terminals. A first winding is coupled between the first terminal and the first voltage terminal, and a second winding is coupled between the second terminal and the second voltage terminal. The variable resistor is connected in series with the first winding between the first voltage terminal and the first terminal. The current monitor obtains a sensed current according to a first voltage on the first terminal, a second voltage on the second terminal, and an impedance of the sensing resistor and generates a sensing signal. The processor determines whether to adjust an impedance of the variable resistor according to the sensing signal.

Abstract: A wafer probe test system includes a chuck to support a wafer, and a probe card having a first side to face the chuck, an opposite second side, and an aperture that extends between the first and second sides. The system also includes a probe head mounted to the first side of the probe card and having probe pins to contact a device under test of the wafer, and an infra-red thermal sensor facing the aperture of the probe card to sense a temperature of the wafer.