With Decomposition Of A Precursor (except Impurity Or Dopant Precursor) Composed Of Diverse Atoms (e.g., Cvd) Patents (Class 117/88)
  • Patent number: 8192713
    Abstract: A method of incorporating a mark of origin, such as a brand mark, or fingerprint in a CVD single crystal diamond material, includes the steps of providing a diamond substrate, providing a source gas, dissociating the source gas thereby allowing homoepitaxial diamond growth, and introducing in a controlled manner a dopant into the source gas in order to produce the mark of origin or fingerprint in the synthetic diamond material. The dopant is selected such that the mark of origin or fingerprint is not readily detectable or does not affect the perceived quality of the diamond material under normal viewing conditions, but which mark of origin or fingerprint is detectable or rendered detectable under specialised conditions, such as when exposed to light or radiation of a specified wavelength, for example. Detection of the mark of origin or fingerprint may be visual detection or detection using specific optical instrumentation, for example.
    Type: Grant
    Filed: December 10, 2004
    Date of Patent: June 5, 2012
    Inventors: Daniel James Twitchen, Geoffrey Alan Scarsbrook, Philip Maurice Martineau, Paul Martyn Spear
  • Patent number: 8188512
    Abstract: A method of growing a germanium (Ge) epitaxial thin film having negative photoconductance characteristics and a photodiode using the same are provided. The method of growing the germanium (Ge) epitaxial thin film includes growing a germanium (Ge) thin film on a silicon substrate at a low temperature, raising the temperature to grow the germanium (Ge) thin film, and growing the germanium (Ge) thin film at a high temperature, wherein each stage of growth is performed using reduced pressure chemical vapor deposition (RPCVD). The three-stage growth method enables formation of a germanium (Ge) epitaxial thin film characterized by alleviated stress on a substrate, a lowered penetrating dislocation density, and reduced surface roughness.
    Type: Grant
    Filed: August 5, 2009
    Date of Patent: May 29, 2012
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sang Hoon Kim, Gyung Ock Kim, Dong Woo Suh, Ji Ho Joo
  • Patent number: 8187382
    Abstract: A polycrystalline silicon manufacturing apparatus is provided which supplies raw gas to the inside of a reaction furnace and supplies a current from an electrode to a silicon seed rod in a state where the vertically extending silicon seed rod is uprightly stood on each of the plural electrodes disposed in a bottom plate portion of the reaction furnace so as to heat the silicon seed rod and thus to deposit polycrystalline silicon on a surface of the silicon seed rod by means of the reaction of the raw gas.
    Type: Grant
    Filed: March 20, 2009
    Date of Patent: May 29, 2012
    Assignee: Mitsubishi Materials Corporation
    Inventors: Toshihide Endoh, Masayuki Tebakari, Toshiyuki Ishii, Masaaki Sakaguchi
  • Publication number: 20120118226
    Abstract: Fracture toughness of AlGaN single-crystal substrate is improved and its absorption coefficient reduced. A nitride semiconductor single-crystal substrate has a composition represented by the formula AlxGa1-xN (0?x?1), and is characterized by having a fracture toughness of (1.2?0.7x) MPa•m1/2 or greater and a surface area of 20 cm2, or, if the substrate has a composition represented by the formula AlxGa1-xN (0.5?x?1), by having an absorption coefficient of 50 cm?1 or less in a 350 to 780 nm total wavelength range.
    Type: Application
    Filed: January 13, 2012
    Publication date: May 17, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Shinsuke FUJIWARA, Seiji NAKAHATA
  • Patent number: 8177911
    Abstract: A method of evaluating damage of a compound semiconductor member, comprising: a step of performing measurement of photoluminescence on a surface of the compound semiconductor member; and a step of evaluating damage on the surface of the compound semiconductor member, using a half width of a peak at a wavelength corresponding to a bandgap of the compound semiconductor member, in an emission spectrum obtained by the measurement of photoluminescence.
    Type: Grant
    Filed: October 11, 2007
    Date of Patent: May 15, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Akihiro Hachigo, Takayuki Nishiura
  • Publication number: 20120104565
    Abstract: When a mixed gas of trichlorosilane and dichlorosilane is used as source gas, a silicon layer is epitaxially grown on a surface of a silicon wafer within a temperature range of 1000 to 1100° C., preferably, 1040 to 1080° C. When dichlorosilane is used as source gas, a silicon layer is epitaxially grown on a surface of a silicon wafer within a temperature range of 900 to 1150° C., preferably, 1000 to 1150° C. According to this, a silicon epitaxial wafer, which has low haze level, excellent flatness (edge roll-off), and reduced orientation dependence of epitaxial growth rate, and is capable of responding to the higher integration of semiconductor devices, can be obtained, and this epitaxial wafer can be used widely in production of semiconductor devices.
    Type: Application
    Filed: July 8, 2010
    Publication date: May 3, 2012
    Applicant: SUMCO CORPORATION
    Inventor: Naoyuki Wada
  • Patent number: 8168000
    Abstract: A method of fabricating a III-nitride power semiconductor device which includes selective prevention of the growth of III-nitride semiconductor bodies to selected areas on a substrate in order to reduce stresses and prevent cracking.
    Type: Grant
    Filed: June 14, 2006
    Date of Patent: May 1, 2012
    Assignee: International Rectifier Corporation
    Inventors: Mike Briere, Robert Beach
  • Publication number: 20120098102
    Abstract: A method of reducing threading dislocation densities in non-polar such as a-{11-20} plane and m-{1-100} plane or semi-polar such as {10-1n} plane III-Nitrides by employing lateral epitaxial overgrowth from sidewalls of etched template material through a patterned mask. The method includes depositing a patterned mask on a template material such as a non-polar or semi polar GaN template, etching the template material down to various depths through openings in the mask, and growing non-polar or semi-polar III-Nitride by coalescing laterally from the tops of the sidewalls before the vertically growing material from the trench bottoms reaches the tops of the sidewalls. The coalesced features grow through the openings of the mask, and grow laterally over the dielectric mask until a fully coalesced continuous film is achieved.
    Type: Application
    Filed: April 25, 2011
    Publication date: April 26, 2012
    Applicants: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Bilge M. Imer, James S. Speck, Steven P. DenBaars
  • Patent number: 8163403
    Abstract: This invention disclosure describes methods for the fabrication of metal oxide films on surfaces by topotactic anion exchange, and laminate structures enabled by the method. A precursor metal-nonmetal film is deposited on the surface, and is subsequently oxidized via topotactic anion exchange to yield a topotactic metal-oxide product film. The structures include a metal-oxide layer(s) and/or a metal-nonmetal layer(s).
    Type: Grant
    Filed: April 13, 2010
    Date of Patent: April 24, 2012
    Inventor: Mark A. Zurbuchen
  • Patent number: 8163085
    Abstract: An apparatus for forming a protective layer of magnesium oxide on a front glass substrate (11) in an evaporation chamber (201) includes the following: oxygen outlet openings (222) for introducing oxygen into the evaporation chamber (201); water vapor outlet openings (210) for introducing water vapor into the evaporation chamber (201) from the downstream side in the transfer direction of the front glass substrate (11); a mass analyzer (224) for measuring the ionic strength of hydrogen and the ionic strength of oxygen in the evaporation chamber (201); and mass flow controllers (215) and (221) for controlling the introduction amount of the water vapor and the introduction amount of the oxygen, respectively, by the ionic strengths measured by the mass analyzer (224).
    Type: Grant
    Filed: September 11, 2006
    Date of Patent: April 24, 2012
    Assignee: Panasonic Corporation
    Inventors: Kazuo Uetani, Kaname Mizokami, Yoshinao Ooe, Akira Shiokawa, Hiroyuki Kado
  • Publication number: 20120074523
    Abstract: The present disclosure relates to the field of epitaxial structures for microelectronic device formation, particularly to heavily doped, substrates having a compensation component embedded along the dopant to prevent bowing of the substrate during deposition of an epitaxial layer.
    Type: Application
    Filed: September 23, 2010
    Publication date: March 29, 2012
    Inventor: Michael Goldstein
  • Patent number: 8143147
    Abstract: A method and apparatus for the deposition of thin films is described. In embodiments, systems and methods for epitaxial thin film formation are provided, including systems and methods for forming binary compound epitaxial thin films. Methods and systems of embodiments of the invention may be used to form direct bandgap semiconducting binary compound epitaxial thin films, such as, for example, GaN, InN and AlN, and the mixed alloys of these compounds, e.g., (In, Ga)N, (Al, Ga)N, (In, Ga, Al)N. Methods and apparatuses include a multistage deposition process and system which enables rapid repetition of sub-monolayer deposition of thin films.
    Type: Grant
    Filed: February 10, 2011
    Date of Patent: March 27, 2012
    Assignee: Intermolecular, Inc.
    Inventors: Philip A. Kraus, Sandeep Nijhawan, Thai Cheng Chua
  • Publication number: 20120067274
    Abstract: A wafer holder used in a film forming apparatus is disclosed. The wafer holder including a boat holding a plurality of wafers and a reaction gas supply part supplying a reaction gas from a side surface of the plurality of wafers held by the boat, and the wafer holder further includes an upper wafer holder being placed to cover an upper surface of each of the plurality of wafers when the plurality of wafer is supported by the boat and including a gas introduction suppression part suppressing an introduction of the reaction gas onto the upper surface of each the plurality of wafers by surrounding each of the plurality of wafers.
    Type: Application
    Filed: February 28, 2011
    Publication date: March 22, 2012
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Daisuke HARA, Kazuhiro SHIMURA, Masaki MUROBAYASHI, Yukitomo HIROCHI
  • Patent number: 8137461
    Abstract: A piezoelectric substrate of a perovskite-type oxide is expressed by a general formula of ABO3 having a laminate structure of a single crystal structure or a uniaxial crystal structure expressed by (Pb1-xMx)xm(ZryTi1-y)O3 (where M represents an element selected from La, Ca, Ba, Sr, Bi, Sb and W). The laminate structure has a first crystal phase layer having a crystal structure selected from a tetragonal structure, a rhombohedral structure, a pseudocubic structure and a monoclinic structure, a second crystal phase layer having a crystal structure different from the crystal structure of said first crystal phase layer and a boundary layer arranged between the first crystal phase layer and the second crystal phase layer with a crystal structure gradually changing in a thickness direction of the layer. The thicknesses of the first and second crystal phase layer differ.
    Type: Grant
    Filed: September 4, 2009
    Date of Patent: March 20, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takanori Matsuda, Toshihiro Ifuku
  • Publication number: 20120060750
    Abstract: An oxide semiconductor film with excellent crystallinity is formed. At the time when an oxide semiconductor film is formed, as a substrate is heated to a temperature of higher than or equal to a first temperature and lower than a second temperature, a part of the substrate having a typical length of 1 nm to 1 ?m is heated to a temperature higher than or equal to the second temperature. Here, the first temperature means a temperature at which crystallization occurs with some stimulation, and the second temperature means a temperature at which crystallization occurs spontaneously without any stimulation. Further, the typical length is defined as the square root of a value obtained in such a manner that the area of the part is divided by the circular constant.
    Type: Application
    Filed: August 30, 2011
    Publication date: March 15, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Shunpei YAMAZAKI
  • Patent number: 8133802
    Abstract: The present invention provides silicon-germanium hydride compounds, methods for their synthesis, methods for their deposition, and semiconductor structures made using the compounds. The compounds are defined by formula: SiHnI (GeHn2)y, wherein y is 2, 3, or 4 wherein n1 is 0 1, 2 or 3 to satisfy valency and wherein n2 is independently 0, 1, 2 or 3 for each Ge atom in the compound, to satisfy valency.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: March 13, 2012
    Assignee: Arizona Board of Regents
    Inventors: John Kouvetakis, Cole J. Ritter, III
  • Publication number: 20120048180
    Abstract: It is an object of the present invention to provide a film-forming apparatus and a film-forming method that can prolong the lifetime of heaters used under high temperature conditions in an epitaxial growth technique. An inert gas discharge portion supplies an inert gas into the space containing the heater, gas is then discharged through the gas discharge portion without influence on the semiconductor substrate during film formation. It is therefore possible to prevent the reaction gas entering into the space containing the high-temperature heaters. This makes it possible to prevent a reaction between hydrogen gas contained in the reaction gas and SiC constituting the heaters. Therefore, it is possible to prevent carbon used as a base material of the heaters from being exposed due to the decomposition of SiC and then reacting with hydrogen gas. This makes it possible to prolong the lifetime of the heaters.
    Type: Application
    Filed: August 2, 2011
    Publication date: March 1, 2012
    Inventors: Hideki Ito, Toshiro Tsumori, Kunihiko Suzuki
  • Publication number: 20120051996
    Abstract: Single crystal diamond having a high chemical purity i.e. a low nitrogen content and a high isotopic purity i.e. a low 13C content, methods for producing the same and a solid state system comprising such single crystal diamond are described.
    Type: Application
    Filed: July 22, 2009
    Publication date: March 1, 2012
    Inventors: Geoffrey Alan Scarsbrook, Daniel James Twitchen, Matthew Lee Markham
  • Publication number: 20120048182
    Abstract: The invention relates to a method and system for epitaxial deposition of a Group III-V semiconductor material that includes gallium. The method includes reacting an amount of a gaseous Group III precursor having one or more gaseous gallium precursors as one reactant with an amount of a gaseous Group V component as another reactant in a reaction chamber; and supplying sufficient energy to the gaseous gallium precursor(s) prior to their reacting so that substantially all such precursors are in their monomer forms. The system includes sources of the reactants, a reaction chamber wherein the reactants combine to deposit Group III-V semiconductor material, and one or more heating structures for heating the gaseous Group III precursors prior to reacting to a temperature to decompose substantially all dimers, trimers or other molecular variations of such precursors into their component monomers.
    Type: Application
    Filed: November 3, 2011
    Publication date: March 1, 2012
    Inventors: Chantal Arena, Christiaan Werkhoven
  • Patent number: 8119241
    Abstract: A method for growing a low-resistance phosphorus-doped epitaxial thin film having a specific resistance of 300 ?cm or less at 300 K on a principal surface of a {111} monocrystal substrate under conditions in which the phosphorus atom/carbon atom ratio is 3% or higher, includes the principal surface having an off-angle of 0.50° or greater. The diamond monocrystal having a low-resistance phosphorus-doped diamond epitaxial thin film is such that the thin-film surface has an off-angle of 0.50° or greater with respect to the {111} plane, and the specific resistance of the low-resistance phosphorus-doped diamond epitaxial thin film is 300 ?cm or less at 300 K.
    Type: Grant
    Filed: December 26, 2007
    Date of Patent: February 21, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Akihiko Ueda, Kiichi Meguro, Yoshiyuki Yamamoto, Yoshiki Nishibayashi, Takahiro Imai
  • Publication number: 20120033331
    Abstract: A nanocomposite article that includes a single-crystal or single-crystal-like substrate and heteroepitaxial, phase-separated layer supported by a surface of the substrate and a method of making the same are described. The heteroepitaxial layer can include a continuous, non-magnetic, crystalline, matrix phase, and an ordered, magnetic magnetic phase disposed within the matrix phase. The ordered magnetic phase can include a plurality of self-assembled crystalline nanostructures of a magnetic material. The phase-separated layer and the single crystal substrate can be separated by a buffer layer. An electronic storage device that includes a read-write head and a nanocomposite article with a data storage density of 0.75 Tb/in2 is also described.
    Type: Application
    Filed: November 30, 2010
    Publication date: February 9, 2012
    Applicant: UT-Battelle, LLC
    Inventors: Amit Goyal, Junsoo Shin
  • Publication number: 20120034149
    Abstract: The invention relates to a GaN-crystal free-standing substrate obtained from a GaN crystal grown by HVPE with a (0001) plane serving as a crystal growth plane and at least one plane of a {10-11} plane and a {11-22} plane serving as a crystal growth plane that constitutes a facet crystal region, except for the side surface of the crystal, wherein the (0001)-plane-growth crystal region has a carbon concentration of 5×1016 atoms/cm3 or less, a silicon concentration of 5×1017 atoms/cm3 or more and 2×1018 atoms/cm3 or less, and an oxygen concentration of 1×1017 atoms/cm3 or less; and the facet crystal region has a carbon concentration of 3×1016 atoms/cm3 or less, a silicon concentration of 5×1017 atoms/cm3 or less, and an oxygen concentration of 5×1017 atoms/cm3 or more and 5×1018 atoms/cm3 or less.
    Type: Application
    Filed: September 19, 2011
    Publication date: February 9, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Shinsuke Fujiwara, Koji Uematsu, Hitoshi Kasai, Takuji Okahisa
  • Publication number: 20120025195
    Abstract: In a structure for crystalline material growth, there is provided a lower growth confinement layer and an upper growth confinement layer that is disposed above and vertically separated from the lower growth confinement layer. A lateral growth channel is provided between the upper and lower growth confinement layers, and is characterized by a height that is defined by the vertical separation between the upper and lower growth confinement layers. A growth seed is disposed at a site in the lateral growth channel for initiating crystalline material growth in the channel. A growth channel outlet is included for providing formed crystalline material from the growth channel. With this growth confinement structure, crystalline material can be grown from the growth seed to the lateral growth channel outlet.
    Type: Application
    Filed: July 27, 2011
    Publication date: February 2, 2012
    Applicant: MASSACHUSETTS INSTITUTE OF TECHNOLOGY
    Inventors: Kevin Andrew McComber, Jifeng Liu, Jurgen Michel, Lionel C. Kimerling
  • Publication number: 20120017825
    Abstract: A method for growing a crystalline composition, the first crystalline composition may include gallium and nitrogen. The crystalline composition may have an infrared absorption peak at about 3175 cm?1, with an absorbance per unit thickness of greater than about 0.01 cm?1. In one embodiment, the composition ay have an amount of oxygen present in a concentration of less than about 3×1018 per cubic centimeter, and may be free of two-dimensional planar boundary defects in a determined volume of the first crystalline composition.
    Type: Application
    Filed: November 9, 2006
    Publication date: January 26, 2012
    Applicant: General Electric Company
    Inventors: Mark Philip D'Evelyn, Kristi Jean Narang, Dong-Sil Park, Huicong Hong, Xian-An Cao, Larry Qiang Zeng
  • Publication number: 20120021163
    Abstract: A semiconductor compound material, preferably a III-N-bulk crystal or a III-N-layer, is manufactured in a reactor by means of hydride vapour phase epitaxy (HVPE), wherein in a mixture of carrier gases a flow profile represented by local mass flow rates is formed in the reactor. The mixture can carry one or more reaction gases towards a substrate. Thereby, a concentration of hydrogen important for the reaction and deposition of reaction gases is adjusted at the substrate surface independently from the flow profile simultaneously formed in the reactor.
    Type: Application
    Filed: January 20, 2011
    Publication date: January 26, 2012
    Inventors: Gunnar LEIBIGER, Frank Habel, Stefan Eichler
  • Patent number: 8101018
    Abstract: In a method for fabricating a semiconductor device and an apparatus for inspecting a semiconductor, laser processing is performed at different laser powers at different positions on a monitor substrate from a plurality of substrates having undergone an SPC step, to form polycrystalline silicon film over the entire area of the substrate. Thereafter, in an optimum power inspection/extraction step, the polycrystalline silicon film formed with varying film quality on the monitor substrate is inspected on inspection equipment to determine the optimum laser power. Then, in a laser processing step, the surface of the subsequent substrates having undergone the SPC step is irradiated with laser at the optimum laser power. Thus, high-quality polycrystalline silicon film is formed over the entire area of the substrate.
    Type: Grant
    Filed: March 2, 2005
    Date of Patent: January 24, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Yasunobu Tagusa
  • Patent number: 8092596
    Abstract: Bulk GaN and AlGaN single crystal boules, preferably fabricated using a modified HVPE process, are provided. The single crystal boules typically have a volume in excess of 4 cubic centimeters with a minimum dimension of approximately 1 centimeter. If desired, the bulk material can be doped during growth, for example to achieve n-, i-, or p-type conductivity.
    Type: Grant
    Filed: June 13, 2008
    Date of Patent: January 10, 2012
    Assignee: Freiberger Compound Materials GmbH
    Inventors: Yuri V. Melnik, Vitali Soukhoveev, Vladimir Ivantsov, Katie Tsvetkov, Vladimir A Dmitriev
  • Patent number: 8092597
    Abstract: Method for producing a III-N (AlN, GaN, AlxGa(1-x)N) crystal by Vapor Phase Epitaxy (VPE), the method comprising: providing a reactor having: a growth zone for growing a III-N crystal; a substrate holder located in the growth zone that supports at least one substrate on which to grow the III-N crystal; a gas supply system that delivers growth material for growing the III-N crystal to the growth zone from an outlet of the gas supply system; and a heating element that controls temperature in the reactor; determining three growth sub-zones in the growth zone for which a crystal grown in the growth sub-zones has respectively a concave, flat or convex curvature; growing the III-N crystal on a substrate in a growth region for which the crystal has a by desired curvature.
    Type: Grant
    Filed: January 22, 2011
    Date of Patent: January 10, 2012
    Assignee: Freiberger Compound Materials GmbH
    Inventors: Vladimir A. Dmitriev, Yuri V. Melnik
  • Publication number: 20110309306
    Abstract: Nanowires are formed in a process including fluidized bed catalytic vapor deposition. The process may include contacting a gas-phase precursor including a metal or a semiconductor with a catalyst in a reaction chamber under conditions suitable for growth of nanowires including the metal or the semiconductor. The reaction chamber includes a support. The support can be, for example, a particulate support or a product vessel in the fluidized bed reactor. Nanowires are formed on the support in response to interaction between the gas-phase precursor and the catalyst. The nanowire-laden support is removed from the reaction chamber, and the nanowires are separated from the support. An anode or a lithium-ion battery may include nanowires formed in a fluidized bed reactor.
    Type: Application
    Filed: May 2, 2011
    Publication date: December 22, 2011
    Applicant: UNIVERSITY OF SOUTHERN CALIFORNIA
    Inventors: Chongwu Zhou, Po-Chiang Chen, Haitian Chen, Jing Xu
  • Publication number: 20110312164
    Abstract: The present invention provides a method of forming an electrode having reduced corrosion and water decomposition on a surface thereof. A conductive layer is deposited on a substrate. The conductive layer is partially oxidized by an oxygen plasma process to convert a portion thereof to an oxide layer thereby forming the electrode. The oxide layer is free of surface defects and the thickness of the oxide layer is from about 0.09 nm to about 10 nm and ranges therebetween, controllable with 0.2 nm precision.
    Type: Application
    Filed: June 22, 2010
    Publication date: December 22, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ali Afzali-Azdakani, Shafaat Ahmed, Hariklia Deligianni, Dario L. Goldfarb, Stefan Harrer, Hongbo Peng, Stanislav Polonsky, Stephen Rossnagel, Xiaoyan Shao, Gustavo A. Stolovitzky
  • Publication number: 20110300058
    Abstract: The present invention relates to a method for manufacturing graphene by vapour phase epitaxy on a substrate comprising a surface of SiC, characterized in that the process of sublimation of silicon from the substrate is controlled by a flow of an inert gas or a gas other than an inert gas through the epitaxial reactor. The invention also relates to graphene obtained by this method.
    Type: Application
    Filed: June 7, 2011
    Publication date: December 8, 2011
    Applicant: INSTYTUT TECHNOLOGII MATERIALOW ELEKTRONICZNYCH
    Inventor: Wlodzimierz Strupinski
  • Patent number: 8071167
    Abstract: Embodiments of the present invention relate to a surface preparation treatment for the formation of thin films of high k dielectric materials over substrates. One embodiment of a method of forming a high k dielectric layer over a substrate includes pre-cleaning a surface of a substrate to remove native oxides, pre-treating the surface of the substrate with a hydroxylating agent, and forming a high k dielectric layer over the surface of the substrate. One embodiment of a method of forming a hafnium containing layer over a substrate includes introducing an acid solution to a surface of a substrate, introducing a hydrogen containing gas and an oxygen containing gas to the surface of the substrate, and forming a hafnium containing layer over the substrate.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: December 6, 2011
    Assignee: Applied Materials, Inc.
    Inventors: Shreyas S. Kher, Shixue Han, Craig R. Metzner
  • Publication number: 20110290175
    Abstract: A multi-chamber CVD system includes a plurality of substrate carriers where each substrate carrier is adapted to support at least one substrate. A plurality of enclosures are each configured to form a deposition chamber enclosing one of the plurality of substrate carriers to maintain an independent chemical vapor deposition process chemistry for performing a processing step. A transport mechanism transports each of the plurality of substrate carriers to each of the plurality of enclosures in discrete steps that allow processing steps to be performed in the plurality of enclosures for a predetermined time. In some embodiments, the substrate carrier can be rotatable.
    Type: Application
    Filed: July 18, 2011
    Publication date: December 1, 2011
    Applicant: VEECO INSTRUMENTS, INC.
    Inventors: Ajit Paranjpe, Eric A. Armour, William E. Quinn
  • Publication number: 20110283933
    Abstract: An approach for the growth of high-quality epitaxial silicon carbide (SiC) films and boules, using the Chemical Vapor Deposition (CVD) technique is described here. The method comprises modifications in the design of the typical cold-wall CVD reactors, providing a better temperature uniformity in the reactor bulk and a low temperature gradient in the vicinity of the substrate, and an approach to increase the silicon carbide growth rate and to improve the quality of the growing layers, using halogenated carbon-containing precursors (carbon tetrachloride CCl4 or halogenated hydrocarbons, CHCl3, CH2Cl2, CH3Cl, etc.), or introducing other chlorine-containing species in the gas phase in the growth chamber. The etching effect, proper ranges, and high temperature growth are also examined.
    Type: Application
    Filed: July 31, 2011
    Publication date: November 24, 2011
    Inventors: Yuri Makarov, Michael Spencer
  • Publication number: 20110277681
    Abstract: The present invention provides improved gas injectors for use with chemical vapour deposition (CVD) systems that thermalize gases prior to injection into a CVD chamber. The provided injectors are configured to increase gas flow times through heated zones and include gas-conducting conduits that lengthen gas residency times in the heated zones. The provided injectors also have outlet ports sized, shaped, and arranged to inject gases in selected flow patterns. The invention also provides CVD systems using the provided thermalizing gas injectors. The present invention has particular application to high volume manufacturing of GaN substrates.
    Type: Application
    Filed: February 17, 2010
    Publication date: November 17, 2011
    Inventors: Chantal Arena, Ronald Thomas Bertram, JR., Ed Lindow
  • Publication number: 20110278596
    Abstract: The present invention provides an epitaxial SiC monocrystalline substrate having a high quality epitaxial film suppressed in occurrence of step bunching in epitaxial growth using a substrate with an off angle of 6° or less and a method of production of the same, that is, an epitaxial silicon carbide monocrystalline substrate comprised of a silicon carbide monocrystalline substrate with an off angle of 6° or less on which a silicon carbide monocrystalline thin film is formed, the epitaxial silicon carbide monocrystalline substrate characterized in that the silicon carbide monocrystalline thin film has a surface with a surface roughness (Ra value) of 0.5 nm or less and a method of production of the same.
    Type: Application
    Filed: January 29, 2010
    Publication date: November 17, 2011
    Inventors: Takashi Aigo, Hiroshi Tsuge, Taizo Hoshino, Tatsuo Fujimoto, Masakasu Katsuno, Masashi Nakabayashi, Hirokatsu Yashiro
  • Publication number: 20110259261
    Abstract: It is provided a method of growing a single crystal by flux process from a melt containing sodium, in that a flux is contained in a reaction vessel made of yttrium-aluminum garnet. Compared with the case that an alumina or yttria vessel is used, it can be successfully obtained a single crystal whose incorporation amounts of oxygen and silicon can be considerably reduced, residual carrier density can be lowered, and electron mobility and specific resistance can be improved.
    Type: Application
    Filed: July 6, 2011
    Publication date: October 27, 2011
    Applicants: NGK Insulators, Ltd., Osaka University, Toyoda Gosei Co., Ltd.
    Inventors: Makoto IWAI, Shuhei Higashihara, Yasuo Kitaoka, Yusuke Mori, Takayuki Sato, Seiji Nagai
  • Publication number: 20110262702
    Abstract: Disclosed is a fabrication method of a metal nanoplate using metal, metal halide or a mixture thereof as a precursor, wherein the single crystalline metal nanoplate is fabricated on a single crystalline substrate by performing heat treatment on a precursor including metal, metal halide or a mixture thereof and placed at a front portion of a reactor and the single crystalline substrate placed at a rear portion of the reactor under an inert gas flowing condition.
    Type: Application
    Filed: September 22, 2009
    Publication date: October 27, 2011
    Applicant: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Bongsoo Kim, Youngdong Yoo
  • Patent number: 8043687
    Abstract: A method for forming a graphene layer is disclosed herein. The method includes establishing an insulating layer on a substrate such that at least one seed region, which exposes a surface of the substrate, is formed. A seed material in the seed region is exposed to a carbon-containing precursor gas, thereby initiating nucleation of the graphene layer on the seed material and enabling lateral growth of the graphene layer along at least a portion of a surface of the insulating layer.
    Type: Grant
    Filed: October 16, 2008
    Date of Patent: October 25, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Theodore I. Kamins, R. Stanley Williams, Nathaniel Quitoriano
  • Patent number: 8038795
    Abstract: A precursor chiral nanotube with a specified chirality is grown using an epitaxial process and then cloned. A substrate is provided of crystal material having sheet lattice properties complementary to the lattice properties of the selected material for the nanotube. A cylindrical surface(s) having a diameter of 1 to 100 nanometers are formed as a void in the substrate or as crystal material projecting from the substrate with an orientation with respect to the axes of the crystal substrate corresponding to the selected chirality. A monocrystalline film of the selected material is epitaxially grown on the cylindrical surface that takes on the sheet lattice properties and orientation of the crystal substrate to form a precursor chiral nanotube. A catalytic particle is placed on the precursor chiral nanotube and atoms of the selected material are dissolved into the catalytic particle to clone a chiral nanotube from the precursor chiral nanotube.
    Type: Grant
    Filed: July 16, 2008
    Date of Patent: October 18, 2011
    Assignee: Raytheon Company
    Inventors: Delmar L. Barker, William R. Owens
  • Patent number: 8029620
    Abstract: In a first aspect, a method is provided for forming an epitaxial layer stack on a substrate. The method includes (1) selecting a target carbon concentration for the epitaxial layer stack; (2) forming a carbon-containing silicon layer on the substrate, the carbon-containing silicon layer having at least one of an initial carbon concentration, a thickness and a deposition time selected based on the selected target carbon concentration; and (3) forming a non-carbon-containing silicon layer on the carbon-containing silicon layer prior to etching. Numerous other aspects are provided.
    Type: Grant
    Filed: July 31, 2007
    Date of Patent: October 4, 2011
    Assignee: Applied Materials, Inc.
    Inventors: Yihwan Kim, Zhiyuan Ye, Ali Zojaji
  • Patent number: 8012536
    Abstract: Methods of forming metal-containing layers are provided where heteroleptic organometallic compounds containing at least one formamidinate ligand are conveyed in a gaseous form to a reactor; and films comprising a metal are deposited on a substrate. These heteroleptic organometallic compounds have improved properties over conventional vapor deposition precursors. Such compounds are suitable for use as vapor deposition precursors including direct liquid injection. Also provided are methods of depositing thin films, such as by ALD and CVD, using such compounds or their solutions in organic solvents.
    Type: Grant
    Filed: June 5, 2008
    Date of Patent: September 6, 2011
    Assignee: Rohm and Haas Electronic Materials LLC
    Inventors: Deodatta Vinayak Shenai-Khatkhate, Huazhi Li, Qing Min Wang
  • Patent number: 8012257
    Abstract: Fabrication of doped and undoped stoichiometric polycrystalline AlN ceramics with high purity is accomplished by, for example, reacting Al pellets with nitrogen gas. Such polycrystalline AlN ceramics may be utilized in the fabrication of high purity AlN single crystals, which may be annealed to enhance a conductivity thereof.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: September 6, 2011
    Assignee: Crystal IS, Inc.
    Inventors: Kenneth E. Morgan, Leo J. Schowalter, Glen A. Slack
  • Patent number: 8012256
    Abstract: Disclosed are a method of fabricating a quasi-substrate wafer with a subcarrier wafer and a growth layer, and a semiconductor body fabricated using such a quasi-substrate wafer. In the method of fabricating a quasi-substrate wafer, a growth substrate water is fabricated that is provided with a separation zone and comprises the desired material of the growth layer. The growth substrate wafer is provided with a stress that counteracts a stress generated by the formation of the separation zone, and/or the stress generated by the formation of the separation zone is distributed, by structuring a first main race of the growth substrate water and/or the separation zone, to a plurality of subregions along the first main face. The growth substrate wafer with separation zone exhibits no or only slight bowing.
    Type: Grant
    Filed: January 30, 2007
    Date of Patent: September 6, 2011
    Assignee: Osram Opto Semiconductor GmbH
    Inventors: Georg Brüderl, Christoph Eichler, Uwe Strauss
  • Publication number: 20110209660
    Abstract: Methods and apparatus for deposition processes are provided herein. In some embodiments, an apparatus may include a substrate support comprising a susceptor plate having a pocket disposed in an upper surface of the susceptor plate and having a lip formed in the upper surface and circumscribing the pocket, the lip configured to support a substrate on the lip; and a plurality of vents extending from the pocket to the upper surface of the susceptor plate to exhaust gases trapped between the backside of the substrate and the pocket when a substrate is disposed on the lip. Methods of utilizing the inventive apparatus for depositing a layer on a substrate are also disclosed.
    Type: Application
    Filed: February 16, 2011
    Publication date: September 1, 2011
    Applicant: APPLIED MATERIALS, INC.
    Inventors: NYI O. MYO, KEVIN BAUTISTA, ZHIYUAN YE, SCHUBERT S. CHU, YIHWAN KIM
  • Patent number: 8003192
    Abstract: A nanodevice including a nanorod and a method for manufacturing the same is provided. The nanodevice according to an embodiment of the present invention includes i) a substrate; ii) at least one crystal that is located on the substrate and includes a plurality of side surfaces forming an angle with each other; and iii) at least one nanorod that is located on the crystal and extends along a direction that is substantially perpendicular to a surface of the substrate.
    Type: Grant
    Filed: April 18, 2008
    Date of Patent: August 23, 2011
    Assignee: LG Display Co., Ltd.
    Inventors: Young-Joon Hong, Gyu-Chul Yi
  • Patent number: 8002892
    Abstract: Affords a Group-III nitride crystal substrate that is of low dislocation density and is inexpensive to manufacture, a method of manufacturing such a substrate, and Group-III nitride semiconductor devices that incorporate the Group-III nitride crystal substrate. The Group-III nitride crystal substrate manufacturing method includes: a step of growing, by liquid-phase epitaxy, a first Group-III nitride crystal (2) onto a base substrate (1); and a step of growing, by vapor-phase epitaxy, a second Group-III nitride crystal (3) onto the first Group-III nitride crystal (2). The Group-III nitride crystal substrate, produced by such a manufacturing method, has a dislocation density of 1×107 dislocations/cm2.
    Type: Grant
    Filed: January 24, 2005
    Date of Patent: August 23, 2011
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Ryu Hirota, Seiji Nakahata, Masaki Ueno
  • Patent number: 7989260
    Abstract: The present invention provides a method of selectively forming a flat plane on an atomic level on a diamond (001), (110) or (111) surface. A method of selectively forming a flat plane on a diamond surface comprising growing diamond on a stepped diamond surface of any of crystal structures (001), (110) and (111) by CVD (Chemical Vapor Deposition) under growth conditions such that step-flow growth of diamond is carried out thereafter.
    Type: Grant
    Filed: April 23, 2007
    Date of Patent: August 2, 2011
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Norio Tokuda, Hitoshi Umezawa, Satoshi Yamasaki
  • Publication number: 20110175200
    Abstract: To provide a group III nitride crystal having sufficient conductivity and capable of growing in a short time, for growing the group III nitride crystal on a base substrate by vapor deposition at a growth rate of greater than 450 ?m/hour and 2 mm/hour or less, by using a group III halogenated gas and NH3 gas, wherein Ge is doped into the group III nitride crystal by suing GeCl4 as a doping source, so that resistivity of the group III nitride crystal is 1×10?3 ?cm or more and 1×10?2 ?cm or less.
    Type: Application
    Filed: June 14, 2010
    Publication date: July 21, 2011
    Applicant: HITACHI CABLE, LTD.
    Inventor: Takehiro YOSHIDA
  • Publication number: 20110176563
    Abstract: Single crystal diamond material produced using chemical vapour deposition (CVD), and particularly diamond material having properties suitable for use in optical applications such as lasers, is disclosed. In particular, a CVD single crystal diamond material having preferred characteristics of longest linear internal dimension, birefringence and absorption coefficient, when measured at room temperature, is disclosed. Uses of the diamond material, including in a Raman laser, and methods of producing the diamond are also disclosed.
    Type: Application
    Filed: January 14, 2011
    Publication date: July 21, 2011
    Inventors: Ian Friel, Sarah Louise Geoghegan, Daniel James Twitchen, Joseph Michael Dodson