With Decomposition Of A Precursor (except Impurity Or Dopant Precursor) Composed Of Diverse Atoms (e.g., Cvd) Patents (Class 117/88)
  • Patent number: 7981472
    Abstract: A method of introducing gasses through a gas distribution system into a reactor involves flowing the gasses through at least two distinct gas source orifice arrays displaced from one another along an axis defined by a gas flow direction from the gas source orifice arrays towards a work-piece. During different time intervals, a purge gas and different reactive precursors are flowed into the reactor from different ones of the gas source orifice arrays. One of the precursors may be associated with a soft saturating atomic layer deposition half reaction and another of the precursors associated with a strongly saturating atomic layer deposition half reaction. An upper one of the gas source orifice arrays may be a relatively planar gas orifice array.
    Type: Grant
    Filed: September 3, 2009
    Date of Patent: July 19, 2011
    Assignee: Aixtron, Inc.
    Inventors: Jeremie J. Dalton, M. Ziaul Karim, Ana R. Londergan
  • Patent number: 7972440
    Abstract: A system (10) for monitoring and controlling a fabrication process includes at least a first subsystem (12), a crystallographic analysis subsystem (14), and a second subsystem (16), wherein the first subsystem and second subsystem perform respective fabrication steps on a workpiece. The crystallographic analysis subsystem may be coupled to both the first subsystem and second subsystem. The analysis subsystem acquires crystallographic information from the workpiece after the workpiece undergoes a fabrication step by the first subsystem and then provides information, based on the crystallographic information acquired, for modifying parameters associated with the respective fabrication steps. The system may also include neural networks (24, 28) to adaptively modify, based on historical process data (32), parameters provided to the respective fabrication steps. The analysis subsystem may include a electromagnetic source (61), a detector (66), a processor (67), a controller (68) and a scanning actuator (65).
    Type: Grant
    Filed: February 24, 2003
    Date of Patent: July 5, 2011
    Assignee: Agere Systems Inc.
    Inventors: Erik C. Houge, John M. McIntosh, Robert Francis Jones
  • Publication number: 20110151226
    Abstract: The present disclosure relates to methods for synthesizing synthetic CVD diamond material and high quality synthetic CVD diamond materials.
    Type: Application
    Filed: December 15, 2010
    Publication date: June 23, 2011
    Inventors: Daniel James Twitchen, Andrew Michael Bennett, Rizwan Uddin Ahmad Khan, Philip Maurice Martineau
  • Publication number: 20110146565
    Abstract: A method for surface treatment of a group III nitride crystal includes the steps of lapping a surface of a group III nitride crystal using a hard abrasive grain with a Mohs hardness higher than 7, and abrasive-grain-free polishing the lapped surface of the group III nitride crystal using a polishing solution without containing abrasive grain, and the polishing solution without containing abrasive grain has a pH of not less than 1 and not more than 6, or not less than 8.5 and not more than 14. Accordingly, the method for surface treatment of a group III nitride crystal can be provided according to which hard abrasive grains remaining at the lapped crystal can be removed to reduce impurities at the crystal surface.
    Type: Application
    Filed: February 28, 2011
    Publication date: June 23, 2011
    Inventors: Keiji ISHIBASHI, Naoki MATSUMOTO, Masato IRIKURA
  • Publication number: 20110129669
    Abstract: A method for efficiently producing a plate-like nitride semiconductor crystal having the desired principal plane in a simple method is provided. A raw material gas is fed to a seed crystal in which a ratio (L/W) of length L in a longitudinal direction and maximum width W, of a plane of projection obtained by projecting a crystal growth face on the seed crystal in a growth direction is from 2 to 400, and the maximum width W is 5 mm or less, thereby growing a plate-like semiconductor crystal on the seed crystal.
    Type: Application
    Filed: March 2, 2009
    Publication date: June 2, 2011
    Applicant: Mitsubishi Chemical Corporation
    Inventors: Kenji Fujito, Shuichi Kubo, Yoko Mashige
  • Publication number: 20110117376
    Abstract: The current invention introduces a method of crystal film's growth of Gallium Nitride and related alloys over a novel class of the substrates using Vapor Phase Epitaxy technique. This said novel class of the substrates comprises single crystal lattice matched, partially matched or mismatched metallic substrates. The use of such substrates provides exceptional thermal conductivity and application flexibility, since they can be easily removed or patterned by chemical etching for the purposes of additional contact formation, electromagnetic radiation extraction, packaging or other purposes suggested or discovered by the skilled artisan. In particular, if patterned, the remaining portions of the said substrates can be utilized as contacts to the semiconductor layers grown on them. In addition, the said metallic substrates are significantly more cost effective than most of the conventional substrates.
    Type: Application
    Filed: November 16, 2010
    Publication date: May 19, 2011
    Inventors: Mingwei Zhu, Theeradetch Detchprohm, Christian Wetzel
  • Publication number: 20110114015
    Abstract: Method for producing a III-N (AlN, GaN, AlxGa(1-x)N) crystal by Vapor Phase Epitaxy (VPE), the method comprising: providing a reactor having: a growth zone for growing a III-N crystal; a substrate holder located in the growth zone that supports at least one substrate on which to grow the III-N crystal; a gas supply system that delivers growth material for growing the III-N crystal to the growth zone from an outlet of the gas supply system; and a heating element that controls temperature in the reactor; determining three growth sub-zones in the growth zone for which a crystal grown in the growth sub-zones has respectively a concave, flat or convex curvature; growing the III-N crystal on a substrate in a growth region for which the crystal has a by desired curvature.
    Type: Application
    Filed: January 22, 2011
    Publication date: May 19, 2011
    Applicant: FREIBERGER COMPOUND MATERIALS GMBH
    Inventors: Vladimir A. Dmitriev, Yuri V. Melnik
  • Publication number: 20110114014
    Abstract: A susceptor having a recessed portion and a ring-like step portion is arranged in a reaction chamber, and a plurality of through bores are formed in a bottom wall in the recessed portion excluding the step portion. A lift pin inserted in each of the through bores temporarily holds a wafer, then a lower surface of an outer peripheral portion of the wafer is mounted on the step portion to accommodate the wafer in the recessed portion, and a raw material gas is circulated in the reaction chamber to form an epitaxial layer on a wafer surface in the recessed portion. When forming the epitaxial layer on the wafer surface, the lift pin protrudes upwards from an upper surface of the bottom wall, and a height h of a top portion of the lift pin based on the upper surface of the bottom wall as a reference is set to the range from a position where the height h exceeds 0 mm to a position immediately before the lift pin comes into contact with the wafer.
    Type: Application
    Filed: July 24, 2009
    Publication date: May 19, 2011
    Applicant: SUMCO CORPORATION
    Inventors: Masaya Sakurai, Masayuki Ishibashi
  • Patent number: 7943492
    Abstract: A method of forming a nitride film by hydride vapor phase epitaxy, the method including: sequentially disposing at least one group III metal source including impurities and a substrate in an external reaction chamber and an internal reaction chamber sequentially located in the direction of gas supply and heating each of the external reaction chamber and the internal reaction chamber at a growth temperature; forming a metal chloride by supplying hydrogen chloride gas and carrier gas into the external reaction chamber to react with the group III metal source and transferring the metal chloride to the substrate; and forming the nitride film doped with the impurities on the substrate by reacting the transferred metal chloride with nitrogen source gas supplied to the internal reaction chamber.
    Type: Grant
    Filed: April 24, 2007
    Date of Patent: May 17, 2011
    Assignee: Samsung LED Co., Ltd.
    Inventors: Jaeun Yoo, Hyung Soo Ahn, Min Yang, Masayoshi Koike
  • Patent number: 7935382
    Abstract: A method of making a metal nitride is provided. The method may include introducing a metal in a chamber. A nitrogen-containing material may be flowed into the chamber. Further, a hydrogen halide may be introduced. The nitrogen-containing material may react with the metal in the chamber to form the metal nitride.
    Type: Grant
    Filed: December 20, 2005
    Date of Patent: May 3, 2011
    Assignee: Momentive Performance Materials, Inc.
    Inventors: Dong-Sil Park, Mark Philip D'Evelyn, Myles Standish Peterson, II, John Thomas Leman, Joell Randolph Hibshman, II, Fred Sharifi
  • Patent number: 7935384
    Abstract: The present invention relates to a method of forming a metal-nitride film onto a surface of an object to be processed in a processing container in which a vacuum can be created. The method of the invention includes: a step of continuously supplying an inert gas into a processing container set at a low film-forming temperature; and a step of intermittently supplying a metal-source gas into the processing container, during the step of continuously supplying the inert gas. During the step of intermittently supplying the metal-source gas, a nitrogen-including reduction gas is supplied into the processing container at the same time that the metal-source gas is supplied, during a supply term of the metal-source gas. The nitrogen-including reduction gas is also supplied into the processing container for a term shorter than a non-supply term of the metal-source gas, during the non-supply term of the metal-source gas.
    Type: Grant
    Filed: September 2, 2002
    Date of Patent: May 3, 2011
    Assignee: Tokyo Electron Limited
    Inventor: Toshio Hasegawa
  • Publication number: 20110094668
    Abstract: A process for reducing defects during formation of a transfer layer on a composite support having a central layer with a first thermal expansion coefficient. The method includes providing the composite support with at least one pair of lateral layers about the central layer, with the layers of each pair having second thermal expansion coefficients and thicknesses that are substantially identical to one another to thus provide the composite support with an overall thermal expansion coefficient that is sufficiently close to that of the transfer layer; conducting crystalline growth of the transfer layer on a growth substrate; bonding the transfer layer to the composite support; and removing the growth substrate to provide the transfer layer on the composite support without generating an excessive number of defects in the transfer layer due to the matching of the overall thermal expansion coefficients of the composite substrate and transfer layer.
    Type: Application
    Filed: January 3, 2011
    Publication date: April 28, 2011
    Inventor: Yves-Matthieu Le Vaillant
  • Publication number: 20110095291
    Abstract: A method of growing high quality crystalline films on lattice-mismatched or amorphous layers is presented allowing semiconductor materials that would normally be subject to high stress and cracking to be employed allowing cost reductions and/or performance improvements in devices to be obtained. Catalysis of the growth of these films is based upon utilizing particular combinations of metals, materials, and structures to establish growth of the crystalline film from a predetermined location. The subsequent film growth occurring in one or two dimensions to cover a predetermined area of the amorphous or lattice-mismatched substrate. Accordingly the technique can be used to either cover a large area or provide tiles of crystalline material with or without crystalline film interconnections.
    Type: Application
    Filed: October 22, 2010
    Publication date: April 28, 2011
    Inventor: Nathaniel Quitoriano
  • Patent number: 7927662
    Abstract: A method of performing a CVD process on target substrates all together in a vertical CVD apparatus includes repeating, a plurality of times, first and second steps of supplying first and second reactive gases, respectively. The first reactive gas has a vapor pressure of 1.33 kPa or less, or a bond-dissociation energy of 250 kJ/mol or less. The second reactive gas has a vapor pressure of 2.66 kPa or more, and a bond-dissociation energy of 250 kJ/mol or more. The first reactive gas is supplied from a first delivery hole disposed at a bottom of the process chamber. The second reactive gas is supplied from a plurality of second delivery holes arrayed in a vertical direction at a position adjacent to edges of the target substrates entirely over a vertical length of the target substrates stacked at intervals.
    Type: Grant
    Filed: April 4, 2008
    Date of Patent: April 19, 2011
    Assignee: Tokyo Electron Limited
    Inventor: Hiroyuki Matsuura
  • Patent number: 7922814
    Abstract: In the production process of the present invention for high purity polycrystal silicon, using a vertical reactor having a silicon chloride gas-feeding nozzle and a reducing agent gas-feeding nozzle which are disposed at an upper part and a waste gas discharge pipe, a silicon chloride gas and a reducing agent gas are fed into the reactor to form polycrystal silicon at a tip part of the silicon chloride gas-feeding nozzle by the reaction of the silicon chloride gas with the reducing agent gas, and the polycrystal silicon is allowed to grow from the tip part of the silicon chloride gas-feeding nozzle toward a lower part thereof.
    Type: Grant
    Filed: November 3, 2006
    Date of Patent: April 12, 2011
    Assignee: Chisso Corporation
    Inventors: Shuichi Honda, Minoru Yasueda, Satoshi Hayashida, Masatsugu Yamaguchi, Toru Tanaka
  • Publication number: 20110073874
    Abstract: A method of reducing memory effects during an epitaxial growth process is provided in which a gas mixture comprising hydrogen gas and a halogen-containing gas is used to flush the CVD reaction chamber between growth steps.
    Type: Application
    Filed: May 29, 2009
    Publication date: March 31, 2011
    Applicant: DOW CORNING CORPORATION
    Inventor: Mark Loboda
  • Patent number: 7915152
    Abstract: A boule formed by high rate vapor phase growth of Group III-V nitride boules (ingots) on native nitride seeds, from which wafers may be derived for fabrication of microelectronic device structures. The boule is of microelectronic device quality, e.g., having a transverse dimension greater than 1 centimeter, a length greater than 1 millimeter, and a top surface defect density of less than 107 defects cm?2. The Group III-V nitride boule may be formed by growing a Group III-V nitride material on a corresponding native Group III-V nitride seed crystal by vapor phase epitaxy at a growth rate above 20 micrometers per hour. Nuclear transmutation doping may be applied to an (Al,Ga,In)N article comprises a boule, wafer, or epitaxial layer.
    Type: Grant
    Filed: February 2, 2010
    Date of Patent: March 29, 2011
    Assignee: Cree, Inc.
    Inventors: Robert P. Vaudo, Jeffrey S. Flynn, George R. Brandes, Joan M. Redwing, Michael A. Tischler
  • Patent number: 7914619
    Abstract: The invention provides a high temperature (about 1150° C. or greater) annealing process for converting thick polycrystalline Si layers on the order of 1 ?m to 40 ?m on a single crystal seed layer into thick single crystal Si layers having the orientation of the seed layer, thus allowing production of thick Si films having the quality of single crystal silicon at high rates and low cost of processing. Methods of integrating such high temperature processing into solar cell fabrication are described, with particular attention to process flows in which the seed layer is disposed on a porous silicon release layer. Another aspect pertains to the use of similar high temperature anneals for poly-Si grain growth and grain boundary passivation. A further aspect relates to structures in which these thick single crystal Si films and passivated poly-Si films are incorporated.
    Type: Grant
    Filed: November 3, 2008
    Date of Patent: March 29, 2011
    Assignee: International Business Machines Corporation
    Inventors: Joel P. de Souza, Keith E. Fogel, Daniel A. Inns, Devendra K. Sadana, Katherine L. Saenger
  • Patent number: 7896965
    Abstract: A method for the production of a plurality of optoelectronic semiconductor chips each having a plurality of structural elements with respectively at least one semiconductor layer. The method involves providing a chip composite base having a substrate and a growth surface. A non-closed mask material layer is grown onto the growth surface in such a way that the mask material layer has a plurality of statistically distributed windows having varying forms and/or opening areas, a mask material being chosen in such a way that a semiconductor material of the semiconductor layer that is to be grown in a later method step essentially cannot grow on said mask material or can grow in a substantially worse manner in comparison with the growth surface. Subsequently, semiconductor layers are deposited essentially simultaneously onto regions of the growth surface that lie within the windows. A further method step is singulation of the chip composite base with applied material to form semiconductor chips.
    Type: Grant
    Filed: July 22, 2004
    Date of Patent: March 1, 2011
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventor: Volker Härle
  • Publication number: 20110045281
    Abstract: A method for reducing/eliminating basal plane dislocations from SiC epilayers is disclosed. An article having: an off-axis SiC substrate having an off-axis angle of no more than 6°; and a SiC epitaxial layer grown on the substrate. The epitaxial layer has no more than 2 basal plane dislocations per cm2 at the surface of the epitaxial layer. A method of growing an epitaxial SiC layer on an off-axis SiC substrate by: flowing a silicon source gas, a carbon source gas, and a carrier gas into a growth chamber under growth conditions to epitaxially grow SiC on the substrate in the growth chamber. The substrate has an off-axis angle of no more than 6°. The growth conditions include: a growth temperature of 1530-1650° C.; a pressure of 50-125 mbar; a C/H gas flow ratio of 9.38×10?5-1.5×10?3; a C/Si ratio of 0.5-3; a carbon source gas flow rate during ramp to growth temperature from 0 to 15 sccm; and an electron or hole concentration of 1013-1019/cm3.
    Type: Application
    Filed: August 20, 2010
    Publication date: February 24, 2011
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Rachael L. Myers-Ward, David Kurt Gaskill, Brenda L. VanMil, Robert E. Stahlbush, Charles R. Eddy, JR.
  • Patent number: 7888244
    Abstract: A method of forming a virtually defect free lattice mismatched nanoheteroepitaxial layer is disclosed. The method includes forming an interface layer on a portion of a substrate. A plurality of seed pads are then formed by self-directed touchdown by exposing the interface layer to a material comprising a semiconductor material. The plurality of seed pads, having an average width of about 1 nm to 10 nm, are interspersed within the interface layer and contact the substrate. An epitaxial layer is then formed by lateral growth of the seed pads over the interface layer.
    Type: Grant
    Filed: April 8, 2009
    Date of Patent: February 15, 2011
    Assignee: STC.UNM
    Inventors: Sang M. Han, Qiming Li
  • Patent number: 7883746
    Abstract: In an insulating film formation method, a cycle A in which O3 at a low flow rate is supplied onto a substrate and then O3 supplied is allowed to react with Hf on the substrate in a non-equilibrium state to form a hafnium oxide film is carried out M times (M?1), and a cycle B in which O3 at a high flow rate is supplied onto the substrate and then O3 supplied is allowed to react with Hf on the substrate in an equilibrium state to form a hafnium oxide film is carried out N times (N?1). These insulating film formation cycles are defined as one sequence. This sequence is repeated until a desired thickness is obtained, thereby forming a target insulating film.
    Type: Grant
    Filed: July 16, 2007
    Date of Patent: February 8, 2011
    Assignee: Panasonic Corporation
    Inventors: Jun Suzuki, Kenji Yoneda, Seiji Matsuyama
  • Patent number: 7879147
    Abstract: Large area, uniformly low dislocation density single crystal III-V nitride material, e.g., gallium nitride having a large area of greater than 15 cm2, a thickness of at least 1 mm, an average dislocation density not exceeding 5E5 cm?2, and a dislocation density standard deviation ratio of less than 25%, and methods of forming same, are disclosed. Such material can be formed on a substrate by a process including (i) a first phase of growing the III-V nitride material on the substrate under pitted growth conditions, e.g., forming pits over at least 50% of the growth surface of the III-V nitride material, wherein the pit density on the growth surface is at least 102 pits/cm2 of the growth surface, and (ii) a second phase of growing the III-V nitride material under pit-filling conditions.
    Type: Grant
    Filed: September 17, 2007
    Date of Patent: February 1, 2011
    Assignee: Cree, Inc.
    Inventors: Xueping Xu, Robert P. Vaudo
  • Patent number: 7879150
    Abstract: A silicon carbide manufacturing device includes a graphite crucible, in which a seed crystal is disposed, a gas-inducing pipe coupled with the graphite crucible, and an attachment prevention apparatus. The gas-inducing pipe has a column-shaped hollow part, through which a source gas flows into the graphite crucible. The attachment prevention apparatus includes a rod extending to a flow direction of the source gas, and a revolving and rotating element for revolving the rod along an inner wall of the gas-inducing pipe while rotating the rod on an axis of the rod in parallel to the flow direction.
    Type: Grant
    Filed: September 4, 2007
    Date of Patent: February 1, 2011
    Assignee: DENSO CORPORATION
    Inventors: Masao Nagakubo, Fusao Hirose, Yasuo Kitoh
  • Publication number: 20110017126
    Abstract: A diamond layer of single crystal CVD diamond which is coloured, preferably which has a fancy colour, and which has a thickness of greater than 1 mm.
    Type: Application
    Filed: October 7, 2010
    Publication date: January 27, 2011
    Inventors: Daniel James TWITCHEN, Philip Maurice MARTINEAU, Geoffrey Alan SCARSBROOK, Bärbel Susanne Charlotte DORN, Michael Andrew COOPER
  • Publication number: 20110014112
    Abstract: A method of forming mono-crystalline diamond by chemical vapour deposition, the method comprising the steps of: (a) providing at least one diamond seed; (b) exposing the seed to conditions for growing diamond by chemical vapour deposition, including supplying reaction gases that include a carbon-containing gas and hydrogen for growing diamond and include a nitrogen-containing gas; and (c) controlling the quantity of nitrogen-containing gas relative to other gases in the reaction gases such that diamond is caused to grow by step-growth with defect free steps without inclusions. The nitrogen is present in the range of 0.0001 to 0.02 vol %. Diborane can also be present in a range of from 0.00002 to 0.002 vol %. The carbon-containing gas can be methane.
    Type: Application
    Filed: June 18, 2009
    Publication date: January 20, 2011
    Inventor: Devi Shanker Misra
  • Publication number: 20110011332
    Abstract: A method and apparatus for producing bulk single crystals of AlN having low dislocation densities of about 10,000 cm?2 or less includes a crystal growth enclosure with Al and N2 source material therein, capable of forming bulk crystals. The apparatus maintains the N2 partial pressure at greater than stoichiometric pressure relative to the Al within the crystal growth enclosure, while maintaining the total vapor pressure in the crystal growth enclosure at super-atmospheric pressure. At least one nucleation site is provided in the crystal growth enclosure, and provision is made for cooling the nucleation site relative to other locations in the crystal growth enclosure. The Al and N2 vapor is then deposited to grow single crystalline low dislocation density AlN at the nucleation site. High efficiency ultraviolet light emitting diodes and ultraviolet laser diodes are fabricated on low defect density AlN substrates, which are cut from the low dislocation density AlN crystals.
    Type: Application
    Filed: July 22, 2010
    Publication date: January 20, 2011
    Applicant: Crystal IS, Inc.
    Inventors: Leo J. Schowalter, Glen A. Slack, J. Carlos Rojo
  • Publication number: 20110014457
    Abstract: A structure comprising a layer of graphene supported on a substrate wherein the substrate is pre-selected to have a coefficient of thermal expansion that is either matched within about 10% of that of graphene or mis-matched, thereby inducing controlled stress in the graphene layer to control electrical and/or mechanical properties of devices fabricated in the graphene layer.
    Type: Application
    Filed: July 17, 2009
    Publication date: January 20, 2011
    Inventors: Nathaniel J Quitoriano, Theodore I Kamins, Alexandre M. Bratkovski
  • Publication number: 20110008568
    Abstract: Disclosed are a noble metal nanowire oriented to a surface of a single crystalline substrate, which is prepared using a noble metal oxide, noble metal or noble metal halide as a precursor and, in addition, a method for preparation of the same. The present invention adopting a vapor phase transport method to prepare the noble metal nanowire without any catalyst has advantages of simplifying and reproducing processes of the method and enabling mass production thereof. The prepared nanowire exhibits high purity and quality and a complete crystalline state without defects and/or impurities. The prepared noble metal nanowire also has orientation to a surface of a single crystalline substrate and alignment of the nanowire as well as the orientation can be controlled.
    Type: Application
    Filed: November 3, 2008
    Publication date: January 13, 2011
    Inventors: Bongsoo Kim, Yeongdong Yoo
  • Patent number: 7867466
    Abstract: Means for a thermally conductive and electrically insulating material 1 containing an AlN crystal 150 mainly comprising AlN, and a production method thereof. In production, a molten aluminum layer is formed on an AlN substrate 11 with at least its surface comprising AlN in an atmosphere of a non-oxidizing gas, and the molten aluminum layer is then heated in an atmosphere of N2 gas to form an AlN crystal 150 which mainly comprises an AlN layer 125. The means are also a thermally conductive and electrically insulating material having an AlN crystal and an Al gradient layer, and a production method thereof. In production, a heating step of forming a molten aluminum layer 15 on the AlN layer 125 and heating it in an atmosphere of N2 gas is repeated at least twice or more. At this time, the amount of the N2 gas dissolved in the molten aluminum layer is decreased as the heating step is repeated.
    Type: Grant
    Filed: October 29, 2007
    Date of Patent: January 11, 2011
    Assignee: Denso Corporation
    Inventors: Yukihisa Takeuchi, Yasumasa Hagiwara, Yuuichi Aoki, Eiichi Torigoe
  • Publication number: 20110000425
    Abstract: A substrate processing apparatus comprises: a reaction chamber to process a substrate; a heating target object disposed in the reaction chamber to surround at least a region where the substrate is disposed, the heating target object having a cylindrical shape with a closed end; an insulator disposed between the reaction chamber and the heating target object to surround the heating target object, the insulator having a cylindrical shape with a closed end facing the closed end of the heating target object; an induction heating unit disposed outside the reaction chamber to surround at least the region where the substrate is disposed; a first gas supply system to supply at least a source gas into the reaction chamber; and a controller to control the first gas supply system so that the first gas supply system supplies at least the source gas into the reaction chamber for processing the substrate.
    Type: Application
    Filed: June 24, 2010
    Publication date: January 6, 2011
    Applicant: HITACHI-KOKUSAI ELECTRIC INC.
    Inventors: Shuhei Saido, Takatomo Yamaguchi, Kenji Shirako
  • Patent number: 7862657
    Abstract: A crystal growth method for forming a semiconductor film, the method includes: while revolving one or more substrates about a rotation axis, passing raw material gas and carrier gas from the rotation axis side in a direction substantially parallel to a major surface of the substrate. The center of the substrate is located on a side nearer to the rotation axis than a position at which growth rate of the semiconductor film formed by thermal decomposition of the raw material gas is maximized.
    Type: Grant
    Filed: July 24, 2007
    Date of Patent: January 4, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masaaki Onomura, Yoshiyuki Harada
  • Publication number: 20100329962
    Abstract: A method of introducing NV centres in single crystal CVD diamond material is described. One step of the method comprises irradiating diamond material that contains single substitutional nitrogen to introduce isolated vacancies into the diamond material in a concentration of at least 0.05 ppm and at most 1 ppm. Another step of the method comprises annealing the irradiated diamond to form NV centres from at least some of the single substitutional nitrogen defects and the introduced isolated vacancies.
    Type: Application
    Filed: June 25, 2010
    Publication date: December 30, 2010
    Inventors: Daniel James Twitchen, Sarah Louise Geoghegan, Neil Perkins, Rizwan Uddin Ahmad Khan
  • Publication number: 20100329965
    Abstract: A method of making fancy pale blue or fancy pale blue/green CVD diamond material is described. The method comprises irradiating single crystal diamond material that has been grown by a CVD process with electrons to introduce isolated vacancies into the diamond material, the irradiated diamond material having (or after a further post-irradiation treatment having) a total vacancy concentration [VT] and a path length L such that [VT]×L is at least 0.072 ppm cm and at most 0.36 ppm cm, and the diamond material becomes fancy pale blue or fancy pale blue/green in colour. Fancy pale blue diamonds are also described.
    Type: Application
    Filed: June 25, 2010
    Publication date: December 30, 2010
    Inventors: Daniel James Twitchen, Sarah Louise Geoghegan, Neil Perkins
  • Patent number: 7857907
    Abstract: The present invention relates to a method for forming a layered structure with silicon nanocrystals. In one embodiment, the method comprises the steps of: (i) forming a first conductive layer on a substrate, (ii) forming a silicon-rich dielectric layer on the first conductive layer, and (iii) laser-annealing at least the silicon-rich dielectric layer to induce silicon-rich aggregation to form a plurality of silicon nanocrystals in the silicon-rich dielectric layer. The silicon-rich dielectric layer is one of a silicon-rich oxide film having a refractive index in the range of about 1.4 to 2.3, or a silicon-rich nitride film having a refractive index in the range of about 1.7 to 2.3. The layered structure with silicon nanocrystals in a silicon-rich dielectric layer is usable in a solar cell, a photodetector, a touch panel, a non-volatile memory device as storage node, and a liquid crystal display.
    Type: Grant
    Filed: January 25, 2007
    Date of Patent: December 28, 2010
    Assignee: AU Optronics Corporation
    Inventors: An-Thung Cho, Chih-Wei Chao, Chia-Tien Peng, Wan-Yi Liu, Ming-Wei Sun
  • Patent number: 7858536
    Abstract: A semiconductor device comprising a semiconductor substrate, a gate dielectrics formed on the semiconductor substrate and including a silicon oxide film containing a metallic element, the silicon oxide film containing the metallic element including a first region near a lower surface thereof, a second region near an upper surface thereof, and a third region between the first and second regions, the metallic element contained in the silicon oxide film having a density distribution in a thickness direction of the silicon oxide film, a peak of the density distribution existing in the third region, and an electrode formed on the gate dielectrics.
    Type: Grant
    Filed: September 20, 2007
    Date of Patent: December 28, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuhiro Eguchi, Seiji Inumiya, Yoshitaka Tsunashima
  • Patent number: 7858144
    Abstract: A process of making an organic thin film on a substrate by atomic layer deposition is disclosed, the process comprising simultaneously directing a series of gas flows along substantially parallel elongated channels, and wherein the series of gas flows comprises, in order, at least a first reactive gaseous material, an inert purge gas, and a second reactive gaseous material, optionally repeated a plurality of times, wherein the first reactive gaseous material is capable of reacting with a substrate surface treated with the second reactive gaseous material wherein the first reactive gaseous material, the second reactive gaseous material or both is a volatile organic compound. The process is carried out substantially at or above atmospheric pressure and at a temperature under 250° C., during deposition of the organic thin film.
    Type: Grant
    Filed: September 26, 2007
    Date of Patent: December 28, 2010
    Assignee: Eastman Kodak Company
    Inventors: Diane C. Freeman, David H. Levy, Peter J. Cowdery-Corvan
  • Patent number: 7858181
    Abstract: The present invention provides nanowires which are substantially straight and substantially free of nanoparticles and methods for making the same The nanowires can be made by seeded approaches, wherein nanocrystals bound to a substrate are used to promote growth of the nanowire. Nanocrystals in solution may also be used to make the nanowires of the present invention. Supercritical fluid reaction conditions can be used in a continuous or semi-batch process.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: December 28, 2010
    Inventors: Tobias Hanrath, Xianmao Lu, Keith Johnston, Brian Korgel
  • Publication number: 20100314625
    Abstract: Affords a GaN single-crystal mass, a method of its manufacture, and a semiconductor device and method of its manufacture, whereby when the GaN single-crystal mass is being grown, and when the grown GaN single-crystal mass is being processed into a substrate or like form, as well as when an at least single-lamina semiconductor layer is being formed onto a single-crystal GaN mass in substrate form to manufacture semiconductor devices, cracking is controlled to a minimum. The GaN single-crystal mass 10 has a wurtzitic crystalline structure and, at 30° C., its elastic constant C11 is from 348 GPa to 365 GPa and its elastic constant C13 is from 90 GPa to 98 GPa; alternatively its elastic constant C11 is from 352 GPa to 362 GPa.
    Type: Application
    Filed: June 10, 2010
    Publication date: December 16, 2010
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hideaki NAKAHATA, Shinsuke FUJIWARA, Takashi SAKURADA, Yoshiyuki YAMAMOTO, Seiji NAKAHATA, Tomoki UEMURA
  • Publication number: 20100303704
    Abstract: A method of growing group III-nitride crystals in a mixture of supercritical ammonia and nitrogen, and the group-III crystals grown by this method. The group III-nitride crystal is grown in a reaction vessel in supercritical ammonia using a source material or nutrient that is polycrystalline group III-nitride, amorphous group III-nitride, group-III metal or a mixture of the above, and a seed crystal that is a group-III nitride single crystal. In order to grow high-quality group III-nitride crystals, the crystallization temperature is set at 550° C. or higher. Theoretical calculations show that dissociation of NH3 at this temperature is significant. However, the dissociation of NH3 is avoided by adding extra N2 pressure after filling the reaction vessel with NH3.
    Type: Application
    Filed: August 4, 2010
    Publication date: December 2, 2010
    Applicants: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA, JAPAN SCIENCE AND TECHNOLOGY AGENCY
    Inventor: Tadao Hashimoto
  • Patent number: 7842134
    Abstract: The invention relates to a method of manufacture of a substrate for fabrication of semiconductor layers or devices, comprising the steps of providing a wafer of silicon including at least one first surface suitable for use as a substrate for CVD diamond synthesis, growing a layer of CVD diamond of predetermined thickness and having a growth face onto the first surface of the silicon wafer, reducing the thickness of the silicon wafer to a predetermined level, and providing a second surface on the silicon wafer that is suitable for further synthesis of at least one semiconductor layer suitable for use in electronic devices or synthesis of electronic devices on the second surface itself and to a substrate suitable for GaN device growth consisting of a CVD diamond layer intimately attached to a silicon surface.
    Type: Grant
    Filed: March 20, 2006
    Date of Patent: November 30, 2010
    Inventors: Andrew John Whitehead, Christopher John Howard Wort, Geoffrey Alan Scarsbrook
  • Publication number: 20100295039
    Abstract: A method which has a step of growing a thermostable-state ZnO-based single crystal on a ZnO single crystal substrate at a growth temperature that is equal to or greater than 600° C. and less than 900° C. by using a metalorganic compound containing no oxygen and water vapor based on an MOCVD method.
    Type: Application
    Filed: May 21, 2010
    Publication date: November 25, 2010
    Applicant: Stanley Electric Co., Ltd.
    Inventors: Naochika Horio, Masayuki Makishima
  • Publication number: 20100294196
    Abstract: The present invention is a substrate for growing a single crystal diamond layer including: at least, a base material made of a single crystal diamond, and an iridium film or a rhodium film heteroepitaxially grown on a side of the base material where the single crystal diamond layer is to be grown; wherein a peripheral end portion of a surface of the base material on the side where the single crystal diamond layer is to be grown is chamfered with a curvature radius (r), the curvature radius satisfying (r)?50 ?m. As a result, there is provided a substrate for growing a single crystal diamond layer and a method for producing a single crystal diamond substrate, the substrate and the method in which a single crystal diamond having uniform and high crystallinity can be reproducibly produced at low cost.
    Type: Application
    Filed: April 26, 2010
    Publication date: November 25, 2010
    Applicant: SHIN-ETSU CHEMICAL CO., LTD.
    Inventor: Hitoshi Noguchi
  • Publication number: 20100288191
    Abstract: In a method of growing a gallium nitride crystal, the following steps are performed. First, a base substrate is prepared. Then, a first gallium nitride layer is grown on the base substrate. Thereafter, a second gallium nitride layer less brittle than the first gallium nitride layer is grown.
    Type: Application
    Filed: December 24, 2008
    Publication date: November 18, 2010
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventor: Tomoharu Takeyama
  • Patent number: 7833346
    Abstract: There is provided a group III nitride crystal growth method capable of obtaining a material which is a GaN substrate of low defect density capable of being used as a power semiconductor substrate and in which characteristics of n-type and p-type requested for formation of transistor or the like. A growth method of group III nitride crystals includes: forming a mixed melt containing at least group III element and a flux formed of at least one selected from the group consisting of-alkaline metal and alkaline earth metal, in a reaction vessel; and growing group III nitride crystals from the mixed melt and a substance containing at least nitrogen, wherein after immersing a plurality of seed crystal substrates placed in an upper part of the reaction vessel in which the mixed melt is formed, into the mixed melt to cause crystal growth, the plurality of seed crystal substrates are pulled up above the mixed melt.
    Type: Grant
    Filed: March 14, 2007
    Date of Patent: November 16, 2010
    Assignee: NGK Insulators, Ltd.
    Inventors: Minoru Imaeda, Yoshimasa Kondo, Ichiro Okazaki
  • Publication number: 20100275837
    Abstract: A method for growing III-V nitride films having an N-face or M-plane using an ammonothermal growth technique. The method comprises using an autoclave, heating the autoclave, and introducing ammonia into the autoclave to produce smooth N-face or M-plane Gallium Nitride films and bulk GaN.
    Type: Application
    Filed: June 2, 2010
    Publication date: November 4, 2010
    Applicants: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA, JAPAN SCIENCE AND TECHNOLOGY AGENCY
    Inventors: Tadao Hashimoto, Hitoshi Sato, Shuji Nakamura
  • Patent number: 7824492
    Abstract: Process for producing silicon oxide containing thin films on a growth substrate by the ALCVD method. In the process, a vaporisable silicon compound is bonded to the growth substrate, and the bonded silicon compound is converted to silicon dioxide. The invention comprises using a silicon compound which contains at least one organic ligand and the bonded silicon compound is converted to silicon dioxide by contacting it with a vaporised, reactive oxygen source, in particular with ozone. The present invention provides a controlled process for growing controlling thin films containing SiO2, with sufficiently short reaction times.
    Type: Grant
    Filed: October 2, 2003
    Date of Patent: November 2, 2010
    Assignee: ASM International N.V.
    Inventors: Eva Tois, Suvi Haukka, Marko Tuominen
  • Publication number: 20100272951
    Abstract: Provided is a fabrication method of a noble metal nanowire. More specifically, provided is a fabrication method of a noble metal nanowire, wherein the noble metal nanowire having an epitaxial relation with a single crystal substrate is fabricated on the single crystal substrate using noble metal halide as a precursor by placing the precursor in a front portion of a reactor and the single crystal substrate in a rear portion of the reactor and performing heat treatment in a condition that an inert gas flows from the front portion of the reactor to the rear portion of the reactor under a predetermined pressure, wherein a major axial direction of the noble metal nanowire with respect to a surface of the single crystal substrate is controlled by controlling a temperature of the precursor.
    Type: Application
    Filed: November 12, 2009
    Publication date: October 28, 2010
    Applicant: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Bongsoo KIM, Sol HAN
  • Patent number: 7820131
    Abstract: The present invention is directed to new uses and applications for colorless, single-crystal diamonds produced at a rapid growth rate. The present invention is also directed to methods for producing single crystal diamonds of varying color at a rapid growth rate and new uses and applications for such single-crystal, colored diamonds.
    Type: Grant
    Filed: September 14, 2009
    Date of Patent: October 26, 2010
    Assignee: Carnegie Institution of Washington
    Inventors: Russell J. Hemley, Ho-Kwang Mao, Chih-Shiue Yan
  • Patent number: 7819974
    Abstract: A synthesis route to grow textured thin film of gallium nitride on amorphous quartz substrates and on single crystalline substrates such as c-sapphire and polycrystalline substrates such as pyrolytic boron nitride (PBN), alumina and quartz using the dissolution of atomic nitrogen rather than molecular nitrogen to allow for growth at subatmospheric pressure.
    Type: Grant
    Filed: July 3, 2007
    Date of Patent: October 26, 2010
    Assignee: University of Louisville Research Foundation, Inc.
    Inventors: Mahendra Kumar Sunkara, Hari Chandrasekaran, Hongwei Li