Electrical Component Tested Patents (Class 209/573)
  • Patent number: 5998751
    Abstract: Disclosed is a sorting system configured to sort a plurality of components, such as computer chips. The handler comprises a component handler configured to sort a plurality of components into groups; a plurality of receptacles on the component handler, each of the receptacles adapted to receive one of the sorted groups of components; at least one indicator associated with at least one of the receptacles, the at least one indicator being activated when the associated receptacle is filled to a selected amount with components; a plurality of bins, each of the bins being associated with one of the receptacles on the component handler; and at least one indicator on at least one of the bins, wherein the at least one indicator on the bin is activated when the receptacle associated with that bin is filled to a selected amount.
    Type: Grant
    Filed: February 20, 1998
    Date of Patent: December 7, 1999
    Assignee: Micron Electronics, Inc.
    Inventor: Steve Brunelle
  • Patent number: 5973285
    Abstract: A connector alignment assembly is provided for aligning memory modules in a test position relative to a memory module tester. An automatic feeder receives, stages and then dispenses the electronic memory modules onto a conveyor, one at a time. The conveyor moves the electronic memory modules from the feeder to a test station. A contact plunger is used to push tester contacts against surface contacts of the electronic memory module to electrically connect the electronic memory module to test circuitry. The connector alignment assembly includes two alignment pins which are mounted to the contact plunger, such that when the contact plunger is moved to press the test contacts against the surface contacts, the alignment pins are moved into two alignment holes of the electronic memory module.
    Type: Grant
    Filed: November 26, 1997
    Date of Patent: October 26, 1999
    Assignee: Computer Service Technology, Inc.
    Inventors: Arnold Siegfried Dietrich, Erwin Heinrich
  • Patent number: 5957305
    Abstract: A linearly moving mechanism is provided which allows for shortening the length of linear guide rails mounted to a fixed part and a movable part, respectively. A first linear guide rail 31A is mounted to the side surface of the fixed part opposing the movable part while a second linear guide rail 31B is mounted to the side surface of the movable part opposing the fixed part so as to be in opposing relation to the first linear guide rail. First and second movable members 33A and 33B are slidably engaged with the first and second linear guide rails, respectively. A movable member support 34 supports the first and second movable members thereon toward one end of one of the first and second linear guide rails and toward the other end of the other of the rails, respectively, in the state that the first and second linear guide rails are in opposing relation to each other.
    Type: Grant
    Filed: May 27, 1998
    Date of Patent: September 28, 1999
    Assignee: Advantest Corporation
    Inventor: Hiroyuki Takahashi
  • Patent number: 5954205
    Abstract: A circuit board handling and testing apparatus comprising a housing which defines a top surface. Attached to the housing is a magazine assembly which accommodates a plurality of circuit boards and is adapted to dispense the circuit boards onto the top surface of the housing one at a time. Each of the circuit boards stored within the magazine assembly defines a longitudinal axis. Also attached to the housing is a testing assembly for receiving the circuit board dispensed onto the top surface and performing a testing protocol thereon. A reciprocal transport assembly attached to the housing pushes the circuit board dispensed onto the top surface laterally relative to its longitudinal axis into the testing assembly. A sorting assembly which is also attached to the housing selectively directs the tested circuit board into a particular containment vessel based upon the outcome of the testing protocol.
    Type: Grant
    Filed: January 13, 1997
    Date of Patent: September 21, 1999
    Inventor: Paul E. Smith
  • Patent number: 5931629
    Abstract: A fully automatic device is provided for handling components-containing tubes and for feeding the components contained in these tubes into the input rail or "accumulator" of the loading area of a component processing equipment. Another fully automatic device which is very similar in structure to the above device is also provided for recovering the components from the output rail of the unloading area of the component processing equipment, and reinserting such components into their tubes. Both of these devices have a column holder mounted on a frame for receiving and holding a column of tubes stacked one above the other. A rotatable barrel having a conical shape and a horizontal axis supports a set of tube catching assemblies.
    Type: Grant
    Filed: June 20, 1997
    Date of Patent: August 3, 1999
    Assignee: Corfin Inc.
    Inventor: Sylvain Rodier
  • Patent number: 5931311
    Abstract: An apparatus and method for the rapid switchover between different height modules in an automatic module testing and handling machine. The multi-chip module (MCM) handling apparatus comprises a bottom rail and a guide rail which has an upwardly extending wall and an outwardly extending flange which form a channel. This channel provides a passageway through which a MCM of a first thickness can pass laterally such that the first MCM is in contact with the top surface which positions contact nodes provided on the first MCM at a predetermined vertical position with respect to the top surface. This handling apparatus further comprises a removable justifying plate (RJP) which is removably attached within the first channel, thereby forming a second channel. This second channel provides a passage way through which a MCM of a second thickness, which is less than the first thickness of the first MCM, can pass laterally.
    Type: Grant
    Filed: July 14, 1997
    Date of Patent: August 3, 1999
    Assignee: MCMS, Inc.
    Inventor: Fred Goins, III
  • Patent number: 5927512
    Abstract: An inventive method for sorting integrated circuit (IC) devices of the type having a substantially unique identification (ID) code, such as a fuse ID, includes automatically reading the ID code of each of the IC devices, and sorting the IC devices in accordance with their automatically read ID codes. The inventive method can be used in conjunction with an IC manufacturing process that includes providing semiconductor wafers, fabricating the IC's on each of the wafers, causing each of the IC's to store its ID code, separating each of the IC's from its wafer to form IC dice, assembling the IC dice into IC devices, and testing the IC devices.
    Type: Grant
    Filed: January 17, 1997
    Date of Patent: July 27, 1999
    Assignee: Micron Technology, Inc.
    Inventor: Raymond J. Beffa
  • Patent number: 5895443
    Abstract: The present invention provides test flow assurance using memory imprinting. The device being tested includes a nonvolatile memory portion for storing an information imprint in a present test status field. The imprint indicates the bin category to which the device is to be directed according to the results of a test sequence. During the start of a test in the test flow, the present test status field is read to determine whether the device has already passed through the present test. If so, the device is not retested according to that test step, and it is binned out according to the imprinted information. If the imprint indicates that the device has not already passed through the present test, then the present test sequence is performed, the device programmed with its imprint, and binned out accordingly.
    Type: Grant
    Filed: July 19, 1996
    Date of Patent: April 20, 1999
    Assignee: Intel Corporation
    Inventors: William Gross, Jr., Gregory D. Sabin
  • Patent number: 5865319
    Abstract: An automatic test handler system for automatically supplying IC devices to be tested to an IC tester and sorting the tested IC devices based on the test results. The system includes a testing machine for testing the IC devices by contacting the IC devices with test contactors. Test signals are provided from the IC tester and the resulting signals from the IC devices are received. The testing machine is installed in a test room in which dust, temperature and humidity are controlled in a high degree. A sorting machine is installed outside of the test room for sorting the IC devices that have been tested based on the test results. The sorting machine has a plurality of sort stations for receiving the IC devices based on categories defined in the test results. Tray cassettes hold a plurality of IC trays containing the IC devices, and both the tray cassettes and IC trays are provided with identification numbers.
    Type: Grant
    Filed: June 27, 1996
    Date of Patent: February 2, 1999
    Assignee: Advantest Corp.
    Inventors: Hiroshi Okuda, Shin Nemoto, Hisao Hayama, Katsumi Kojima
  • Patent number: 5848705
    Abstract: A method is described for automatic loading and unloading of printed circuit boards on machines for electrical testing, consisting of feeding the circuits to be tested into a pick-up area (16), detecting the position of the single circuits and comparing the position detected with a correct reference position, transferring the circuits from the pick-up area (16) to a loading area (4) on the test machine, taking into account during transfer any deviation of the actual position of the circuit board from the reference position, so that the circuit is always picked up in the same way, to be set down in the pre-established region of the loading area (4), and unloading the tested circuits from the area (4) of the machine onto a discharge line (7) for good circuits and a magazine (17) for faulty circuits, depending upon the test result.
    Type: Grant
    Filed: December 1, 1995
    Date of Patent: December 15, 1998
    Assignee: Circuit Line SPA
    Inventors: Antonello Gianpaolo, Marchi Giovanni, Martini Riccardo
  • Patent number: 5842579
    Abstract: One or more concentric rings of component seats are rotatable about the rings' center. The seats are uniformly angularly spaced and the rings are incrementally rotated, the increment of rotation being the angular space between adjacent seats. The rings are inclined at an angle and a stream of components is poured onto the rings as they are rotating. Stationary fences adjacent to outboard sides of the seats, confine unseated components to tumble randomly, due to gravity, over empty seats passing through arcs of the rings' rotation paths. The random tumbling results in seated components. In the paths of the rotating rings are electrical contactors for coupling the components to a tester. Preferably there are five contactor stations to permit five different kinds of tests to be performed simultaneously. Tested components pass beneath an ejection manifold which defines a plurality of ejection holes which register with a set of seats each time the ring is rotated an increment.
    Type: Grant
    Filed: November 16, 1995
    Date of Patent: December 1, 1998
    Assignee: Electro Scientific Industries, Inc.
    Inventors: Douglas J. Garcia, Steven D. Swendrowski, Mitsuaki Tani, Hsang Wang, Martin J. Twite, III, Malcolm V. Hawkes, Evart David Shealey, Martin S. Voshell, Jeffrey L. Fish, Vernon P. Cooke
  • Patent number: 5831856
    Abstract: A dynamic random access memory (DRAM) testing apparatus includes a substantially upright support plate on which at least one elongated feeding chute is provided, having a channel co-extensive therewith for receiving and holding therein an IC bar which contains a number of DRAMs to be tested. The DRAMs are movable downward along the channel by means of gravity. A shifting mechanism, which is controlled by a control unit, sequentially transfers the DRAMs from the feeding chute to a testing device defining a holder for receiving the DRAM to carry out the test. The test is conducted by the control unit and the test result is transmitted thereto for classifying the DRAM being tested. The tested DRAM is then forwarded to a movable member to be conveyed thereby to a particular one of a plurality of out-feeding chutes which are associated with different classifications of the DRAMs. The DRAM is then moved from the out-feeding chute to an empty IC bars to be collected therein.
    Type: Grant
    Filed: July 21, 1997
    Date of Patent: November 3, 1998
    Assignee: Behavior Tech Computer Corp.
    Inventor: Don Lin
  • Patent number: 5788084
    Abstract: An automatic testing system and method for inspecting the contact characteristics of the contact pins of each of sockets of an IC tester disposed in the testing zone of an IC handler in an automatic and efficient fashion prior to testing semiconductor devices under test is provided. A test device which is identical in shape to semiconductor devices to be tested and the electric characteristics of which are known is provided and is carried on a test tray and conveyed from the loader section to the testing zone where the test device is brought into contact with a socket to measure the contact characteristics of the socket. Upon completion of the measurement, the test device is transferred from the test tray to the customer tray, and the customer tray with the test device thereon is then temporarily stored in a tray storing means in the unloader section. Thereafter, the customer tray is conveyed to the loader section where the test device is transferred from the customer tray to the test tray.
    Type: Grant
    Filed: July 1, 1996
    Date of Patent: August 4, 1998
    Assignee: Advantest Corporation
    Inventors: Takeshi Onishi, Tadashi Kainuma, Katsumi Kojima, Bannai Kuniaki, Tanaka Koichi, Yamada Naruhito
  • Patent number: 5777873
    Abstract: In a test system, test fixtures that hold modules are controlled to enable an operator to separate modules that pass a test from modules that fail. When a module under test is properly loaded in a test fixture, a test fixture controller instructs a tester to start a test procedure. For a semiautomatic test fixture, a test start command is automatically supplied to the tester when the test fixture is closed around the module under test. The test fixture controller automatically interprets the test results provided by the tester. The module that passes the test is automatically released from the test fixture. If the module fails, the test fixture controller keeps it locked in the test fixture. The module is released only when an operator presses a failure acknowledgement button on a control box.
    Type: Grant
    Filed: April 29, 1996
    Date of Patent: July 7, 1998
    Assignee: Mitsubishi Semiconductor America, Inc.
    Inventors: John Cox, Waite R. Warren, Jr.
  • Patent number: 5772040
    Abstract: Workpieces in which, for example, wire bonding has been performed are inspected to determine if they are defective or not by an inspection device. Workpieces which have been found to be defective are conveyed to one workpiece magazine and workpieces which have been found to be defect-free are conveyed to another workpiece magazine, thus defective and non-defective workpieces are separated immediately after inspection.
    Type: Grant
    Filed: September 26, 1995
    Date of Patent: June 30, 1998
    Assignee: Kabushiki Kaisha Shinkawa
    Inventors: Hiromi Tomiyama, Yoshiyuki Ogata, Satoshi Enokido, Takeyuki Nakagawa
  • Patent number: 5704489
    Abstract: A circuit board handling and testing apparatus comprising a housing which defines a top surface. Attached to the housing is a magazine assembly which accommodates a plurality of circuit boards and is adapted to dispense the circuit boards onto a testing assembly attached to the housing one at a time. Each of the circuit boards stored within the magazine assembly defines a longitudinal axis. The testing assembly includes a modular testing component for receiving the circuit board dispensed onto the testing assembly and performing a testing protocol thereon. A reciprocal transport assembly attached to the housing pushes the circuit board dispensed onto the testing assembly laterally relative to its longitudinal axis into the modular testing component of the testing assembly. A sorting assembly which is also attached to the housing selectively directs the tested circuit board into a particular containment vessel based upon the outcome of the testing protocol.
    Type: Grant
    Filed: January 13, 1997
    Date of Patent: January 6, 1998
    Inventor: Paul E. Smith
  • Patent number: 5686834
    Abstract: A handling system which carries a carrier carrying a plurality of IC devices, subjects the IC devices to testing, sorts the tested IC devices and stores the tested IC devices, said handling system comprises test units for electrically connecting IC devices to an IC socket for transmitting electrical signals provided by the IC devices to an IC tester; a loader/unloader unit for transferring IC devices to be tested from a container to a carrier, sorting tested IC devices and selectively transferring the tested IC devices from the carrier to containers; and carrier transfer units combined with the test units, respectively, to transfer the carrier from the loader/unloader unit to the corresponding test units and from the corresponding test units to the loader/unloader unit. The number of the test units to be used in combination with the loader/unloader unit being varied according to test time required by the IC tester for testing the IC devices contained in the carrier.
    Type: Grant
    Filed: September 20, 1996
    Date of Patent: November 11, 1997
    Assignee: Ando Electric Co., Ltd.
    Inventors: Tetsuya Okudaira, Akio Nakamura, Yoshihiro Goto
  • Patent number: 5686830
    Abstract: A method of supplying positive temperature coefficient thermistor elements in which a plurality of positive temperature coefficient thermistor elements 1 are divided into groups G.sub.1 to G.sub.8 for each range of predetermined resistance values, two arbitrary positive temperature coefficient thermistor elements are taken out of one of the groups G.sub.1 to G.sub.8 and supplied as one set of positive temperature coefficient thermistor elements.
    Type: Grant
    Filed: June 5, 1996
    Date of Patent: November 11, 1997
    Assignee: Muarata Manufacturing Co., Ltd.
    Inventors: Kenji Takakura, Yuichi Takaoka
  • Patent number: 5667077
    Abstract: An apparatus and method for the rapid switchover between different height modules in an automatic module testing and handling machine. The multi-chip module (MCM) handling apparatus comprises a bottom rail and a guide rail which has an upwardly extending wall and an outwardly extending flange which form a channel. This channel provides a passageway through which a MCM of a first thickness can pass laterally such that the first MCM is in contact with the top surface which positions contact nodes provided on the first MCM at a predetermined vertical position with respect to the top surface. This handling apparatus further comprises a removable justifying plate (RJP) which is removably attached within the first channel, thereby forming a second channel. This second channel provides a passage way through which a MCM of a second thickness, which is less than the first thickness of the first MCM, can pass laterally.
    Type: Grant
    Filed: April 26, 1996
    Date of Patent: September 16, 1997
    Assignee: Micron Electronics, Inc.
    Inventor: Fred Goins, III
  • Patent number: 5648728
    Abstract: An apparatus for positioning a workpiece comprises a plurality of pedestals each comprising a first portion having a first width, a second portion having a second width greater than the first width, and a chamfered portion interposed between the first and second portions. The inventive apparatus further comprises a support having a plurality of holes therein for receiving the plurality of pedestals, the support further having a plurality of chamfered portions with one the chamfered portion about a periphery of each the hole. A base urges the chamfered portions of the pedestal away from the chamfered portions of the support.
    Type: Grant
    Filed: April 23, 1996
    Date of Patent: July 15, 1997
    Assignee: Micron Electronics, Inc.
    Inventor: Robert L. Canella
  • Patent number: 5617957
    Abstract: It is an object to provide a method of sorting semiconductor lasers, capable of appropriately removing semiconductor lasers which can cause a so-called sudden death in use. After a first current within a range of 50 to 150% the maximum rated current is supplied to the semiconductor lasers for a predetermined period of time, a second current is supplied within a range of 120 to 250% the maximum rated current for a short period of time. Semiconductor lasers which are destroyed or degraded in output characteristics are removed as defective devices.
    Type: Grant
    Filed: May 15, 1995
    Date of Patent: April 8, 1997
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Ichiro Yoshida, Tsukuru Katsuyama, Jun-ichi Hashimoto
  • Patent number: 5611436
    Abstract: Apparatus for handing and testing PC cards and, more particularly, modem cartridge units. The apparatus uses a gravity drop conveyance or slideway in combination with transverse test coupling unit. Feed gate apparatus separates and singly drops each PC card for drop down the chassis slideway and into a test position beneath a test box. The test box is then actuated transversely to connect test plugs to each side of the PC card which then undergoes a predetermined test sequence. Test PC cards are then further dropped along to slideway to separation and classification stages.
    Type: Grant
    Filed: July 13, 1995
    Date of Patent: March 18, 1997
    Inventor: Harrel D. Ashby
  • Patent number: 5603412
    Abstract: The present invention provides test flow assurance using memory imprinting. The device being tested includes a nonvolatile memory portion for storing an information imprint in a present test status field. The imprint indicates the bin category to which the device is to be directed according to the results of a test sequence. During the start of a test in the test flow, the present test status field is read to determine whether the device has already passed through the present test. If so, the device is not retested according to that test step, and it is binned out according to the imprinted information. If the imprint indicates that the device has not already passed through the present test, then the present test sequence is performed, the device programmed with its imprint, and binned out accordingly.
    Type: Grant
    Filed: February 2, 1996
    Date of Patent: February 18, 1997
    Assignee: INTEL Corporation
    Inventors: William Gross, Jr., Gregory D. Sabin
  • Patent number: 5584395
    Abstract: A sorting apparatus has a rotatable drum member having sorting through-holes selectively open and closed by associated shutter plates, and semiconductor devices examined by a testing system are sequentially stored in the sorting through-holes: when one of the sorting through-holes is aligned with a storage box for the decided grade, the shutter plate is opened, and the semiconductor device is thrown into the storage box.
    Type: Grant
    Filed: March 21, 1995
    Date of Patent: December 17, 1996
    Assignee: NEC Corporation
    Inventor: Yasuaki Homma
  • Patent number: 5576695
    Abstract: Ground anomalies in electronic circuit component test equipment are identified by a circuit arrangement which continuously monitors the integrity of a ground potential connection to the travel path, and provides both a visual display and an audible alarm in the event of a prescribed degradation in ground potential at any of a plurality of monitored locations along the travel path. A resistance monitoring circuit contains a plurality of voltage dividers that are coupled to respective ones of plural locations along the part's travel path through the handler. Each voltage divider monitors the effective resistance to ground at a respective location within the handler. A scanner unit sequentially couples the voltage divider outputs to a comparator.
    Type: Grant
    Filed: October 12, 1993
    Date of Patent: November 19, 1996
    Assignee: Harris Corporation
    Inventors: William O. Minger, Michael G. Lewis, Kevin B. Kincaid
  • Patent number: 5568870
    Abstract: The invention is a machine used to test and sort small electronic components. The machine includes a feed station, a testing station and a sorting station. The components are carried between the different stations by a rotatable transport wheel that includes a number of peripherally-located and radially-aligned compartments.The testing station includes a top lead that is moved in a direction away from or toward the central axis of the wheel. The movement is controlled by a follower roller that is connected to the lead and that travels along a surface of a cam ring that is attached to the transport wheel. The testing station further includes a shielding strip that isolates the electronic component from surrounding fields during the testing operation.
    Type: Grant
    Filed: August 18, 1994
    Date of Patent: October 29, 1996
    Assignee: Testec, Inc.
    Inventor: Klaus Utech
  • Patent number: 5538141
    Abstract: The present invention provides test flow assurance using memory imprinting. The device being tested includes a nonvolatile memory portion for storing an information imprint in a present test status field. The imprint indicates the bin category to which the device is to be directed according to the results of a test sequence. During the start of a test in the test flow, the present test status field is read to determine whether the device has already passed through the present test. If so, the device is not retested according to that test step, and it is binned out according to the imprinted information. If the imprint indicates that the device has not already passed through the present test, then the present test sequence is performed, the device programmed with its imprint, and binned out accordingly.
    Type: Grant
    Filed: September 27, 1994
    Date of Patent: July 23, 1996
    Assignee: INTEL Corporation
    Inventors: William Gross, Jr., Gregory D. Sabin
  • Patent number: 5516028
    Abstract: A process and system exists for temperature control and testing of modules, such as printed circuit boards, with fitted electronic, electromechanical and mechanical components or individual components, wherein the modules are subjected, following assembly in a soldering process and when the solder joints are still in a semi-molten state, to one or more test phases at high and low temperature, in order to detect defects at an early stage and to take immediate corrective measures when errors occur. To this end, in a first test phase the modules are cooled, as they emerge from the soldering process, to a temperature ranging from 40.degree. to 125.degree. C. and tested in a first test phase. Thereafter, in a second test phase the modules are cooled to a temperature ranging from -40.degree. to 10.degree. C. and tested. In the respective test phase the modules are subjected to a component and/or function test in order to determine defective modules.
    Type: Grant
    Filed: November 7, 1994
    Date of Patent: May 14, 1996
    Inventors: Richard A. Rasp, Bernd Johannsen
  • Patent number: 5465850
    Abstract: An integrated circuit test system tests a plurality of integrated circuit devices which are classified by an auto-handler. The test system comprises a test board for receiving the device under test, circuit tester for carrying out the tests, an auto-handler for mounting, demounting and classification the devices based on the test results. Individual test result signals are related to the respective individual devices. Equipment on the test board correspond to the respective devices and transmit both an individual existence signal and a device identification signal synchronized with the individual test result signal. The device identification signal identifies the individual information signal as being related to a particular device, in order to avoid an error in classification of the device by the auto-handler irrespective of possible wrong connections and of the order of the transmission of the individual test result signals.
    Type: Grant
    Filed: March 5, 1993
    Date of Patent: November 14, 1995
    Assignee: NEC Corporation
    Inventor: Seiichi Kase
  • Patent number: 5348164
    Abstract: There is an IC (integrated circuit) testing device 11 that receives singulated ICs from a singulation station's bottom table 44, where an IC 15 has slid down onto loading ramp or track 16. The IC will slide into test station 18, where stop pin 22 has been inserted to stop the IC in DUT (device under test) station 20. In the DUT station, the IC is securely held in position by an extractor bar 26, insertion bar 28, and a part guide 24. Thereby, test cite station 18 will move downward and insert IC 15 into testing socket 30. After testing the IC, testing station 18 returns upward with the IC in the same secured position. Pin 22 will be removed to allow the IC to slide into part holding station 31. If the IC was not defective, pin 32 will be removed to allow the IC to slide onto track 36 of the IC separator station 34. While the test cite station 18 is in the up position a second IC is slid along track 16 and loaded into DUT cite 20 being readied for the next test cycle.
    Type: Grant
    Filed: April 13, 1993
    Date of Patent: September 20, 1994
    Assignee: Micron Semiconductor, Inc.
    Inventor: Steve W. Heppler
  • Patent number: 5325582
    Abstract: Apparatus, and a related method for its operation, for integrating selected multiple assembly and repair operations of electronic component packages, such as printed wiring board assemblies (PWBAs), at a single multi-function workstation. Each PWBA product is uniquely identified by a bar code or similar inscription, and the identification permits product data to be retrieved from a factory or depot database. The retrieved product data controls the various operations to be performed, such as positioning and soldering of surface-mounted components, inspection for defects, desoldering of defective components, and reinstallation of replacement components.
    Type: Grant
    Filed: October 19, 1992
    Date of Patent: July 5, 1994
    Assignee: TRW Inc.
    Inventors: Peter S. Glaser, Jeffery A. Calkins, Jeffrey M. Riggs
  • Patent number: 5321885
    Abstract: A system for manufacturing printed circuit board units having facilities for automatically performing a component replacement work or component replenishment work which may take place during the changeover of products and ensuring an effective flexible manufacture of the printed wiring board units includes a plurality of the processing cells. Conveyance passages, on which automatic conveying vehicles travel, extend across the processing cells. Along the conveyances passages, there are provided storages opposite to the processing cells. Predetermined electronic components are arranged in advance onto a pallet in a predetermined sequence by an automatic on-pallet arranging unit provided separately from the processing cells, and the pallet is supplied into the processing cells.
    Type: Grant
    Filed: November 12, 1992
    Date of Patent: June 21, 1994
    Assignee: Fujitsu Limited
    Inventors: Toshikatsu Hino, Masakazu Kobayashi, Shozo Suzuki, Satomi Furukawa
  • Patent number: 5319353
    Abstract: An alarm display system for automatic test handling of electric devices such as integrated circuits ("ICs"), semiconductor chips and the like, is capable of notifying and displaying an occurrence of an error or other inadequacies in the automatic test handler, a generic position and a specific position of the error in the test handler. The test handler wherein the alarm display system of the present invention is to be included has improved IC transfer, test sequence and sorting capabilities in order to provide enhanced productivity and reliability for the testing of integrated circuits. The alarm display system is capable of showing an error and its position, and at the same time, when there is no error, controlling and displaying a general procedure of the test handler.
    Type: Grant
    Filed: October 14, 1992
    Date of Patent: June 7, 1994
    Assignee: Advantest Corporation
    Inventors: Takeshi Ohnishi, Diane D. Kakihara
  • Patent number: 5313156
    Abstract: An integrated circuit (IC) device test handler which is adaptable to receive various customer tray configurations and automatically test the ICs within. The test handler comprises a customer tray magazine input area, a load section, a soak chamber, a test section, an unsoak chamber and an unload area. Two magazines containing customer trays with IC devices are input to the handler. An elevator mechanism raises the customer trays within one magazine at a time to a position which can be accessed by the loader of the test handler. A catcher device moves the trays to a buffer platform where the trays can be accessed by a transfer arm. The transfer arms moves the customer trays to one of two load stages. A pick and place apparatus removes the IC devices from each customer tray on the load stages and transfers them to a precisor for alignment and then to a test tray.
    Type: Grant
    Filed: December 4, 1991
    Date of Patent: May 17, 1994
    Assignee: Advantest Corporation
    Inventors: Mark W. Klug, Thomas E. Toth, Theodore C. Guenther, Martin Twite, Kazuyuki Tsurishima, Mitsuaki Tani, Minoru Baba, Teruaki Sakurada
  • Patent number: 5307011
    Abstract: A loader and unloader is disclosed which is utilized in conjunction with an automatic test machine for handling electric devices such as integrated circuits ("ICs"), semiconductor chips, and the like. The loader handles trays containing a number of ICs to be tested and transfers them to a location on the handler where the ICs can be accurately and quickly removed from the trays for testing. Following the testing, the unloader of the present invention handles the trays which receive the ICs in accordance with various sort categories depending upon the test results. The present invention also encompasses a dual receptacle transfer arm which shuttles IC trays between and among the various components of the loader and unloader. These components are configured so as to minimize travel distance and handling time, thereby increasing the productivity of an automatic test handler into which the present loader and unloader may be incorporated.
    Type: Grant
    Filed: December 4, 1991
    Date of Patent: April 26, 1994
    Assignee: Advantest Corporation
    Inventor: Mitsuaki Tani
  • Patent number: 5267395
    Abstract: The inventive apparatus is to provide rapid, automatic separation, classification and operator assisted dispensation of integrated circuit assemblies from burn-in and device under test boards to which they are attached. The apparatus is computer controlled, with an electronic control panel, and is assembled to differentiate between and separate physically acceptable and unacceptable integrated circuit assemblies and deliver, by means of a suitable reservoir, the acceptable assemblies to appropriate carrier tubes for further processing or shipping. The system uses an indexing table to move an inverted device under test board across an array of assembly extraction fingers which remove attached integrated circuit assemblies from the sockets of the test board and drop them into a reservoir. The reservoir is slotted to receive the individual assemblies and dispense them into carrier tubes.
    Type: Grant
    Filed: January 6, 1993
    Date of Patent: December 7, 1993
    Assignee: Micron Semiconductor, Inc.
    Inventors: Arthur T. Jones, Jr., William C. Layer
  • Patent number: 5261775
    Abstract: In IC test equipment which has an input magazine support station for supporting a magazine discharged from an input magazine stocker and an output magazine support station for supporting a magazine into which IC elements tested in a testing station are loaded, a magazine inverting device is provided between the input magazine stocker and the input magazine support station, for turning the magazine through 90 or 180 degrees about its lengthwise direction, an IC inverting device is provided between the testing station and the output magazine support station, for turning an IC element through 90 or 180 degrees about the direction of its travel, and an IC diverter is provided whereby the orientation of the inverted IC relative to the direction of its travel is reversed and is then discharged into the magazine supported at the output magazine support station.
    Type: Grant
    Filed: September 30, 1991
    Date of Patent: November 16, 1993
    Assignee: Advantest Corporation
    Inventor: Yoshihito Kobayashi
  • Patent number: 5247247
    Abstract: A low temperature IC handling apparatus having premeasurement and postmeasurement drying chambers 3 and 4 which are provided at entrance and/or exit of a low temperature IC test chamber 1 and connected therewith via shutters 6 and 7, respectively. The drying chambers 3 and 4 are provided with low humidity nitrogen gas supply units 9 and 11, respectively, and a mechanism 13 for supplying an IC 17b to be measured to the low temperature IC test chamber 1 and a mechanism 14 for unloading a measured IC 17c from the low temperature IC test chamber 1, respectively. A control unit for controlling these mechanisms is provided. Frosting on the seam between the low temperature IC test chamber and the drying chambers and on movable components in these chambers can be prevented and dew condensation on ICs after completion of the measurement at fixed low temperature can be prevented. Therefore, operating efficiency can be considerably increased.
    Type: Grant
    Filed: January 21, 1992
    Date of Patent: September 21, 1993
    Assignee: NEC Corporation
    Inventor: Seiichi Kase
  • Patent number: 5230432
    Abstract: An apparatus (19) for singulating a series of packages (17). The apparatus (19) includes a vertical wheel (12), a retainer spring (10), a gravity feed track (14), a pass track (15), and a reject track (16). The vertical wheel (12) comprises a plurality of slots (22-29), and rotates in a clockwise direction to deliver the packages (17) to an electrical test fixture (18). Upon completion of testing, the vertical wheel (12) rotates in a clockwise direction and delivers the packages (17) to either the pass track (15) or the reject track (16). A motor driven eccentric (37) actuates the retainer spring (10) to unblock the appropriate slot (22-29), thereby releasing the packages (17) from the appropriate slot (22-29).
    Type: Grant
    Filed: October 15, 1991
    Date of Patent: July 27, 1993
    Assignee: Motorola, Inc.
    Inventor: Maureen Sugai
  • Patent number: 5217120
    Abstract: An apparatus for automatically loading and unloading sleeves for an IC tester and then selectively reloading the sleeves after testing, which is controlled by a conventional microprocessor using sensor input and which automatically transports the IC chip containing sleeves randomly contained in a hopper to a sorter section in a correct posture by means of a timing belt having sleeve holders, to feed the chips in the sorter section, to the tester by a first transfer block, and then automatically transfer empty sleeves from an ejector section having a cam plate and an ejector through a dropping section having a pair of guide rails to an unloader section having a second transfer block, a sleeve holder, a sensor and a pushing plate, thereby permitting the sleeves to be refilled with the tester and sorted IC chips and stored in a storage box.
    Type: Grant
    Filed: April 13, 1992
    Date of Patent: June 8, 1993
    Assignee: Goldstar Co., Ltd.
    Inventors: Soo P. Lee, Sub I. Kim, Duk H. Lee, Yol Kim, Dong C. Ahn
  • Patent number: 5207350
    Abstract: An apparatus for loading devices into a semiconductor tester is disclosed. The tester has an input track for accepting devices. The apparatus includes a number of elongated tracks for holding a plurality of semiconductor devices. Each elongated track has at its input end a stop hinge for connection to a tube for holding the semiconductor devices. Each elongated track has at its output end a gate for controlling the release of devices onto the input track of the tester from the elongated track. A control circuit controls the operation of the gates so that the devices can be loaded from the elongated tracks onto the input track of the tester sequentially.
    Type: Grant
    Filed: October 31, 1991
    Date of Patent: May 4, 1993
    Assignee: VLSI Technology, Inc.
    Inventor: Lawrence E. Spanton
  • Patent number: 5184068
    Abstract: A device for automatically presenting electronic devices to a tester for testing. A plurality of carriers, each for carrying a set of electronic devices are cyclically conveyed in a close loop from a loading stage where electronic devices are loaded onto the carriers, through a pre-test chamber, such as a "soak" chamber, from the pre-test chamber to a test stage where the devices are preferably lifted from the carrier to come into contact with a test head contactor for testing, from the test stage to a post-test chamber, such as "un-soak" chamber, through the post-test chamber to an unloading stage where the carriers are unloaded of the tested electronic devices, and then from the unloading stage back to the loading stage to receive a new set of untested electronic devices. Optionally, each carrier comprises a set of secondary carriers which ride in a like number of seats defined by a primary carrier and sets of electronic devices are loaded onto and unloaded from the secondary carriers.
    Type: Grant
    Filed: March 2, 1992
    Date of Patent: February 2, 1993
    Assignee: Symtek Systems, Inc.
    Inventors: Ray G. Twigg, Mark W. Klug, Santino Marrone, Malcolm V. Hawkes
  • Patent number: 5168218
    Abstract: A handler system for transferring circuit packages, such as integrated circuits, from a tray containing a batch of the integrated circuits to a testing socket at a test site enjoys the advantages of high precision placement of the integrated circuit in the testing socket to achieve greatly reduced lead bending and damage to the integrated circuit body. Such precision is achieved by a simple mechanism wherein the travel of the integrated circuit from the tray to the test site and back to a selectable one of the good tray and the reject tray is performed exclusively along a single axis of movement of a carrier. The linear bidirectional motion of the carrier is limited to the z-axis, and eliminates misalignment which might result from wear of a ball screw and nut. The system is controlled by a computer which contains in its memory information relating to the dimensions of the trays and the types of circuit packages which are to be tested.
    Type: Grant
    Filed: May 17, 1991
    Date of Patent: December 1, 1992
    Inventor: Donald S. Rich
  • Patent number: 5151650
    Abstract: A handler (11) which transports a number of packaged semiconductor devices (12) in a boat (23) to a test head (14) and tests the devices (12) is provided. The handler (11) has an input staging section (29), a testing section (31) which is adjacent to the test head (14), and an output staging section (36). A boat transport (27a, 27b) moves the boat (23) from the input staging section (29) to the testing section (31) and from the testing section (31) to the output staging section (36). The boat transport (27a, 27b) operates during the device testing to provide substantially parallel operation of the testing and handling steps. A boat lift (39) moves the boat (23) to the test head (14) to allow the packaged semiconductor devices (12) to remain in the boat (23) during testing.
    Type: Grant
    Filed: September 3, 1991
    Date of Patent: September 29, 1992
    Assignee: Motorola, Inc.
    Inventors: Milo W. Frisbie, Larry A. Nickerson, Mavin C. Swapp
  • Patent number: 5150797
    Abstract: An IC sorting and receiving apparatus has a transportation unit for transporting ICs sorted in accordance with tested results, and a reception unit for receiving the ICs transported by the transportation unit. The reception unit includes at least one vertically movable tray loader having a vertical drive unit, and a horizontally movable tray loader provided over the vertically movable tray loader. The horizontally movable tray loader has a horizontal drive unit for moving the horizontally movable tray loader horizontally away from the region over the vertically movable loader.
    Type: Grant
    Filed: July 3, 1991
    Date of Patent: September 29, 1992
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventor: Junichirou Shibata
  • Patent number: 5131206
    Abstract: The invention relates to a novel method for the insertion of structural components, in particular electrical components and, in this connection, preferably chips, into depressions of a tape available on a component discharge, in which (method) the said components, in a predetermined orientation, are fed in multiple paths to a component intake and from there the first component of each path is in each instance received by a pickup slot on a transfer element rotating about a shaft and the components of each group so formed are tested and then inserted commonly into the available depressions at the component discharge when all components of the group have been found to be free of defects upon testing, and in which (method) defective components are removed from the pickup slots of the transfer element.
    Type: Grant
    Filed: November 20, 1990
    Date of Patent: July 21, 1992
    Inventor: Georg Sillner
  • Patent number: 5121052
    Abstract: A handler for semiconductor devices has a positioning wheel with a number of platforms that hold semiconductor devices, a mechanism for rotating the positioning wheel, and a mechanism for elevating and lowering the platforms. A semiconductor device is inserted into one of the platforms, the positioning wheel rotates until the platform is aligned with the leads of a semiconductor device tester. The platform is then raised placing the leads of the tester in contact with the semiconductor device. After testing is complete, the platform is lowered to the surface of the wheel and the wheel is rotated further to align the platform with an apparatus for storing semiconductor devices. The tested semiconductor device is ejected from the platform into the sorting apparatus.
    Type: Grant
    Filed: January 18, 1991
    Date of Patent: June 9, 1992
    Assignee: Motorola Inc.
    Inventor: Larry A. Nickerson
  • Patent number: 5065089
    Abstract: A circuit handler provides a controllable environment for monitoring of an electrical device which is being subjected to a test procedure. The controllable environment may correspond to temperature extreme on the order of -55.degree. C. and +155.degree. C. The circuit handler has a support base with a conditioning input for receiving the conditioning fluid, which may be heated air or super-cooled nitrogen or hydrogen, a control input for receiving pneumatic signals, and a pressurized air input for forming an air curtain which prevents the cold conditioning fluid from forming ice on the transport rails. The mechanical operations within the support base are performed by pneumatic solenoids to avoid the generation of stray magnetic or electrical fields which might interfere with the electrical testing process. Delivery of the conditioning fluid to the test site, and possibly a pre-soak site, is achieved by manifold depressions formed on the underside of a test site portion of the transport rail.
    Type: Grant
    Filed: June 1, 1990
    Date of Patent: November 12, 1991
    Assignee: Tovex Tech, Inc.
    Inventor: Donald S. Rich
  • Patent number: 5042668
    Abstract: A method and apparatus are disclosed for randomly selecting and automatically testing surface mount passive electronic components. A detachable hopper is utilized to contain a plurality of randomly oriented electronic components which are agitated pneumatically and urged by vibration and gravity into a uniform orientation within a groove in an inclined track plate. A seal plate acts in conjunction with the groove within the track plate to form an elongate throat passage which is periodically cleared to prevent clogging by pulsating pneumatic pressure. A component detection circuit is utilized to detect the presence of an electronic component at a predetermined testing position and a pair of movable conductive probes are then urged into contact with the component to permit testing. In response to a successful test the component under test is then ejected pneumatically back into the detachable hopper.
    Type: Grant
    Filed: September 22, 1989
    Date of Patent: August 27, 1991
    Assignee: International Business Machines Corporation
    Inventors: Ronald E. Hunt, Verlon E. Whitehead
  • Patent number: 5034749
    Abstract: The apparatus (20) includes electrically conductive contacts (44, 54) that are spaced apart a distance slightly less than the distance between the terminals (34, 36) formed on the components (24) to be tested. One contact (54) is held in position by a spring (112). The other contact (44) is stationary. The contacts (44, 54) slide against the terminal surfaces (52, 56) of the components (24) that are conveyed into a test location (26) between the contacts. The apparatus employs few moving parts and the sliding motion of the contacts (44, 54) against the terminal surfaces (52, 56) ensures that the contacts (44, 54) penetrate any oxide layer present on the terminal surfaces (52, 56). In an alternative embodiment (160), two sets of contacts (44L, 44T, 54L, 54T) are employed for testing components (24) in two adjacent test locations (26L, 26T).
    Type: Grant
    Filed: September 21, 1989
    Date of Patent: July 23, 1991
    Assignee: Electro Scientific Industries, Inc.
    Inventors: John R. Jungblut, David A. Bruno