Abstract: An LDD lateral DMOS transistor is provided in a lightly-doped epitaxial layer of a first conductivity above a substrate of the same conductivity. A highly-doped buried layer of the first conductivity is provided under the LDD lateral DMOS transistor to relieve crowding of electrical equipotential distribution beneath the silicon surface. In one embodiment, a gate plate is provided above the gate and the gate-edge of the drift region. An optional N-well provides further flexibility to shape electric fields beneath the silicon surface. The buried layer can also reduce the electric field in a LDD lateral diode and improves cathode-to-anode reversed-recovery characteristics.
Type:
Grant
Filed:
May 6, 1991
Date of Patent:
January 31, 1995
Assignee:
Siliconix Incorporated
Inventors:
Richard K. Williams, Michael E. Cornell
Abstract: A light emitting tunnel diode oscillator comprising a body of single crystalline material having a first portion n-doped and a second portion p-doped in such a way that the resulting p-n junction has the low voltage conductance characteristics of a tunnel diode as well as characteristics of light emission.The light emitting tunnel diode oscillator comprises a plurality of alternately layered n-doped portions and p-doped portions.a light emitting tunnel diode oscillator wherein said first n-doped portion and said second p-doped portion are formed to have a thickness corresponding to an integral number of desired wave lengths.
Abstract: A semiconductor elements having N-type negative resistance characteristics are connected in series to obtain a series circuit. The two ends of the series circuit serve as drive voltage terminals to which periodic drive voltages are applied. At least one of the semiconductor elements has a control electrode to which a voltage is applied to change the peak current. A connection point between the two semiconductor elements serves as an output terminal.
Type:
Grant
Filed:
July 14, 1992
Date of Patent:
May 17, 1994
Assignee:
Nippon Telegraph and Telephone Corporation
Abstract: A resonant tunneling semiconductor device having two large bandgap barrier layers (12, 14) separated by a quantum well (13) is provided. The two barriers (12,14) and the quantum well (13) are formed between first and second semiconductor layers (11, 16) of a first conductivity type. A monolayer (17) of material having a different bandgap than the quantum well material is provided in the quantum well thereby lowering the ground state energy level of the quantum well. Alternatively, monolayers (18, 19) having a different bandgap than that of the first and second semiconductor layers (11, 16) are formed in the first and second semiconductor layers, respectively, outside of the quantum well (13).
Type:
Grant
Filed:
February 21, 1992
Date of Patent:
December 14, 1993
Assignee:
Motorola, Inc.
Inventors:
Herbert Goronkin, Jun Shen, Saied Tehrani
Abstract: An interband single-electron tunnel transistor utilizes an interband single-electron tunneling phenomenon between a valence band and a conduction band through a p-n junction. The transistor includes the combination of microcapacities as fundamental constituent elements each formed by joining a p-type semiconductor material doped with an impurity in the degree of concentration with which a Fermi level overlaps a valence band and an n-type semiconductor material doped with an impurity in the degree of concentration with which the Fermi level overlaps a conduction band. The microcapacity includes a p-n junction having a junction area with which interband electron tunneling is inhibited due to Coulomb blockade.
Abstract: A multiple wavelength LED having a monolithic cascade cell structure comprising at least two p-n junctions, wherein each of said at least two p-n junctions have substantially different band gaps, and electrical connector means by which said at least two p-n junctions may be collectively energized; and wherein said diode comprises a tunnel junction or interconnect.