Including Active Semiconductor Component Sensitive To Infrared Radiation, Light, Or Electromagnetic Radiation Of A Shorter Wavelength (epo) Patents (Class 257/E27.122)
-
Patent number: 8316745Abstract: Techniques are here disclosed for a solar cell pre-processing method and system for annealing and gettering a solar cell semiconductor wafer having an undesirably high dispersion of transition metals, impurities and other defects. The process forms a surface contaminant layer on the solar cell semiconductor (e.g., silicon) wafer. A surface of the semiconductor wafer receives and holds impurities, as does the surface contaminant layer. The lower-quality semiconductor wafer includes dispersed defects that in an annealing process getter from the semiconductor bulk to form impurity cluster toward the surface contaminant layer. The impurity clusters form within the surface contaminant layer while increasing the purity level in wafer regions from which the dispersed defects gettered. Cooling follows annealing for retaining the impurity clusters and, thereby, maintaining the increased purity level of the semiconductor wafer in regions from which the impurities gettered.Type: GrantFiled: August 26, 2011Date of Patent: November 27, 2012Assignee: Calisolar Inc.Inventors: Fritz G. Kirscht, Kamel Ounadjela, Jean Patrice Rakotoniaina, Dieter Linke
-
Publication number: 20120280349Abstract: The present invention relates to a photovoltaic module structure 1 and to a method for establishing an electrically conductive connection between two spaced contact layers 4?, 6?, in particular in the photovoltaic module structure 1 according to the invention. The production method is particularly simple and economical and the photovoltaic module structure 1 according to the invention enables a significant gain in efficiency.Type: ApplicationFiled: November 10, 2010Publication date: November 8, 2012Inventors: Frank Becker, Michael Bauer, Jochen Frenck, Robert Fischer
-
Publication number: 20120273815Abstract: The present invention related to a lift-off structure adapted to a substrate having a photoelectric device, the structure comprising: a buffer layer, forming on the substrate; an upper sacrificial layer, forming on the buffer layer; an etch stop layer, forming on the upper sacrificial layer, and the photoelectric device structure forming on the etch stop layer.Type: ApplicationFiled: October 14, 2011Publication date: November 1, 2012Applicant: Institute of Nuclear Energy Research Atomic Energy Council, Executive YuanInventors: YU-LI TSAI, Chih-Hung Wu, Jei-Li Ho, Chao-Huei Huang, Min-De Yang
-
Publication number: 20120273888Abstract: A semiconductor device along with circuits including the same and methods of operating the same are described. The device includes an electrically floating body region, and a gate is disposed over a first portion of the body region. The device includes a source region adjoining a second portion of the body region, the second portion adjacent the first portion and separating the source region from the first portion. The device includes a drain region adjoining a third portion of the body region, the third portion adjacent the first portion and separating the drain region from the first portion.Type: ApplicationFiled: July 12, 2012Publication date: November 1, 2012Applicant: MICRON TECHNOLOGY, INC.Inventor: Serguei OKHONIN
-
Patent number: 8283743Abstract: A photodiode includes a silicon semiconductor layer; a P-type high concentration diffusion layer with a P-type impurity diffused therein at a high concentration; an N-type high concentration diffusion layer with an N-type impurity diffused therein at a high concentration; and a low concentration diffusion layer with one of the P-type impurity and the N-type impurity diffused therein at a low concentration. The P-type high concentration diffusion layer and the N-type high concentration diffusion layer are formed in the silicon semiconductor layer, and are arranged to face each other with the low concentration diffusion layer in between. The photodiode further includes an interlayer insulation film formed on the silicon semiconductor layer, so that a covalent bond between silicon and hydrogen is formed in an atom row of the low concentration layer adjacent to an interface thereof with respect to the interlayer insulation film.Type: GrantFiled: January 9, 2009Date of Patent: October 9, 2012Assignee: Oki Semiconductor Co., Ltd.Inventor: Takashi Izumi
-
Patent number: 8253174Abstract: A thin film transistor (TFT) structure is implemented. This embodiment is much less sensitive than conventional TFTs to alignment errors and substrate distortion. In such a configuration, there is no need to define gate features, so the layout is simplified. Moreover, the gate layer may be patterned by several inexpensive printing or non-printing methods.Type: GrantFiled: November 26, 2008Date of Patent: August 28, 2012Assignee: Palo Alto Research Center IncorporatedInventors: Jurgen H. Daniel, Ana Claudia Arias
-
Publication number: 20120205731Abstract: A CMOS single photon avalanche diode (SPAD) design uses conventional, or at least known, CMOS processes to produce a device having a breakdown region in which the main p-n junction is formed of a deep n-well layer, and optionally on the other side, a p-add layer. The SPAD may also have a guard ring region which comprises the p-epi layer without any implant. The SPAD may have curved or circular perimeters. A CMOS chip comprises SPADs as described and other NMOS devices all sharing the same deep n-well.Type: ApplicationFiled: April 24, 2012Publication date: August 16, 2012Applicant: STMicroelectronics (Research & Development) LimitedInventors: Robert K. Henderson, Justin Richardson
-
Patent number: 8232621Abstract: When letters are written with a ballpoint pen, pen pressure is greater than or equal to 10 MPa. The IC tag embedded in the paper base material is required to withstand such pen pressure. An integrated circuit including a functional circuit which transmits and receive, performs arithmetic of, and stores information is thinned, and also, when the integrated circuit and a structural body provided with an antenna or a wiring are attached, a second structural body formed of ceramics or the like is also attached to at the same time. When the second structural body formed of ceramics or the like is used, resistance to pressing pressure or bending stress applied externally can be realized. Further, a part of passive elements included in the integrated circuit can be transferred to the second structural body, which leads to reduction in area of the semiconductor device.Type: GrantFiled: July 24, 2007Date of Patent: July 31, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yasuyuki Arai
-
Patent number: 8222709Abstract: A solid-state imaging device includes a pixel array area in which an unit pixel including a photoelectric conversion element converting optical signals to signal charges and a transfer gate transferring the signal charges which have been photoelectrically converted in the photoelectric conversion element is two-dimensionally arranged in a matrix form, a supply voltage control means for supplying plural first control voltages sequentially to a control electrode of the transfer gate, and a driving means for performing driving of reading out signal charges transferred by the transfer gate when the plural first control voltages are sequentially applied twice and more.Type: GrantFiled: October 23, 2006Date of Patent: July 17, 2012Assignee: Sony CorporationInventors: Yusuke Oike, Atsushi Toda
-
Publication number: 20120176609Abstract: This document describes a wireless sensor comprising a MEMS resonator and an antenna directly matched thereto. Also a method of reading the wireless sensor is described. The method comprises illuminating the wireless sensor with electromagnetic energy at a first and second frequencies and receiving an intermodulation signal emitted by the wireless sensor in response to said electromagnetic energy at the first and second frequencies.Type: ApplicationFiled: September 10, 2010Publication date: July 12, 2012Applicant: TEKNOLOGIAN TUTKIMUSKESKUS VTTInventors: Heikki Seppä, Ville Viikari
-
Publication number: 20120168882Abstract: A integrated circuit die includes a chemical sensor, a thermal sensor, and a humidity sensor formed therein. The chemical sensor, thermal sensor, and humidity sensor include electrodes formed in a passivation layer of the integrated circuit die. The integrated circuit die further includes transistors formed in a monocrystalline semiconductor layer.Type: ApplicationFiled: October 31, 2011Publication date: July 5, 2012Applicant: STMICROELECTRONICS PTE LTD.Inventors: Suman Cherian, Olivier Le Neel
-
Publication number: 20120153416Abstract: An object is to provide a photoelectric conversion element with high conversion efficiency. In a photoelectric conversion element with a fine periodic structure on a light-receiving surface side, focus is given to the traveling direction of light that is reflected off another surface. The photoelectric conversion element may be given a structure in which a textured structure that reflects light to the other surface is provided, and light that travels from the light-receiving surface side to the other surface side is reflected so that a component that travels along the photoelectric conversion layer increases. By the distance traveled by the reflected light inside the photoelectric conversion layer increasing, the light that enters the photoelectric conversion element is more easily absorbed by the photoelectric conversion layer and less easily released from the light-receiving surface side, and a photoelectric conversion element with high conversion efficiency can be provided.Type: ApplicationFiled: December 13, 2011Publication date: June 21, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Koichiro Tanaka, Fumito Isaka, Jiro Nishida
-
Publication number: 20120153407Abstract: A light-assisted biochemical sensor based on a light addressable potentiometric sensor is disclosed. The light-assisted biochemical sensor comprises a semiconductor substrate and a sensing layer, which are used to detect the specific ion concentration or the biological substance concentration of a detected solution. Lighting elements fabricated directly on the back surface of the semiconductor substrate directly illuminate the light to the semiconductor substrate, so as to enhance the photoconduction property of the semiconductor substrate. And then, the hysteresis and the sensing sensitivity of the light-assisted biochemical sensor are respectively reduced and improved. In addition, due to its characteristics of integration, the light-assisted biochemical sensor not only reduces the fabrication cost but also has portable properties and real-time detectable properties. As a result, its detection range and the application range are wider.Type: ApplicationFiled: December 16, 2010Publication date: June 21, 2012Inventors: Liann-Be CHANG, Chao-Sung Lai, Po-Chuan Chen
-
Patent number: 8076225Abstract: A method for manufacturing a solid-state image capturing device according to the present invention, in which from a plurality of light receiving sections for photoelectrically converting incident light into signal electric charge, the signal electric charge is read to an electric charge detection section through transfer sections located under respective reading gate electrodes, each electric charge detection being shared by each of the plurality of light receiving sections, the method including: transfer section impurity region forming step of performing an ion implantation process from an ion implantation direction wherein the location of an edge surface of an impurity region of the transfer section and the location of an edge surface of the reading gate electrode corresponding to the impurity region match each other at each reading gate electrode.Type: GrantFiled: November 7, 2006Date of Patent: December 13, 2011Assignee: Sharp Kabushiki KaishaInventor: Yoshimitsu Nakashima
-
Patent number: 8076702Abstract: A CMOS image sensor and fabricating method thereof by which capacitance of a floating diffusion region (FD) can be increased.Type: GrantFiled: December 21, 2007Date of Patent: December 13, 2011Assignee: Dongbu HiTek Co., Ltd.Inventor: Keun-Hyuk Lim
-
Patent number: 8049287Abstract: A substrate-level assembly having a device substrate of semiconductor material with a top face and housing a first integrated device, including a buried cavity formed within the device substrate, and with a membrane suspended over the buried cavity in the proximity of the top face. A capping substrate is coupled to the device substrate above the top face so as to cover the first integrated device in such a manner that a first empty space is provided above the membrane. Electrical-contact elements electrically connect the integrated device with the outside of the substrate-level assembly. In one embodiment, the device substrate integrates at least a further integrated device provided with a respective membrane, and a further empty space, fluidly isolated from the first empty space, is provided over the respective membrane of the further integrated device.Type: GrantFiled: April 14, 2008Date of Patent: November 1, 2011Assignee: STMicroelectronics S.r.l.Inventors: Chantal Combi, Benedetto Vigna, Federico Giovanni Ziglioli, Lorenzo Baldo, Manuela Magugliani, Ernesto Lasalandra, Caterina Riva
-
Patent number: 8044478Abstract: Provided is an image sensor. The image sensor can include a readout circuitry on a first substrate. An interlayer dielectric is formed on the first substrate, and comprises a lower line therein. A crystalline semiconductor layer is bonded to the interlayer dielectric. A photodiode can be formed in the crystalline semiconductor layer, and comprises a first impurity region and a second impurity region. A via hole can be formed passing through the crystalline semiconductor layer and the interlayer dielectric to expose the lower line. A plug is formed inside the first via hole to connect with only the lower line and the first impurity region. A device isolation region can be formed in the crystalline semiconductor layer to separate the photodiode according to unit pixel.Type: GrantFiled: September 5, 2008Date of Patent: October 25, 2011Assignee: Dongbu Hitek Co., Ltd.Inventor: Joon Hwang
-
Patent number: 8044476Abstract: A radiation detector comprising a II-VI compound semiconductor substrate that absorbs radiation having a first energy, a II-VI compound semiconductor layer of a first conductivity type provided on a main surface of the II-VI compound semiconductor substrate, a metal layer containing at least one of a group III element and a group V element provided on the II-VI compound semiconductor layer, a IV semiconductor layer having a second conductivity type opposite to the first conductivity type provided on the metal layer, and a IV semiconductor substrate that absorbs radiation having a second energy different from the first energy provided on the IV semiconductor layer.Type: GrantFiled: June 16, 2006Date of Patent: October 25, 2011Assignee: National University Corporation Shizuoka UniversityInventors: Yoshinori Hatanaka, Toru Aoki
-
Publication number: 20110233702Abstract: A semiconductor device including a first material layer adjacent to a second material layer, a first via passing through the first material layer and extending into the second material layer, and a second via extending into the first material layer, where along a common cross section parallel to an interface between the two material layers, the first via has a cross section larger than that of the second via.Type: ApplicationFiled: March 17, 2011Publication date: September 29, 2011Applicant: Sony CorporationInventors: Hiroshi Takahashi, Shunichi Sukegawa, Keishi Inoue
-
Publication number: 20110212567Abstract: A method of fabricating an image sensor device is provided. First, a substrate comprising a pixel array region and a pad region is provided. A patterned metal layer and a first planarization layer having an opening exposing the patterned metal layer in the pad region are sequentially formed on the substrate. A color filter array is formed on the first planarization layer in the pixel array region. A second planarization layer is formed to cover the color filter array and filled into the opening. A plurality of microlens is formed above the color filter array on the second planarization layer. A capping layer is conformally formed on the microlens and the second planarization layer. An etching step is performed to remove the capping layer and the second planarization layer in the opening so as to expose the patterned metal layer in the pad region.Type: ApplicationFiled: February 26, 2010Publication date: September 1, 2011Inventors: Hsin-Ting TSAI, Cheng-Hung Yu, Chin-Kuang Liu, Kun-Yen Hsu
-
Patent number: 7998776Abstract: A method for manufacturing a MEMS sensor and a thin film thereof includes steps of etching a top surface of a single-crystal silicon wafer in combination of a deposition process, an isotropic DRIE process, a wet etching process and a back etching process in order to form a pressure-sensitive single-crystal silicon film, a cantilever beam, a mass block, a front chamber, a back chamber and trenches connecting the front and the back chambers. The single-crystal silicon film is prevented from etching so that the thickness thereof can be well controlled. The method of the present invention can be used to replace the traditional method which forms the back chamber and the pressure-sensitive single-crystal silicon film from the bottom surface of the silicon wafer.Type: GrantFiled: October 23, 2010Date of Patent: August 16, 2011Assignee: Memsensing Microsystems Technology Co., Ltd.Inventors: Gang Li, Wei Hu
-
Publication number: 20110194000Abstract: A photoelectric conversion element includes a pair of electrodes, a photoelectric conversion layer, a charge blocking layer, an intermediate layer. The photoelectric conversion layer contains an organic material between the electrodes. The charge blocking layer is disposed between the photoelectric conversion layer and one of the electrodes. The intermediate layer includes an organic compound disposed between the photoelectric conversion layer and the charge blocking layer and having a glass transition temperature of 200° C. or higher.Type: ApplicationFiled: February 8, 2011Publication date: August 11, 2011Applicant: FUJIFILM CORPORATIONInventors: Hideyuki SUZUKI, Tetsuro MITSUI
-
Patent number: 7995893Abstract: A magneto-optical structure is provided. The magneto-optical structure includes a substrate. A waveguide layer is formed on the substrate for guiding electromagnetic radiation received by the magneto-optical structure. The waveguide layer includes magnetic oxide material that comprises ABO3 perovskite doped with transition metal ions on the B site, or transition metal ions doped SnO2, or transition metal ions doped CeO2.Type: GrantFiled: October 31, 2008Date of Patent: August 9, 2011Assignee: Massachusetts Institute of TechnologyInventors: Lei Bi, Gerald F. Dionne, Hyun Suk Kim, Caroline A. Ross
-
Patent number: 7989253Abstract: A method of forming a mask for lithography includes the step of forming the mask by using reverse data in which positions of at least part of output terminals are reversed, when forming the mask for lithography used for manufacturing a back-illuminated solid-state imaging device which takes incident light from the side of a surface opposite to the side of a surface on which wiring of a device region in which photoelectric conversion elements are formed is formed.Type: GrantFiled: March 2, 2009Date of Patent: August 2, 2011Assignee: Sony CorporationInventor: Keiji Mabuchi
-
Publication number: 20110180889Abstract: An X-ray detector includes a substrate; a gate line that is extended in a first direction on the substrate; a gate electrode that is extended from the gate line; a semiconductor layer that is positioned on the gate electrode; a source electrode and drain electrode that are positioned on the semiconductor layer; a lower electrode that is extended from the drain electrode; a photodiode that is positioned on the lower electrode; a first insulation layer that is positioned on the source electrode and the drain electrode and that includes a first opening that exposes the source electrode; and a data line that is extended in a second direction intersecting a first direction on the first insulation layer to intersect the gate line with the first insulation layer interposed between the data line and the gate line, and the data line being electrically connected to the source electrode through the first opening.Type: ApplicationFiled: December 22, 2010Publication date: July 28, 2011Applicant: SAMSUNG MOBILE DISPLAY CO., LTD.Inventors: Kwan-Wook JUNG, Dong-Hyuk KIM, Woo-Jae LIM, Jea-Eun RYU
-
Patent number: 7986021Abstract: The invention provides a semiconductor device that solves a problem of reflection of a pattern of a wiring formed on a back surface of a semiconductor substrate on an output image. A reflection layer is formed between a light receiving element and a wiring layer, that reflects an infrared ray toward a light receiving element the without transmitting it to the wiring layer, the infrared ray entering from a light transparent substrate toward the wiring layer through a semiconductor substrate. The reflection layer is formed at least in a region under the light receiving element uniformly or only under the light receiving element. Alternatively, an anti-reflection layer having a function of absorbing the entering infrared ray to prevent transmission thereof may be formed instead of the reflection layer.Type: GrantFiled: December 15, 2006Date of Patent: July 26, 2011Assignees: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.Inventors: Kazuo Okada, Katsuhiko Kitagawa, Takashi Noma, Shigeki Otsuka, Hiroshi Yamada, Shinzo Ishibe, Yuichi Morita, Noboru Okubo, Hiroyuki Shinogi, Mitsuru Okigawa
-
Publication number: 20110163364Abstract: Image sensor, fabricating method thereof, and device comprising the image sensor are provided, which comprises a substrate in which a photoelectric transformation device is formed, an interconnection structure formed on the substrate and including multiple intermetal dielectric layers and multiple metal interconnections placed in the multiple intermetal dielectric layers, the interconnection structure defining a cavity aligned corresponding to the photoelectric transformation device, a moisture absorption barrier layer conformally formed on a top of the interconnection structure and in the cavity; and a light guide unit formed on the moisture absorption barrier layer and including light transmittance material filling the cavity, wherein the moisture absorption barrier layer is formed with a uniform thickness on both sides and a bottom of the cavity and on a top surface of the multiple intermetal dielectric layer.Type: ApplicationFiled: December 23, 2010Publication date: July 7, 2011Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hong-Ki Kim, Ho-Kyu Kang, June-Taeg Lee, Jae-Hee Choi
-
Patent number: 7968912Abstract: A semiconductor device includes a substrate, a gate formed over the substrate, a gate spacer provided against first and second sidewalls of the gate, and a source/drain region formed in the substrate proximate to the gate spacer. The source/drain region includes first and second epitaxial layers including Ge, wherein the second epitaxial layer which is formed over an interfacial layer between the first epitaxial layer and the substrate has a higher germanium concentration than that of the first epitaxial layer.Type: GrantFiled: March 29, 2010Date of Patent: June 28, 2011Assignee: Hynix Semiconductor Inc.Inventors: Yong-Soo Kim, Hong-Seon Yang, Seung-Ho Pyi, Tae-Hang Ahn
-
Publication number: 20110141869Abstract: An optical pickup, photodetector, and optical drive adopting the optical pickup are provided. The optical pickup may include a light emitting system having a plurality of light sources corresponding to a plurality of mediums a light receiving system including a photodetector for converting light reflected from a medium into an electrical signal. The photodetector may include first and second light receiving sensors corresponding to the plurality of mediums, each of the first and second light receiving sensors comprising a plurality of regions, each region comprising a plurality of sectors. The plurality of regions of the first and second light receiving sensors may include shared sectors that are shared by the first and second light receiving sensors and exclusive sectors that are exclusively used in the first light receiving sensor or the second light receiving sensor.Type: ApplicationFiled: December 9, 2010Publication date: June 16, 2011Applicant: Toshiba Samsung Storage Technology Korea CorporationInventors: Ui-yol KIM, Yong-jae Lee, Pyong-yong Seong, Hong-kuk Kim
-
Patent number: 7952158Abstract: An elevated photosensor for image sensors and methods of forming the photosensor. The photosensor may have light sensors having indentation features including, but not limited to, v-shaped, u-shaped, or other shaped features. Light sensors having such an indentation feature can redirect incident light that is not absorbed by one portion of the photosensor to another portion of the photosensor for additional absorption. In addition, the elevated photosensors reduce the size of the pixel cells while reducing leakage, image lag, and barrier problems.Type: GrantFiled: January 24, 2007Date of Patent: May 31, 2011Assignee: Micron Technology, Inc.Inventor: Salman Akram
-
Patent number: 7943937Abstract: An array substrate for a liquid crystal display device includes: a gate line and a first storage electrode on a substrate; a gate insulating layer on the gate line and the first storage electrode; a data line over the gate insulating layer, the data line crossing the gate line to define a pixel region; a passivation layer on the data line, wherein a first thickness of the passivation layer and the gate insulating layer over the first storage electrode is thinner than a second thickness of the passivation layer and the gate insulating layer over the gate line; and a pixel electrode and a second storage electrode on the passivation layer, the second storage electrode extended from the pixel electrode and overlapped with the first storage electrode.Type: GrantFiled: June 12, 2006Date of Patent: May 17, 2011Assignee: LG Display Co., Ltd.Inventor: Jin-Hyung Jung
-
Publication number: 20110101420Abstract: A CMOS pixel circuit and timing for use in digital photography where the photodiode has increased full well. The circuit includes the photodiode, a reset transistor, a first transfer gate to move a charge from the photodiode to a floating diffusion node, a source follower transistor, a row select transistor, a second transfer gate located between the photodiode and the first transfer, and a capacitor located between the first and second transfer gates.Type: ApplicationFiled: October 31, 2009Publication date: May 5, 2011Inventor: Pratik Patel
-
Publication number: 20110102657Abstract: A semiconductor device having a first semiconductor section including a first wiring layer at one side thereof; a second semiconductor section including a second wiring layer at one side thereof, the first and second semiconductor sections being secured together with the respective first and second wiring layer sides of the first and second semiconductor sections facing each other; a conductive material extending through the first semiconductor section to the second wiring layer of the second semiconductor section and by means of which the first and second wiring layers are in electrical communication; and an opening, other than the opening for the conductive material, which extends through the first semiconductor section to the second wiring layer.Type: ApplicationFiled: October 22, 2010Publication date: May 5, 2011Applicant: SONY CORPORATIONInventors: Hiroshi Takahashi, Taku Umebayashi
-
Publication number: 20110095387Abstract: Photosensitive semiconductor devices and associated methods are provided. In one aspect, for example, a photosensitive semiconductor device can include an electromagnetic radiation absorption layer having a thickness of less than or equal to about 200 ?m, wherein the electromagnetic radiation absorption layer includes a semiconductor material and an enhanced absorption region. The electromagnetic radiation absorption layer is operable to absorb greater than or equal to about 40% of incident electromagnetic radiation having at least one wavelength greater than or equal to about 1064 nm.Type: ApplicationFiled: October 22, 2010Publication date: April 28, 2011Inventors: James Carey, Jason Sickler
-
Publication number: 20110089519Abstract: The invention discloses a chip lead frame and a photoelectric energy transducing module. The chip lead frame includes an insulator and a plurality of conductors. The insulator includes a first surface, a second surface, a first recess structure formed on the first surface, a through hole passing through the second surface and the first recess structure, and a venting structure. The first recess structure forms an accommodating space. The venting structure communicates with the accommodating space so that when a substrate is being bound to the first recess structure, the air in the accommodating space pressed by the substrate could flow through the venting structure out of the insulator without remaining between the substrate and the first recess structure. A photoelectric energy transducing semiconductor structure could be disposed on the substrate and electrically connected to the conductors, so as to form the photoelectric energy transducing module of the invention.Type: ApplicationFiled: October 6, 2010Publication date: April 21, 2011Applicant: NEOBULB TECHNOLOGIES, INC.Inventors: Jen-Shyan Chen, Chun-Jen Lin, Yun-Lin Peng, Wei-Yeh Wen
-
Publication number: 20110079866Abstract: A method for manufacturing a solid-state image pickup device is provided. In this method, a pixel isolation member is formed in a semiconductor substrate including pixels, and the thickness of the substrate is reduced by CMP. For forming the pixel isolation member, a first pixel isolation member is formed by implanting impurity ions in a region of the substrate so that the pixels are disposed between portions of the region when viewed from a surface of the substrate. A second isolation member is also formed by forming a trench in a region of the substrate different from the first pixel isolation member so that the pixels are disposed between portions of the region, and then filling the trench with an electroconductive material harder to polish by CMP than the substrate. The CMP is performed on the rear side of the substrate using the second pixel isolation member as a stopper.Type: ApplicationFiled: September 28, 2010Publication date: April 7, 2011Applicant: SONY CORPORATIONInventors: Kenichi Nishizawa, Hiroshi Takahashi
-
Publication number: 20110079824Abstract: A 4-Terminal JFET includes a substrate having a first conduction type and an upper layer having a second, opposite, conduction type over the substrate. A gate and a source are embedded in the upper layer. A gate pad is electrically connected to the gate. A region, which has a first conduction type, is formed in the upper layer and separates the upper layer into two sections. This region reduces the overall capacitance between the gate pad and the source. Reduced overall gate to source capacitance can result in reduced noise amplification in the JFET.Type: ApplicationFiled: October 7, 2009Publication date: April 7, 2011Inventors: Derek Hullinger, Keith Decker
-
Publication number: 20110079709Abstract: A sensor and method of sensing is disclosed. The sensor is designed with a number of layers that are each able to sense a range of electromagnetic radiation. The sensor has two terminals for measuring the output signal of the sensor. The output signal of the sensor can be separated to identify the contributions to the output signal from each layer in order to determine the layer(s) that detected electromagnetic radiation. An array of sensors may be fabricated to increase the number of samples taken.Type: ApplicationFiled: October 7, 2009Publication date: April 7, 2011Inventor: Kristy A. Campbell
-
Publication number: 20110062334Abstract: A novel pixel circuit and multi-dimensional array for receiving and detecting black body radiation in the SWIR, MWIR or LWIR frequency bands. An electromagnetic thermal sensor and imaging system is provided based on the treatment of thermal radiation as an electromagnetic wave. The thermal sensor and imager functions essentially as an electromagnetic power sensor/receiver, operating in the SWIR (200-375 THz), MWIR (60-100 THz), or LWIR (21-38 THz) frequency bands. The thermal pixel circuit of the invention is used to construct thermal imaging arrays, such as 1D, 2D and stereoscopic arrays. Various pixel circuit embodiments are provided including balanced and unbalanced, biased and unbiased and current and voltage sensing topologies. The pixel circuit and corresponding imaging arrays are constructed on a monolithic semiconductor substrate using in a stacked topology. A metal-insulator-metal (MIM) structure provides rectification of the received signal at high terahertz frequencies.Type: ApplicationFiled: September 13, 2010Publication date: March 17, 2011Inventor: David Ben-Bassat
-
Publication number: 20110036971Abstract: A photovoltaic device includes a heterojunction between different semiconductor materials which are present in charge transporting layers. The device can include laterally-arranged electrodes.Type: ApplicationFiled: January 9, 2009Publication date: February 17, 2011Applicant: Massachusetts Institute of TechnologyInventors: John Ho, Vladimir Bulovic, Tim Osedach
-
Publication number: 20110024864Abstract: A semiconductor device includes a through electrode penetrating a semiconductor substrate, a conductor pad formed on the through electrode and made of a conductor electrically connected to the through electrode, and an interconnection layer formed on a surface of the semiconductor substrate and electrically connected to the conductor pad.Type: ApplicationFiled: August 10, 2010Publication date: February 3, 2011Applicant: PANASONIC CORPORATIONInventors: Noboru KOKUSENYA, Toshihiro KURIYAMA
-
Patent number: 7868402Abstract: A package of microelectromechanical system (MEMS) microphone is suitable for being mounted on a printed circuit board. The package has a cover and at least one MEMS microphone. The cover has an inner surface and a conductive trace disposed thereon. The MEMS microphone is mounted on the inner surface of the cover and electrically connected to the conductive trace, and has an acoustic pressure receiving surface. When the cover is mounted on the printed circuit board, the cover and the printed circuit board construct an acoustic housing which has at least one acoustic hole passing through the cover or the printed circuit board, and the conductive trace on the inner surface of the cover is electrically connected to the printed circuit board.Type: GrantFiled: October 11, 2007Date of Patent: January 11, 2011Assignee: Industrial Technology Research InstituteInventors: Chao-Ta Huang, Hsin-Tang Chien
-
Tandem solar cell including an amorphous silicon carbide layer and a multi-crystalline silicon layer
Patent number: 7851249Abstract: A method for making a tandem solar cell includes the steps of providing a ceramic substrate, providing a titanium-based layer on the ceramic substrate, providing an n+-p?-p+ laminate on the titanium-based layer, passivating the n+-p?-p+ laminate, providing an n-i-p laminate on the n+-p?-p+ laminate, providing a p-type ohmic contact, providing an n-type ohmic contact providing an anti-reflection layer of SiCN/SiO2 on the n-i-p laminate.Type: GrantFiled: October 31, 2007Date of Patent: December 14, 2010Assignee: Atomic Energy Council - Institute of Nuclear Energy ResearchInventors: Tsun-Neng Yang, Shan-Ming Lan, Chin-Chen Chiang, Wei-Yang Ma, Chien-Te Ku, Yu-Hsiang Huang -
Patent number: 7842985Abstract: Disclosed is a CMOS image sensor including a gate electrode of a finger type transfer transistor for controlling the saturation state of a floating diffusion region according to the luminance level (i.e. low luminance or high luminance). The CMOS image sensor includes first and second photodiode regions for generating electrons in response to incident light, and a transfer transistor positioned between the first and second photodiodes for receiving the generated electrons transferred from the first and/or second photodiode.Type: GrantFiled: December 18, 2006Date of Patent: November 30, 2010Assignee: Dongbu Hitek Co., Ltd.Inventor: Keun Hyuk Lim
-
Patent number: 7842922Abstract: A thermopile infrared sensor array, comprises a sensor chip with a number of thermopile sensor elements, made from a semiconductor substrate and corresponding electronic components. The sensor chip is mounted on a support circuit board and enclosed by a cap in which a lens is arranged. The aim is the production of a monolithic infrared sensor array with a high thermal resolution capacity with a small chip size and which may be economically produced. The aim is achieved by arranging a thin membrane made from non-conducting material on the semiconductor substrate of the sensor chip on which the thermopile sensor elements are located in an array. Under each thermopile sensor element, the back side of the membrane is uncovered in a honeycomb pattern by etching and the electronic components are arranged in the boundary region of the sensor chip. An individual pre-amplifier with a subsequent low-pass filter may be provided for each column and each row of sensor elements.Type: GrantFiled: May 16, 2006Date of Patent: November 30, 2010Assignee: Heimann Sensor GmbHInventors: Wilhelm Leneke, Marion Simon, Mischa Schulze, Karlheinz Storck, Joerg Schieferdecker
-
Patent number: 7829915Abstract: The present invention changes layer polarities of an epitaxy structure of an avalanche photodiode into n-i-n-i-p. A transport layer is deposed above an absorption layer to prevent absorbing photon and producing electrons and holes. A major part of electric field is concentrated on a multiplication layer for producing avalanche and a minor part of the electric field is left on the absorption layer for transferring carrier without avalanche. Thus, bandwidth limit from a conflict between RC bandwidth and carrier transferring time is relieved. Meanwhile, active area is enlarged and alignment error is improved without sacrificing component velocity too much.Type: GrantFiled: August 7, 2008Date of Patent: November 9, 2010Assignee: National Central UniversityInventors: Jin-Wei Shi, Yen-Hsiang Wu
-
Publication number: 20100276772Abstract: Provided are a photoelectric conversion device (10) having a first conductivity type semiconductor (1), a first main surface (1a) of the first conductivity type semiconductor (1) being provided with a concave portion (26, 27) formed therein, the photoelectric conversion device (10) including: a second conductivity type semiconductor (3) formed in the first main surface (1a) of the first conductivity type semiconductor (1), an inner wall surface of a through-hole (19), and a second main surface (1a) of the first conductivity type semiconductor (1); a light-receiving surface electrode (5a, 5c) formed to fill the concave portion (26, 27) in the first main surface (1a) of the first conductivity type semiconductor (1); a first electrode (2) formed on the second main surface (1c) of the first conductivity type semiconductor (1); a through-hole electrode portion (9) formed inside the through-hole (19) to be in contact with the second conductivity type semiconductor (3) in the inner wall surface of the through-hole (Type: ApplicationFiled: November 27, 2008Publication date: November 4, 2010Inventors: Ryo Ozaki, Akiko Tsunemi, Tsutomu Yamazaki, Satoshi Okamoto
-
Publication number: 20100244056Abstract: The present invention provides an addressable or static electronic apparatus, such as a light emitting display or a power generating apparatus. An exemplary apparatus comprises a substrate having a plurality of cavities; a plurality of first conductors coupled to the substrate and at least partially within the cavities, with the plurality of first conductors having a first and substantially parallel orientation; a plurality of light emitting diodes, photovoltaic diodes or other electronic components coupled to the plurality of first conductors and having a second orientation substantially normal to the first orientation; and a plurality of substantially optically transmissive second conductors coupled to the plurality of diodes and having a third orientation substantially normal to the second orientation and substantially perpendicular to the first orientation.Type: ApplicationFiled: May 30, 2008Publication date: September 30, 2010Applicant: NTHDEGREE TECHNOLOGIES WORLDWIDE INC.Inventors: William Johnstone Ray, Mark D. Lowenthal, Neil O. Shotton, David R. Bowden
-
Patent number: 7791153Abstract: It is an object of the present invention to provide a method for manufacturing a semiconductor device, which is flexible and superiority in physical strength. As a method for manufacturing a semiconductor device, an element layer including a plurality of integrated circuits is formed over one surface of a substrate; a hole having curvature is formed in part of one surface side of the substrate; the substrate is thinned (for example, the other surface of the substrate is ground and polished); and the substrate is cut off so that a cross section of the substrate has curvature corresponding to a portion where the hole is formed; whereby a laminated body including an integrated circuit is formed. Further, a thickness of the substrate, which is polished, is 2 ?m or more and 50 ?m or less.Type: GrantFiled: February 17, 2009Date of Patent: September 7, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Takuya Tsurume, Naoto Kusumoto
-
Publication number: 20100127271Abstract: A thin film transistor (TFT) structure is implemented. This embodiment is much less sensitive than conventional TFTs to alignment errors and substrate distortion. In such a configuration, there is no need to define gate features, so the layout is simplified. Moreover, the gate layer may be patterned by several inexpensive printing or non-printing methods.Type: ApplicationFiled: November 26, 2008Publication date: May 27, 2010Applicant: PALO ALTO RESEARCH CENTER INCORPORATEDInventors: Jurgen H. Daniel, Ana Claudia Arias