Abstract: Embodiments of a pixel including a substrate having a front surface and a photosensitive region formed in or near the front surface of the substrate. An isolation trench is formed in the front surface of the substrate adjacent to the photosensitive region. The isolation trench includes a trench having a bottom and sidewalls, a passivation layer formed on the bottom and the sidewalls, and a filler to fill the portion of the trench not filled by the passivation layer.

Abstract: A solid state imaging device includes: a substrate; a photoelectric conversion unit that is formed on the substrate to generate and accumulate signal charges according to light quantity of incident light; a vertical transmission gate electrode that is formed to be embedded in a groove portion formed in a depth direction from one side face of the substrate according to a depth of the photoelectric conversion unit; and an overflow path that is formed on a bottom portion of the transmission gate to overflow the signal charges accumulated in the photoelectric conversion unit.

Abstract: Methods of forming isolation structures are disclosed. A method of forming isolation structures for an image sensor array of one aspect may include forming a dielectric layer over a semiconductor substrate. Narrow, tall dielectric isolation structures may be formed from the dielectric layer. The narrow, tall dielectric isolation structures may have a width that is no more than 0.3 micrometers and a height that is at least 1.5 micrometers. A semiconductor material may be epitaxially grown around the narrow, tall dielectric isolation structures. Other methods and apparatus are also disclosed.

Abstract: Disclosed herein is a method of manufacturing a bonded substrate, including the steps of: forming a first bonding layer on a surface on one side of a semiconductor substrate; forming a second bonding layer on a surface on one side of a support substrate; adhering the first bonding layer and the second bonding layer to each other; a heat treatment for bonding the first bonding layer and the second bonding layer to each other; and thinning the semiconductor substrate from a surface on the other side of the semiconductor substrate to form a semiconductor layer.

Abstract: A photovoltaic device including a semiconductor substrate having a first surface and a second surface, the second surface being opposite to the first surface; a first passivation layer on the first surface; and a second passivation layer on the second surface, wherein each of the first passivation layer and the second passivation layer comprises an aluminum-based compound, is disclosed. A method of preparing a photovoltaic device, the method including: forming a semiconductor substrate to have a first surface and a second surface, the second surface being opposite to the first surface; forming an emitter region and a back surface field (BSF) region at the second surface; and forming a first passivation layer on the first surface and a second passivation layer on the second surface, wherein the first passivation layer and the second passivation layer are formed concurrently, is also disclosed.

Abstract: A method includes forming top metal lines over a semiconductor substrate, wherein the semiconductor substrate is a portion of a wafer having a bevel. When the top metal lines are exposed, an etchant is supplied on the bevel, wherein regions of the wafer sprayed with the etchant has an inner defining line forming a first ring having a first diameter. A trimming step is performed to trim an edge portion of the wafer, wherein an edge of a remaining portion of the wafer has a second diameter substantially equal to or smaller than the first diameter.

Abstract: A method of manufacturing a solar cell comprising steps of: (a) preparing a semiconductor substrate; (b) forming a metal thin film by vapor deposition on the back side of the semiconductor substrate; (c) applying a thick film conductive paste on the front side of the semiconductor substrate; and (d) firing the metal thin film and the applied thick film conductive paste to form a thin film electrode and a thick film electrode respectively.

Abstract: The present disclosure provides a micro-electro-mechanical systems (MEMS) device and a method for fabricating such a device. In an embodiment, a MEMS device includes a substrate, a dielectric layer above the substrate, an etch stop layer above the dielectric layer, and two anchor plugs above the dielectric layer, the two anchor plugs each contacting the etch stop layer or a top metal layer disposed above the dielectric layer. The device further comprises a MEMS structure layer disposed above a cavity formed between the two anchor plugs and above the etch stop layer from release of a sacrificial layer.

Abstract: Disclosed is a method for removing individual layers of a layer stack. The layer stack includes a semiconductor layer disposed onto an optically dense electrically conductive layer which in turn is disposed upon an optically transparent layer. A laser at a first power level is projected through the optically transparent layer and onto the optically dense electrically conductive layer. The semiconductor layer is removed through heat evaporation imparted by the laser at the first power level without removing the optically dense electrically conductive layer. Optionally, the laser at a second power level, which is greater than the first power level, is projected onto the optically dense electrically conductive layer through the optically transparent layer. The optically dense electrically conductive layer is removed through heat evaporation imparted by the laser at the second power level without removing the optically transparent layer.

Abstract: A microelectronic unit includes a semiconductor element having a front surface to which a packaging layer is attached, and a rear surface remote from the front surface. The element includes a light detector including a plurality of light detector element arranged in an array disposed adjacent to the front surface and arranged to receive light through the rear surface. The semiconductor element also includes an electrically conductive contact at the front surface connected to the light detector. The conductive contact includes a thin region and a thicker region which is thicker than the thin region. A conductive interconnect extends through the packaging layer to the thin region of the conductive contact, and a portion of the conductive interconnect is exposed at a surface of the microelectronic unit.

Abstract: A method of forming a window cap wafer (WCW) structure for semiconductor devices includes machining a plurality of cavities into a front side of a first substrate; bonding the first substrate to a second substrate, at the front side of the first substrate; removing a back side of the first substrate so as to expose the plurality of cavities, thereby defining the WCW structure comprising the second substrate and a plurality of vertical supports comprised of material of the first substrate.

Abstract: A pixel structure, which may be used for infrared bolometers or other microelectromechanical systems (MEMS) devices, configured to increase immunity of the pixel to molecular heat transfer and reduce the vacuum requirements for a wafer level packaged device incorporating the pixel or an array thereof. In one example, the pixel has a perforated body or discontinuous surface structure.

Abstract: A backside illuminated image sensor comprises a photodiode and a first transistor located in a first substrate, wherein the first transistor is electrically coupled to the photodiode. The backside illuminated image sensor further comprises a plurality of logic circuits formed in a second substrate, wherein the second substrate is stacked on the first substrate and the logic circuit are coupled to the first transistor through a plurality of bonding pads.

Abstract: A photodiode structure having an illuminated front-side surface and a back-side surface includes a front-side doped layer having a first conductivity type, a back-side doped layer having the first conductivity type, a front-side active cell region made sensitive to light by the action of at least one plug region formed in the front-side doped layer having a second conductivity type, and a front-side inactive cell region substantially insensitive to light, wherein the first and second conductivity types are opposite conductivity types.

Abstract: A heterogeneous stack structure is provided which includes one or more optical signal-based chips and multiple electrical signal-based chips. The optical chip(s) and the electrical chip(s) are different layers of the stack structure, and the optical chip(s) includes optical signal paths extending at least partially laterally within the optical chip(s). Electrical signal paths are provided extending between and coupling the optical chip(s) and the electrical chips. The electrical signal paths include one or more through substrate vias (TSVs) through one or more electrical chips of the multiple electrical chips in the stack structure. In one embodiment, the optical chip(s) is configured laterally to locally distribute, via one or more paths of the electrical signal paths, a timing reference signal for one or more electrical chips in the stack. Conversion between optical and electrical signals within the stack structure occurs within the optical chip(s).

Abstract: A method of forming of an image sensor device includes a patterned hardmask layer is formed over a substrate. The patterned hard mask layer has a plurality of first openings in a periphery region, and a plurality of second openings in a pixel region. A first patterned mask layer is formed over the pixel region to expose the periphery region. A plurality of first trenches is etched into the substrate in the periphery region. Each first trench, each first opening and each second opening are filled with a dielectric material. A second patterned mask layer is formed over the periphery region to expose the pixel region. The dielectric material in each second opening over the pixel region is removed. A plurality of dopants is implanted through each second opening to form various doped isolation features in the pixel region.

Abstract: A method of forming an optical device includes generating a device precursor having a layer of a light-transmitting medium on a base. The method also includes forming an etch stop on the layer of light-transmitting medium. An active medium is grown on the etch stop and on the light-transmitting medium such that the light-transmitting medium is between the base and the grown active medium. The grown active medium is etched down to the etch stop so as to define a ridge in the active medium. The ridge of active medium defines a portion of a component waveguide that will guide a light signal through an active component on the device.

Abstract: A stressor layer used in a controlled spalling method is removed through the use of a cleave layer that can be fractured or dissolved. The cleave layer is formed between a host semiconductor substrate and the metal stressor layer. A controlled spalling process separates a relatively thin residual host substrate layer from the host substrate. Following attachment of a handle substrate to the residual substrate layer or other layers subsequently formed thereon, the cleave layer is dissolved or otherwise compromised to facilitate removal of the stressor layer. Such removal allows the fabrication of a bifacial solar cell.

Abstract: An image capturing system includes an optical component, a sensor below and connected to the optical component for capturing radiation, and a chip below the sensor for processing and/or storing and/or transmitting information captured by the sensor. The sensor and the Chip are directly connected to each other. The disclosure further relates to a production method for an image capturing system.

Abstract: A method of forming of an image sensor device includes an isolation well formed in a pixel region of a substrate. The isolation well has a first conductivity type. A gate stack is formed over the isolation well on the substrate. A mask layer is formed over the isolation well and covering at least a majority portion of the gate stack. A plurality of dopants is implanted in the pixel region, using the gate stack and the mask layer as masks, to form doped isolation features. The plurality of dopants has the first conductivity type. A source region and a drain region are formed on opposite sides of the gate stack in the substrate. The source region and the drain region have a second conductivity type opposite to the A conductivity.

Abstract: An integrated optical sensor module includes an optical sensor die having an optical sensing area on its first surface, and an application-specific integrated circuit (ASIC) die arranged over the first surface of the optical sensor die. A hole in the ASIC die is at least partially aligned with the optical sensing area such that at least some of the light passing through the hole may contact the optical sensing area. The hole through the ASIC die can be configured to receive an optical fiber, lens structure, or other optical element therein.

Abstract: An embodiment of an array of Geiger-mode avalanche photodiodes, wherein each photodiode is formed by a body of semiconductor material, having a first conductivity type, housing a first cathode region, of the second conductivity type, and facing a surface of the body, an anode region, having the first conductivity type and a higher doping level than the body, extending inside the body, and facing the surface laterally to the first cathode region and at a distance therefrom, and an insulation region extending through the body and insulating an active area from the rest of the body, the active area housing the first cathode region and the anode region. The insulation region is formed by a mirror region of metal material, a channel-stopper region having the second conductivity type, surrounding the mirror region, and a coating region, of dielectric material, arranged between the mirror region and the channel-stopper region.

Abstract: A system and method are disclosed for aligning substrates during successive process steps, such as ion implantation steps, is disclosed. Implanted regions are created on a substrate. After implantation, an image is obtained of the implanted regions, and a fiducial is provided on the substrate in known relation to at least one of the implanted regions. A thermal anneal process is performed on the substrate such that the implanted regions are no longer visible but the fiducial remains visible. The position of the fiducial may be used in downstream process steps to properly align pattern masks over the implanted regions. The fiducial also may be applied to the substrate before any ion implanting of the substrate is performed. The position of the fiducial with respect to an edge or a corner of the substrate may be used for aligning during downstream process steps. Other embodiments are described and claimed.

Abstract: A method for manufacturing a thin film solar cell device including a CIGS based thin film solar cell module (17). Edge deletion by selective removal of a multilayer structure (13) that includes at least a front contact (15) and a CIGS layer (7) to expose the back contact (5) in at least a peripheral area (22) in the circumferential region (21) of the module (17) adjacent to a first longitudinal thin film solar cell segment (18) allows for contacting of the module (17) by attaching at least a first contacting element (27) to the back contact (5). Preferably a blasting operation using simultaneous supply of blasting agents and gathering of debris in a blasting chamber (32) arranged on the thin film solar cell module (17) is used for the selective removal.

Abstract: Separation layers, usable in devices for converting radiation energy to electrical energy, allow at least some of the components of the devices to be separated from one another for disposal thereof. A separation layer may be interposed between and bonded to adjoining layers, and when acted upon by application of an external source, may be degraded to release the layers from one another. Once released, the layers may be disposed of more efficiently and economically, including proper disposal of hazardous waste, and recycling of materials which may be re-usable.

Abstract: Circuitry to reduce signal noise characteristics in an image sensor. In an embodiment, a bit trace line segment is located between neighboring respective segments of a source follower power trace and an additional trace which is to remain at a first voltage level during a pixel cell readout time period. In another embodiment, for each such trace segment, a smallest separation between the trace segment and the respective neighboring other one of such trace segments is substantially equal to or less than some maximum length to provide for parasitic capacitance between the bit line trace and one or more other traces.

Abstract: A semiconductor light receiving element includes a first semiconductor layer having a first conduction type, a second semiconductor layer that is provided on the first semiconductor layer and has a light receiving area, the second semiconductor layer having a second conduction type opposite to the first conduction type, an insulation film provided on the second semiconductor layer, and an electrode provided on the insulation film, the insulation film having a plurality of windows in an area in which the electrode overlaps the plurality of windows, the electrode being electrically connected to the second semiconductor layer via the plurality of windows.

Abstract: An integrated circuit having an insulated conductor or within a semiconductor substrate and extending perpendicular to a plane of a semiconductor wafer or substrate on which the integrated circuit is fabricated, the conductor comprising a first region of doped semiconductor extending between a first device or a first contact and a second device or a second contact.

Abstract: An image sensor package includes an image sensor die having an active side and a backside, wherein an image sensor device region and a bond pad are provided on the active side. A through-silicon-via (TSV) structure extending through the thickness of the image sensor die is provided to electrically connect the bond pad. A multi-layer re-distributed interconnection structure is provided on the backside of the image sensor die. A solder mask or passivation layer covers the multi-layer re-distributed interconnection structure.

Abstract: A method is provided for applying back contact silver busbars to an aluminum back surface field (BSF) of a solar cell.

Abstract: Methods of fabricating complementary metal-oxide-semiconductor (CMOS) imagers for backside illumination are disclosed. In one embodiment, the method may include forming at a front side of a substrate a plurality of high aspect ratio trenches having a predetermined trench depth, and forming at the front side of the substrate a plurality of photodiodes, where each photodiode is adjacent at least one trench. The method may further include forming an oxide layer on inner walls of each trench, removing the oxide layer, filling each trench with a highly doped material, and thinning the substrate from a back side opposite the front side to a predetermined final substrate thickness. In some embodiments, the substrate may have a predetermined doping profile, such as a graded doping profile, that provides a built-in electric field suitable to guide the flow of photogenerated minority carriers towards the front side.

Abstract: An etch-resistant composition is provided. The etch-resistant composition comprises a polymer and a first organic solvent. The polymer is prepared by copolymerizing a polymerization unit comprising styrene-based monomer(s) and acrylate-based monomer(s), and has a weight average molecular weight of at least about 35,000. Based on the total weight of the etch-resistant composition, the amount of the polymer is about 20.0 to about 60.0 wt % and the amount of the solvent is about 40.0 to about 80.0 wt %. The etch-resistant composition can be used for preparing a selective emitter of a solar cell.

Abstract: An implanting method for forming a photodiode comprises providing a substrate with a first conductivity, growing an epitaxial layer on the substrate, implanting ions with a second conductivity in the epitaxial layer from a front side of the substrate and implanting ions with the first conductivity in the epitaxial layer from the front side of the substrate to form a photo active region adjacent to the front side and a photo inactive region underneath the photo active region. By employing the implanting method, an average doping density of the photo active region is approximately ten times more than an average doping density of the photo inactive region.

Abstract: This method for producing a non-plane comprises fitting a flexible component onto a carrier by means of hybridization columns, each column having a first height and including a volume of solder material formed between two surfaces wettable by said solder material added to the flexible component and to the carrier respectively, said wettable surfaces being surrounded by zones non-wettable by the solder material, the wettable surfaces and the volume of solder material being determined as a function of a second height required for the flexible component relative to the carrier at the place where the column is formed, such that the column varies from the first height to the second height when the volume of material is brought to a temperature higher than or equal to its melting point and heating the volumes of solder material of the columns to a temperature higher than or equal to the melting point of said material in order to melt it.

Abstract: A method for manufacturing a backside-illuminated image sensor may include forming an insulating layer having a predetermined depth in an inactive region of a front side of a semiconductor substrate and forming a photodetector in an active region of a front side of the semiconductor substrate having the insulating layer. Further, the method may include stacking a support substrate on and/or over the front side of the semiconductor substrate having the photodetector. Furthermore, the method may include performing back grinding on the rear side of the semiconductor substrate by using the insulating layer as the stop point.

Abstract: An embedded micro-electro-mechanical system (MEMS) (100) comprising a semiconductor chip (101) embedded in an insulating board (120), the chip having a cavity (102) including a radiation sensor MEMS (105), the opening (104) of the cavity at the chip surface covered by a plate (110) transmissive to the radiation (150) sensed by the MEMS. The plate surface remote from the cavity having a bare central area, to be exposed to the radiation sensed by the MEMS in the cavity, and a peripheral area covered by a metal film (111) touching the plate surface and a layer (112) of adhesive stacked on the metal film.

Abstract: A multi-chip package may include an image sensor chip, an image signal processor (ISP) chip, a cover glass, and a package substrate. The ISP chip may be placed on the substrate. The image sensor chip may be placed over the ISP chip. An adhesive film may be formed between the ISP and image sensor chips. A cover glass may be suspended above the image sensor chip. The ISP chip and the image sensor chip may be wire bonded to the substrate. The multi-chip package may be hermetically sealed using a liquid compound or a dam structure. During normal operation, the ISP chip sends control signals to the image sensor chip via a first set of wire bond members and conductive traces in the substrate while the image sensor chip sends output signals to the ISP chip via a second set of wire bond terminals and conductive traces in the substrate.

Abstract: According to one embodiment, a wireless device includes a board, a semiconductor chip, a radiation element, a sealing resin, a conductive layer, and a first conductive wall. The semiconductor chip is mounted on the board and includes a transmission/reception circuit. The radiation element is formed on the board. The sealing resin seals the semiconductor chip. The conductive layer covers at least a portion of a surface of the sealing resin. The first conductive wall is provided between the semiconductor chip and the radiation element and is connected to the conductive layer.

Abstract: A method of forming trenches in a semiconductor device includes forming an etchant barrier layer above a first portion of a semiconductor layer. A first trench is etched in a second portion of the semiconductor layer using a first etchant. The second portion of the semiconductor layer is not disposed underneath the etchant barrier layer. The etchant barrier layer is etched through using a second etchant that does not substantially etch the semiconductor layer. A second trench is etched in the first portion of the semiconductor layer using a third etchant. The third etchant also extends a depth of the first trench.

Abstract: The present disclosure relates to a method of forming a back-side illuminated CMOS image sensor (BSI CIS). In some embodiments, the method comprises forming a plurality of photodetectors within a front-side of a semiconductor substrate. An implant is performed on the back-side of the semiconductor substrate to form an implantation region having a doping concentration that is greater in the center than at the edges of the semiconductor substrate. The back-side of the workpiece is then exposed to an etchant, having an etch rate that is inversely proportional to the doping concentration, which thins the semiconductor substrate to a thickness that allows for light to pass through the back-side of the substrate to the plurality of photodetectors. By implanting the substrate prior to etching, the etching rate is made uniform over the back- side of the substrate improving total thickness variation between the photodetectors and the back-side of the substrate.

Abstract: A laser system with multiple laser pulses for removing material from a solar cell being fabricated. The laser system includes a single pulse laser source and a multi-pulse generator. The multi-pulse generator receives a single pulse laser beam from the single pulse laser source and converts the single pulse laser beam into a multi-pulse laser beam. A laser scanner scans the multi-pulse laser beam onto the solar cell to remove material from the solar cell.

Abstract: An optical device includes an active component on a base. The active component is a light sensor and/or a light modulator. The active component is configured to guide a light signal through a ridge of an active medium extending upwards from slab regions of the active medium. The slab regions are on opposing sides of the ridge. The active medium includes a doped region that extends into a lateral side of the ridge and also into one of the slab regions. The depth that the doped region extends into the slab region is further than the depth that the doped region extends into the ridge.

Abstract: An optical device includes an active component on a base. The active component is a light sensor and/or a light modulator. The active component is configured to guide a light signal through a ridge of an active medium extending upwards from slab regions of the active medium. The slab regions are on opposing sides of the ridge. The active medium includes a doped region that extends into a lateral side of the ridge and also into one of the slab regions. The depth that the doped region extends into the slab region is further than the depth that the doped region extends into the ridge.

Abstract: A sensor apparatus including at least one analog and one digital circuit component and an analog/digital converter for converting analog signals of the analog circuit component into digital signals for the digital circuit component, and vice versa, wherein the analog circuit component and the digital circuit components include at least one module for electronically implementing a function, and wherein one of the modules of the analog circuit component is embodied as a sensor device for detecting optical radiation and one of the modules of the digital circuit component is embodied as a signal processing device for processing digital signals. In order to enable improved integration into application-based sensor devices, the circuit components including the analog/digital converter are integrated as an integrated circuit in a chip and the chip is manufactured as a semiconductor structure using 1-poly technology.

Abstract: A method of manufacturing a solar cell includes following steps. A first-conductive-type silicon wafer is provided. The silicon wafer has a first (front) surface and a second (back) surface facing each other, and a plurality of nanorods are located on the first surface. A doping process is performed, so that the conductive type of the nanorods and the conductive type of one portion of the silicon wafer located below the nanorods are changed to a second conductive type. A first electrode is formed on the second surface, and a first annealing process is performed on the first electrode. A second electrode is formed on a partial region of the first surface. An atomic layer deposition process is performed to form a passivation layer on the first surface and surfaces of the nanorods.

Abstract: A method for forming single crystal or large-crystal-grain thin-film layers deposits a thin-film amorphous, nanocrystalline, microcrystalline, or polycrystalline layer, and laser-heats a seed spot having size on the order of a critical nucleation size of the thin-film layer. The single-crystal seed spot is extended into a single-crystal seed line by laser-heating one or more crystallization zones adjacent to the seed spot and drawing the zone across the thin-film layer. The single-crystal seed line is extended across the thin-film material layer into a single-crystal layer by laser-heating an adjacent linear crystallization zone and drawing the crystallization zone across the thin-film layer. Photovoltaic cells may be formed in or on the single-crystal layer. Tandem photovoltaic devices may be formed using one or several iterations of the method. The method may also be used to form single-crystal semiconductor thin-film transistors, such as for display devices, or to form single-crystal superconductor layers.

Abstract: According to one embodiment, a method for manufacturing a semiconductor device includes implanting impurity ions to a semiconductor layer in which an electrode is embedded; forming a light absorption film which absorbs laser light at a side of the electrode to which the laser light is irradiated; and activating the impurity ions by irradiating laser light to the semiconductor layer at which the light absorption film is formed in the forming.

Abstract: An image sensor assembly includes an image sensor die attached adjacent to a cavity and a lower surface in a preformed package having substantially vertical surfaces extending from the lower surface to an upper surface of the package. The image sensor die may include a charge-coupled device or an active pixel sensor imager that provides the light receiving surface for capturing the image. A cover is placed over the upper surface of the package. The cover may be a glass cover or an infrared cut filter. A light absorbing layer is applied to the cover in registry with the image sensor die such that the light absorbing layer prevents light from falling on the substantially vertical surfaces of the preformed package without preventing the passage of light that falls on the light receiving surface of the image sensor die.

Abstract: A solid-state image capturing device includes: a substrate; a substrate voltage source which applies a first potential to the substrate during a light reception period and applies a second potential to the substrate during a non-light reception period; and a plurality of pixels which each includes a light receiver which is formed on a front surface of the substrate and generates signal charges in accordance with received light, a storage capacitor which is formed adjacent to the light receiver and accumulates and stores signal charges generated by the light receiver, dark-current suppressors which are formed in the light receiver and the storage capacitor, an electronic shutter adjusting layer which is formed in an area facing the light receiver in the substrate and distant from the storage capacitor and which adjusts potential distribution, and a floating diffusion portion to which the signal charges accumulated in the storage capacitor are transmitted.

Abstract: A method includes performing a grinding on a backside of a semiconductor substrate. An image sensor is disposed on a front side of the semiconductor substrate. An impurity is doped into a surface layer of the backside of the semiconductor substrate to form a doped layer. A multi-cycle laser anneal is performed on the doped layer.