Abstract: A method for testing the material of a test object (8) in a nondestructive manner, said test object being moved relative to a probe (1) at a variable relative speed, comprises the following steps: detecting a probe signal (US) by means of the probe (1), subjecting the probe signal (US) to analog-to-digital conversion in order to generate a digitized probe signal (USD) in the form of a sequence of digital words with a predefined, in particular constant, word repetition rate, n-stage decimation of the word repetition rate of the digitized probe signal (USD) or of a digital demodulation signal (UM) derived from the digitized probe signal by means of n cascaded decimation stages (5_1 to 5_n), where n?2, selecting an output signal (UA_1 to UA_n) of one of the n decimation stages (5_1 to 5_n) depending on the instantaneous relative speed and filtering the selected output signal by means of a digital filter (7), which is clocked with the word repetition rate of the selected output signal.

Abstract: An apparatus and method for regulating analogue-to-digital converters. First and second input signals are received at controlled oscillator circuitry which generates respective first and second pulse streams with pulse rates based on the relevant input signal. Difference circuitry determines the difference in number of pulses of the first and second pulse streams and outputs a first digital signal. Circuitry also determines a signal independent value based on the number of pulses of the first and/or second pulse streams. In one embodiment this value is the sum or average of the number of pulses of the first and second pulse streams. This value can be used to calibrate for any variation in transfer characteristic of the oscillator circuitry. In one embodiment this value is compared to a reference value and a regulation signal passed to control circuitry to regulate the operation of the oscillation circuitry.

Abstract: A high dynamic range sensitive sensor element or array is provided which uses phase domain integration techniques to accurately capture high and low intensity images. The sensor element of the present invention is not limited by dynamic range characteristics exhibited by prior art solid-state pixel structures and is thus capable of capturing a full spectrum of electromagnetic radiation to provide a high quality output image.

Abstract: An analog-to-digital converter is disclosed comprising a resonant oscillator comprising an input operable to receive an analog input signal and an output operable to output an oscillating signal. A DC offset detector detects a DC offset in the oscillating signal caused by the analog input signal, wherein the DC offset is converted into a digital output signal representing the analog input signal.

Abstract: Digital spur reduction in which spurs are kept outside selected channels of interest, with illustrative embodiments relating to an integrated radiofrequency transceiver circuit having digital and analogue components, the circuit having a radiofrequency signal receiver with a local oscillator signal generator configured to provide a local oscillator signal at a frequency fLO and a mixer configured to combine an input radiofrequency signal with the local oscillator signal to produce an intermediate frequency signal; and a clock signal generator configured to generate a digital clock signal at a frequency fDIG for operation of the digital components, where the local oscillator signal and/or a reference signal from which the local oscillator signal is derived are generated such that digital spurs lie outside a band selected by the receiver.

Abstract: A method for improving bandwidth of an oscilloscope involves, in preferred embodiments, the use of frequency up-conversion and down-conversion techniques. In an illustrative embodiment the technique involves separating an input signal into a high frequency content and a low frequency content, down-converting the high frequency content in the analog domain so that it may be processed by the oscilloscope's analog front end, digitizing the low frequency content and the down-converted high frequency content, and forming a digital representation of the received analog signal from the digitized low frequency content and high frequency content.

Abstract: A correlated double sampling circuit includes a delta-sigma modulator, a selection circuit, and an accumulation circuit. The delta-sigma modulator is configured to receive an input signal, delta-sigma modulate the input signal, and output a modulation signal. The selection circuit is configured to invert the modulation signal and selectively output one of the modulation signal and an inverted modulation signal in response to a selection signal corresponding to an operation phase. The accumulation circuit is configured to generate a first accumulation result by performing an accumulation process on one of the modulation signal and the inverted modulation signal in a first operation phase, and generate a second accumulation result by performing the accumulation process on the first accumulation result and the other one of the modulation signal and the inverted modulation signal in a second operation phase.

Abstract: A continuous-time delta-sigma Analog to Digital Converter (ADC) includes: a loop filter, for receiving and noise-shaping an analog input signal, and outputting a first loop voltage; a first summing resistor, for transforming a first feedback current to be a first feedback voltage, and summing the first loop voltage and the first feedback voltage so as to generate a first summing voltage, wherein the first summing voltage is equal to a sum of the first loop voltage and the first feedback voltage; a quantizer, for outputting a digital output signal according to the first summing voltage; and a current Digital to Analog Converter (DAC), for generating the first feedback current according to the digital output signal.

Abstract: There are provided an analog-to-digital signal conversion method and apparatus therefor, and a digital phase locked loop circuit including the same. The analog-to-digital signal conversion method may include: generating a first digital output signal having N number of bits by comparing each of N number of delay signals detected from output terminals of N number of delay cells with a reference signal; generating a second digital output signal by comparing an auxiliary delay signal generated by an (N+1)th delay cell with the reference signal; and determining a change in a delay time of each of the N number of delay cells based on the first digital output signal and the second digital output signal.

Abstract: An analog to digital conversion includes a multiplexor circuit for receiving analog input signals and, responsive to a select input, an analog to digital converter circuit to convert a selected analog signal into a digital signal, a conversion starting device to send a conversion start signal on the basis of a trigger event, the conversion starting device being responsive to a select input, a sequencer to control the analog to digital converter circuitry to execute one sequence conversion on the basis of one conversion sequence instruction, and a FIFO register block to receive conversion sequence instructions and being able to queue each new received conversion sequence instruction if an actual conversion sequence is in progress and to control the sequencer to execute a new sequence conversion instruction after the conversion sequence is executed.

Abstract: A physical information acquiring method of acquiring physical information for a predetermined purpose on the basis of change information that is acquired under predetermined detection conditions for a physical quantity using an portion for physical quantity distribution detection. The portion for physical quantity distribution detection includes a detector that detects change information corresponding to a change in a physical quantity made incident on the detector and has unit components that output unit signals based on the change information detected by the detector arranged in a predetermined order. In the physical information acquiring method, a carrier signal is converted into a signal related to a frequency on the basis of the change information detected by the detector. The physical information for a predetermined purpose is acquired using the signal related to a frequency.

Abstract: An AD converter includes: AD conversion stages configured to generate digital data having a value corresponding to a relationship between two analog signals being input and amplifying two analog residual signals with a first amplifier and a second amplifier with gain to be controlled to output the signals; and a gain control part configured to control gain of the first amplifier and the second amplifier on the basis of a monitoring result of the output signals of the first amplifier and the second amplifier. The first amplifier and the second amplifier are formed of open-loop amplifiers, and the gain control part takes out amplitude information of the output signals of the first amplifier and the second amplifier in at least one of the AD conversion stages and performs gain control so that amplitude of the analog signals being output from the stage converges on setting amplitude being set.

Abstract: A solid-state image pickup device may include: an image pickup unit in which a plurality of pixels are arranged in a matrix; a sample-and-hold unit having a switch element and a capacitance element; a frequency conversion unit in which a plurality of stages of inverting circuits are connected, the pixel signal is supplied to the first power supply terminal, and a start signal for starting clock generation and an output signal from the inverting circuit of a predetermined stage are input to one of the inverting circuits; a counting unit that counts the clock output from the frequency conversion unit; and a buffer circuit provided between a first terminal of the capacitance element connected to the switch element and the first power supply terminal, wherein a second terminal of the capacitance element is connected to the second power supply terminal.

Abstract: An A/D conversion apparatus includes an N-stage pulse circulating circuit including N (N is a natural number, N?3) inverting circuits connected in a ring shape, the inverting circuits delaying an input pulse signal by a delay time corresponding to an amplitude of a separately input analog input signal, and outputting inverted pulse signals obtained by inverting the pulse signal, a counter unit that counts a number of circulations by which the pulse signal has circulated in the pulse circulating circuit within a predetermined time based on the inverted pulse signal output from one of the N inverting circuits, and a switching unit that switches an output destination of the inverted pulse signal, which is output from an inverting circuit of an Mth (M is an odd natural number, 1?M?N?1) stage of the pulse circulating circuit, according to a change in an operation environment.

Abstract: A current providing system, for providing an output current, which comprises: a frequency detecting circuit, for receiving at least one input signal, and for detecting a frequency of the input signal; a frequency-controlled current providing circuit, for providing the output current according to the input signal frequency when the input signal frequency is in a first predetermined range; and a predetermined current providing circuit, for providing the output current with a first predetermined current value, when the input signal frequency is not in the first predetermined range.

Abstract: A method for converting an analog signal to a digital signal is provided. Initially, a digital representation of a portion of an analog signal is generated. Residue of the analog signal is then sampled at a sampling instant so as to generate a residue sample. A signal having a frequency that is proportional to the voltage of the residue sample is generated, and the signal is measured to generate coarse and fine measurements of the frequency. A digital representation of the residue sample from the coarse and fine measurements is then generated.

Abstract: A method for generating an UWB pulses based on LC oscillator topology. Fast turn on of the oscillator is achieved by creating large asymmetry in a normally symmetrical topology which is used in a typical differential type oscillator. One method for achieving large asymmetry is activating one branch of a differential pair of branches for a short duration before activating both branches in a normal operation. The bandwidth of the pulse is controlled by modifying the duration of the oscillator activation. Fast turn on and turn off is essential for high bandwidth generation. The method is adaptable for generating binary phase shift keying (BPSK) modulation. Selecting the activated branch of a fully symmetrical topology controls the output phase and creates two possibilities which differ exactly by 180 degrees. In a preferred embodiment, all the pulse generator components are on-clip leading to a low cost solution. The circuit can generate high power pulses directly on a load.

Abstract: An A/D converter circuit includes first to fourth pulse circulation circuits and first and second counters and configured to provide high conversion accuracy irrespective of a temperature change. The first pulse circulation circuit operates with a difference voltage of a specified voltage and an analog input voltage. The first counter outputs a difference of the number of pulse circulation in the first and the second pulse circulation circuits. The third pulse circulation circuit operates with a difference voltage of the specified voltage and a set voltage. The fourth pulse circulation circuit operates with the set voltage. The second counter outputs a difference of the number of pulse circulation in the third and the fourth pulse circulation circuits. When an output value of the second counter reaches a specified value, an output value of the first counter at that time is outputted as A/D conversion data.

Abstract: An analog-to-digital converter (ADC) is disclosed operable to convert a sensor signal to a digital value. A differential amplifier responsive to the sensor signal and a reference signal generates a first analog signal representing a first offset above the reference signal and a second analog signal representing a second offset below the reference signal. A first oscillator generates a first output frequency dependent on the first analog signal, and a second oscillator generates a second output frequency dependent on the second analog signal. A difference between the first output frequency and the second output frequency is generated, and the digital value representing the sensor signal is generated in response to the difference.

Abstract: A data converter circuit includes a non-uniform sampling circuit and a resampler circuit. The non-uniform sampling circuit includes a sampling voltage-controlled oscillator (VCO) having an input to receive an analog data signal and having an output to generate a quantized data signal, wherein the quantized data signal comprises a plurality of non-uniform transition intervals indicative of data contained in the analog data signal. The resampling circuit has an input to receive the quantized data signal and is configured to reconstruct the data from the quantized data signal. For some embodiments, the data converter can also include a PLL that includes a feedback VCO having matched components with the sampling VCO.

Abstract: A ring oscillator circuit causing a pulse signal to circulate around a circle to which an even number of inverting circuits are connected in a ring, wherein one of the inverting circuits is a first starting inverting circuit, which drives a first pulse signal according to a control signal, another of the inverting circuits is a second starting inverting circuit, which drives a second pulse signal based on a leading edge of the first pulse signal, still another is a third starting inverting circuit, which drives a third pulse signal based on the leading edge of the first pulse signal after the second pulse signal is driven, and the first to third starting inverting circuits are arranged within the circle of the inverting circuits in order of the third, second, and first pulse signals in traveling directions of the pulse signals.

Abstract: A method and a device are for converting a digital input signal to an analog output signal, for example in vehicle safety systems. In the method, a first and a second pulse-width modulated signal is used for generating a first and a second analog intermediate signal. The second intermediate signal is converted to a third intermediate signal, wherein this conversion is controlled by a third pulse-width modulated signal. A fourth analog intermediate signal is generated from the third intermediate signal. The analog output signal is then generated from the first intermediate signal and the fourth intermediate signal. The first, second and/or third pulse-width modulated signal is preferably but not necessarily derived from the same digital input signal.

Abstract: Methods and apparatuses for reducing noise in frequency to digital converters (FDCs). An FDC apparatus includes a first FDC, a second FDC and a combiner. The first and second FDCs are configured to independently sample an input signal according to a sample clock to generate first and second digital signals, each representing the instantaneous frequency of the input signal. The combiner is configured to form a resultant digital signal from the first and second digital signals. The first and second FDCs are designed and combined in the noise-canceling FDC apparatus so that the first and second signals they generate have correlated noise profiles in a frequency range of interest. When combined by the combiner to form the resultant digital signal, the resultant digital signal has a signal power to noise power ratio greater than the signal power to noise power ratios characterizing the first and second digital signals of the individual first and second FDCs.

Abstract: An analog-to-digital converter may include an annular delay circuit that includes a plurality of delay units connected in an annular shape, each of the plurality of delay units delaying a pulse current that is input to each of the plurality of delay units, a current source that outputs an electric current, in accordance with an input analog signal, to selected delay units, which is selected from among the plurality of delay units, and a digital signal generation unit that generates a digital signal in accordance with a number of circulations per predetermined period of time of the pulse current circulating around the annular delay circuit.

Abstract: An A/D conversion circuit includes a reference signal generation unit, a comparison unit, a delay circuit, a latch unit, an arithmetic circuit, a lower counter, and an upper counter including a second binary counter performing counting using the count clock based on one of the output signals constituting the first lower phase signal, performs counting to acquire a first upper count value, inverts values of respective bits constituting the first upper count value, performs counting using the count clock based on of the output signals constituting the second lower phase signal, and performs counting based on the second upper count clock to acquire a second upper count value, and having a data protection function for protecting an upper count value held by the second binary counter at a time of count clock switching, wherein digital data corresponding to a difference between the first and second analog signals is acquired.

Abstract: A pulse generator circuit is provided. The pulse generator circuit has an input adapted to receive an input electrical quantity and an output at which an output electrical quantity is made available. A transfer characteristic establishes a relationship between said input and said output electrical quantities. The pulse generator circuit is adapted to provide said output electrical quantity in the form of pulses having a predetermined shape, suitable to be used for UWB transmission. The transfer characteristic has substantially a same shape as that of said pulses. Moreover, a UWB modulating system exploiting the novel pulse generator is proposed.

Abstract: An A/D conversion apparatus includes an N-stage pulse circulating circuit including N (N is a natural number, N?3) inverting circuits connected in a ring shape, the inverting circuits delaying an input pulse signal by a delay time corresponding to an amplitude of a separately input analog input signal, and outputting inverted pulse signals obtained by inverting the pulse signal, a counter unit that counts a number of circulations by which the pulse signal has circulated in the pulse circulating circuit within a predetermined time based on the inverted pulse signal output from one of the N inverting circuits, and a switching unit that switches an output destination of the inverted pulse signal, which is output from an inverting circuit of an Mth (M is an odd natural number, 1?M?N?1) stage of the pulse circulating circuit, according to a change in an operation environment.

Abstract: A method and a system for converting time intervals are provided. In one embodiment, the system comprises a first time-to-digital converter having a first resolution configured to convert a first time interval, a second time-to-digital converter having a second resolution configured to convert a second time interval, and a third time-to-digital converter having a third resolution and coupled to the first time-to-digital converter and the second time-to-digital converter, the third time-to-digital converter configured to convert a third time interval and a fourth time interval.

Abstract: A digital control switching power supply unit converts an input voltage into a desired output voltage using a digitally controlled pulse width modulation (PWM) signal according to a switching cycle. The power supply unit includes an analog-to-digital converter (ADC). The ADC converts a result of a comparison between an output voltage and a reference voltage to a digital signal during a conversion cycle. The ADC includes a circuit for outputting a phase difference between a switching cycle and the conversion cycle, and a delay circuit. The delay circuit generates a delay output current based on a result of the comparison and the phase difference and determines the conversion time delay according to the delay output current. The delay circuit also generates a delay reference current based on the reference voltage and the phase difference and determining the duration of the conversion cycle according to the delay reference current.

Abstract: An A/D converter circuit includes first to fourth pulse circulation circuits and first and second counters and configured to provide high conversion accuracy irrespective of a temperature change. The first pulse circulation circuit operates with a difference voltage of a specified voltage and an analog input voltage. The first counter outputs a difference of the number of pulse circulation in the first and the second pulse circulation circuits. The third pulse circulation circuit operates with a difference voltage of the specified voltage and a set voltage. The fourth pulse circulation circuit operates with the set voltage. The second counter outputs a difference of the number of pulse circulation in the third and the fourth pulse circulation circuits. When an output value of the second counter reaches a specified value, an output value of the first counter at that time is outputted as A/D conversion data.

Abstract: A pulse generator circuit is provided. The pulse generator circuit has an input adapted to receive an input electrical quantity and an output at which an output electrical quantity is made available. A transfer characteristic establishes a relationship between said input and said output electrical quantities. The pulse generator circuit is adapted to provide said output electrical quantity in the form of pulses having a predetermined shape, suitable to be used for UWB transmission. The transfer characteristic has substantially a same shape as that of said pulses. Moreover, a UWB modulating system exploiting the novel pulse generator is proposed.

Abstract: In accordance with some embodiments of the present disclosure, an oscillator may include a crystal resonator and a squaring circuit coupled to the crystal resonator and configured to convert a sinusoidal signal produced by the crystal resonator to a square-wave signal, the squaring circuit comprising a bias circuit configured to transmit a selected bias voltage for the squaring circuit, the selected bias voltage selected from a plurality of potential bias voltages. In accordance with this and other embodiments of the present disclosure, an oscillator may include a crystal resonator, an inverter coupled in parallel with the crystal resonator, and a programmable voltage regulator coupled to the inverter. The programmable voltage regulator may be configured to supply a first supply voltage to the inverter during a startup duration of the oscillator, and supply a second supply voltage to the inverter after the startup duration, wherein the second supply voltage is lesser than the first supply voltage.

Abstract: A video decoder (10) with reduced power consumption includes a power management controller (45) that is operative to select one of a plurality of different power consumption states for a video decoder (10), and, in response to the determination, vary power consumption of at least one operational portion of the video decoder (10). In addition, in one example, a method (200) for reducing power consumption for a video decoder (10) includes determining input stream encoding description data (34) to select one of a plurality of different power consumption states for a video decoder (10) and, in response to the determination, varying power consumption of at least one operational portion of the video decoder (10).

Abstract: A solid-state image pickup apparatus includes: an image pickup portion in which are arranged a plurality of pixels with a photo-electric conversion element, the pixels which generate and output a signal in accordance with the intensity of an incident electromagnetic wave; a frequency conversion portion that includes a link circuit in which a plurality of inversion circuits with a first terminal and a second terminal are linked in a ring, each of the inversion circuits having a varying delay time from an input signal to an output signal based on the voltage difference between the voltage supplied to the first terminal and the voltage supplied to the second terminal, and the frequency conversion portion which generate clock pulses at a frequency based on the voltage difference; a count portion which counts the clock pulses generated by the frequency conversion portion; and a transistor including: a third terminal to which is input a predetermined voltage; a fourth terminal connected to the first terminals; and

Abstract: An apparatus is provided which has a first analog input and a second analog input. In a particular implementation, the first analog input is coupled to a first controllable oscillator and the second analog input is coupled to a second controllable oscillator. First and second digital output signals generated based on output oscillations from the first controllable oscillator and the second controllable oscillator are combined.

Abstract: Apparatus and methods are provided for a voltage-controlled oscillator (VCO) quantization circuit. A quantization circuit comprises an input node for an input signal, a VCO quantizer coupled to the input node, and an output generation module coupled to the VCO quantizer. The VCO quantizer is configured to generate a digital code that is representative of the input signal, wherein the digital code has a first code range. The output generation module generates a digital output value based on the digital code, wherein the digital output value has a second code range being greater than the first code range.

Abstract: A physical information acquiring method of acquiring physical information for a predetermined purpose on the basis of change information that is acquired under predetermined detection conditions for a physical quantity using an portion for physical quantity distribution detection. The portion for physical quantity distribution detection includes a detector that detects change information corresponding to a change in a physical quantity made incident on the detector and has unit components that output unit signals based on the change information detected by the detector arranged in a predetermined order. In the physical information acquiring method, a carrier signal is converted into a signal related to a frequency on the basis of the change information detected by the detector. The physical information for a predetermined purpose is acquired using the signal related to a frequency.

Abstract: There are provided an analog-digital converter circuit capable of performing the same degree of operation as being performed at a high-frequency oscillation pulse using a low-frequency oscillation pulse without using the high-frequency oscillation pulse, a timing signal generating circuit generating a timing signal at the high frequency, and a control device using the circuits. In an analog-digital converter circuit, a periodic signal generating circuit allows the first to j-th pulse counting devices of the N pulse counting devices to count a count value X and allows the other pulse counting devices to count a count value X?1 in each sampling period by sequentially generating N serial periodic signals at a delay time interval of [approximate value of one period (T) of periodic signals]÷N. A digital signal generating circuit converts the analog signal to the digital signal.

Abstract: The pulse delay circuit includes a plurality of delay units connected in series or in a ring, each of the delay units being constituted of at least one inverter gate circuit grounded to a ground line, and configured to delay a pulse signal passing therethrough by a delay time thereof depending on an input signal applied thereto, and a capacitor connected between a signal line through which the voltage signal is applied to each of the delay units and the ground line. The capacitor serves as a current source to supply a current which each of the delay units consumes to invert a state thereof.

Abstract: A reconfigurable bit-manipulation node is disclosed. The node includes an execution unit configured to perform a number of bit-oriented functions and a control unit configured to control the execution unit to allow one of the bit-oriented functions to be performed. The execution unit includes a number of elements interconnected with one another to allow the bit-oriented functions to be performed. The elements include a programmable butterfly unit, a number of non-programmable butterfly units, a number of data path elements, a look-up table memory, and a reorder memory. The execution unit is capable of engaging in one of a number of operating modes to perform the bit-oriented functions. The operating modes include a programmable mode and a number of fixed operating modes including Viterbi decoding, turbo decoding and variable length encoding and decoding. The data path elements include a programmable shifter and a programmable combiner.

Abstract: A pulse generator circuit is provided. The pulse generator circuit has an input adapted to receive an input electrical quantity and an output at which an output electrical quantity is made available. A transfer characteristic establishes a relationship between said input and said output electrical quantities. The pulse generator circuit is adapted to provide said output electrical quantity in the form of pulses having a predetermined shape, suitable to be used for UWB transmission. The transfer characteristic has substantially a same shape as that of said pulses. Moreover, a UWB modulating system exploiting the novel pulse generator is proposed.

Abstract: Provided is a pulse phase difference detecting circuit including: a first delay circuit that receives a first pulse signal to output a signal obtained by delaying the first pulse signal as a second pulse signal and includes multiple serially-connected delay units having the same delay amount; a second delay circuit that receives the second pulse signal and includes multiple serially-connected delay units having the delay amount; a first delay adjustment circuit that adjusts a delay amount with respect to the second pulse signal and outputs the adjusted second pulse signal back to the first delay circuit as a third pulse signal; and a pulse arrival position detecting circuit that detects a pulse arrival position of the first pulse signal based on outputs of the delay units of the first and second delay circuits that are transmitted as the third and second pulse signals, respectively.

Abstract: There is provided a physical information acquiring method of acquiring physical information for a predetermined purpose on the basis of change information that is acquired under predetermined detection conditions for a physical quantity using an portion for physical quantity distribution detection. The portion for physical quantity distribution detection includes a detector that detects change information corresponding to a change in a physical quantity made incident on the detector and has unit components that output unit signals based on the change information detected by the detector arranged in a predetermined order. In the physical information acquiring method, a carrier signal is converted into a signal related to a frequency on the basis of the change information detected by the detector. The physical information for a predetermined purpose is acquired using the signal related to a frequency.

Abstract: An apparatus and method for detecting leading pulse edges of a signal includes a controller, hysteresis threshold comparators and qualification timers. The controller uses the outputs from the timers in order to determine whether or not a transition of the input signal constitutes a leading pulse edge of the input signal.

Abstract: Certain exemplary embodiments can provide a method, which can comprise transmitting a recovered analog input signal to a programmable logic controller. The recovered analog input signal can be converted, on a downstream side of an isolation device, from a converted signal. The recovered analog input signal can have a voltage value that varies according to a frequency value of the converted signal.

Abstract: A high dynamic range sensitive sensor element or array is provided which uses phase domain integration techniques to accurately capture high and low intensity images. The sensor element of the present invention is not limited by dynamic range characteristics exhibited by prior art solid-state pixel structures and is thus capable of capturing a full spectrum of electromagnetic radiation to provide a high quality output image.

Abstract: The first and second time-domain signals are received, and a difference between the pulse width of the first time-domain signal and the pulse width of the second time-domain signal within a unit time for carrying one item of analog signal information is obtained. The obtained difference is treated as positive information if the pulse width of the first time-domain signal is greater than the pulse width of the second time-domain signal, or as negative information if the pulse width of the first time-domain signal is smaller than the pulse width of the second time-domain signal.

Abstract: An A/D converter has a series of M delay units through which a pulse signal is transmitted while being delayed in each delay unit by a delay time depending on a level of an analog signal. A unit of the converter latches the pulse signal outputted from each delay unit at N sampling times to hold M×N latched data. Another unit of the converter receives the M×N pieces of latched data as a piece of combined data composed of the latched data arranged in an order corresponding to an arranging order of M×N sampling points in the pulse signal, converts the combined data into numeral data, corresponding to a position of the pulse signal in the delay units, at one time, and produces converted digital data corresponding to the level of the analog signal from the numeral data.

Abstract: An inverter circuit configuring a delay unit is a so-called CMOS transistor including a PMOS transistor and an NMOS transistor, of which respective gates are interconnected and respective drains are interconnected. The source and a back gate of the NMOS transistor are connected to the ground. The source of the PMOS transistor is connected to a positive drive terminal and controlled by an analog input signal. The back gate of the PMOS transistor is connected to a control terminal and controlled by a control signal.

Abstract: A method for dealing with the problem of simultaneous continuous readout of large number of data channels from the set of multiple sensors in instances where the use of multiple amplitude-to-digital converters is not practical or causes undesirable extra noise and distortion in the data. The new method uses sensor front-end s and subsequent electronics to transform the analog input signals and encode them into a series of short pulses that can be transmitted to a long distance via a high frequency transmission line without information loss. Upon arrival at a destination data decoder and analyzer device, the series of short pulses can be decoded and transformed back, to obtain, store, and utilize the sensor information with the required accuracy.