Abstract: In a processing of immersing substrates in a chemical solution, and agitating the chemical solution by as bubbles or liquid, the gas bubbles or liquid is supplied so as to bring about alternate occurrence of a first state and a second state. The first state is a state in which an amount of the gas bubbles or the liquid supplied to first side in one direction of each substrate is greater than an amount of the gas bubbles or the liquid supplied to a second side in the one direction of the substrate. The second state is a state in which the amount of the gas bubbles or the liquid supplied to the first side in the one direction of the substrate is smaller than the amount of the gas bubbles or the liquid supplied to the second side in the one direction of the substrate.
Abstract: Provided is a solid-state imaging device including: a photodiode which converts an optical signal to signal charges; a transfer gate which transfers the signal charges from the photodiode; an impurity diffusion layer to which the signal charges are transferred by the transfer gate; and a MOS transistor of which a gate is connected to the impurity diffusion layer. The impurity diffusion layer has a first conduction type semiconductor layer and a second conduction type semiconductor layer which is formed in the first conduction type semiconductor layer and under an end portion of the transfer gate.
Abstract: A memory device may include an access transistor, and a memory cell configured to store an item of information. The memory cell may include first and second electrodes configured to have different optoelectronic states corresponding respectively to two values of the item of information, and to switch between the different optoelectronic states based upon a control signal external to the memory cell, the different optoelectronic states being naturally stable in an absence of the control signal. The memory cell may also include a solid electrolyte between the first and second electrodes.
Abstract: Embodiments of mechanisms of forming a radio frequency area of an integrated circuit are provided. The radio frequency area of an integrated circuit structure includes a substrate, a buried oxide layer formed over the substrate, and an interface layer formed between the substrate and the buried oxide layer. The radio frequency area of an integrated circuit structure also includes a silicon layer formed over the buried oxide layer and an interlayer dielectric layer formed in a deep trench. The radio frequency area of an integrated circuit structure further includes the interlayer dielectric layer extending through the silicon layer, the buried oxide layer and the interface layer. The radio frequency area of an integrated circuit structure includes an implant region formed below the interlayer dielectric layer in the deep trench and a polysilicon layer formed below the implant region.
Abstract: A heterojunction III-V photovoltaic (PV) cell includes a base layer comprising a III-V substrate, the base layer being less than about 20 microns thick; an intrinsic layer located on the base layer; an amorphous silicon layer located on the intrinsic layer; and a transparent conducting oxide layer located on the amorphous silicon layer.
Type:
Grant
Filed:
June 20, 2014
Date of Patent:
April 28, 2015
Assignee:
International Business Machines Corporation
Inventors:
Stephen W. Bedell, Norma Sosa Cortes, Keith E. Fogel, Devendra Sadana, Ghavam Shahidi, Davood Shahrjerdi
Abstract: Disclosed is an apparatus and method for manufacturing a thin film type solar cell, which enables the enhancement of productivity, the apparatus for manufacturing a thin film type solar cell including a first electrode forming unit; a first separation part; an optoelectric conversion layer forming unit; a contact line forming unit; a printing unit; and an etching process unit, wherein the etching process unit removes the optoelectric conversion layer in a second separation part to expose the first electrode in the second separation part through a wet etching process.
Abstract: A solar cell includes a first dielectric layer on the shaded side of the solar cell; and a second dielectric layer on the first dielectric layer. The second dielectric layer includes Hydrogen and the Hydrogen content in the second dielectric layer is measured such that a refractive index of less than 2.0 results for the second dielectric layer.
Abstract: A method of making a backside illuminated image sensor includes forming a first isolation structure in a pixel region of a substrate, where a bottom of the first isolation structure is exposed at a back surface of the substrate. The method further includes forming a second isolation structure in a peripheral region of the substrate, where the second isolation structure has a depth less than a depth of the first isolation structure. Additionally, the method includes forming an implant region adjacent to at least a portion of sidewalls of the first isolation structure, where the portion of the sidewalls is located closer to the back surface than a front surface of the substrate, and where the second isolation structure is free of the implant region.
Abstract: A semiconductor nanowire device includes at least one semiconductor nanowire having a bottom surface and a top surface, an insulating material which surrounds the semiconductor nanowire, and an electrode ohmically contacting the top surface of the semiconductor nanowire. A contact of the electrode to the semiconductor material of the semiconductor nanowire is dominated by the contact to the top surface of the semiconductor nanowire.
Type:
Grant
Filed:
December 21, 2012
Date of Patent:
April 21, 2015
Assignee:
Sol Voltaics AB
Inventors:
Ingvar Åberg, Martin Magnusson, Damir Asoli, Lars Ivar Samuelson, Jonas Ohlsson
Abstract: A solid-state imaging device according to embodiments of the present disclosure includes a light receiving unit, a first charge holding film, and a second charge holding film. The light receiving unit converts the incident light to an electric current. The first charge holding film is formed above the light receiving unit and holds electric charges. The second charge holding film is formed on the first charge holding film and holds electric charges. Further, concentration of oxygen in the second charge holding film is higher than concentration of oxygen in the first charge holding film.
Abstract: An infrared sensor device includes at least one sensor element formed in a semiconductor substrate, an SOI wafer that defines a gap below and around the sensor element, and a suspension device that is configured to suspend the sensor element in the SOI wafer. The sensor element is substantially arranged below the suspension device, thereby achieving a high sensitivity, low thermal capacity, low thermal coupling to the substrate and a high image refresh rate.
Abstract: A hollow cathode system, a device and a method for the plasma-assisted treatment of substrates includes at least one hollow cathode, which can be connected to a power supply. The hollow cathode includes an electrically conducting main body with an opening which is bounded by ribs, follows a spiral or meandering path and allows a gas to pass through in a direction perpendicular to a surface of the main body. Connecting bridge elements are provided on the ribs. The bridge elements serve ensure mechanical stability of the hollow cathode and optimize potential distribution of the hollow cathode. With the hollow cathode system, high treatment rates are achieved for homogeneous treatment of substrates of a large surface area with high plasma stability.
Type:
Application
Filed:
October 15, 2014
Publication date:
April 16, 2015
Applicant:
VON ARDENNE GMBH
Inventors:
Konrad DYBEK, Frank STAHR, Klaus SCHADE
Abstract: A circuit layer is formed on a surface of a substrate and includes a transistor. A photoelectric conversion element includes a photoelectric conversion layer of a chalcopyrite-type semiconductor provided between a first electrode and a second electrode. A supply layer is formed between the circuit layer and the photoelectric conversion layer and contains an Ia group element. Diffusion of the Ia group element to the photoelectric conversion layer improves the photoelectric conversion efficiency. A protective layer is formed between the supply layer and the circuit layer and prevents the diffusion of the Ia group element to the circuit layer.
Abstract: A solar cell according to an embodiment of the invention includes a substrate configured to have a plurality of via holes and a first conductive type, an emitter layer placed in the substrate and configured to have a second conductive type opposite to the first conductive type, a plurality of first electrodes electrically coupled to the emitter layer, a plurality of current collectors electrically coupled to the first electrodes through the plurality of via holes, and a plurality of second electrodes electrically coupled to the substrate. The plurality of via holes includes at least two via holes having different angles.
Type:
Grant
Filed:
September 14, 2012
Date of Patent:
April 7, 2015
Assignee:
LG Electronics Inc.
Inventors:
Daehee Jang, Jihoon Ko, Juwan Kang, Jonghwan Kim
Abstract: Method for manufacturing a microelectronic device from a first substrate (10), including the production of at least one electronic component in the semi-conductor substrate after transferring the first substrate (10) onto a second substrate (20), characterized in that it comprises: a first phase carried out prior to the transfer, and including forming at least one pattern made of a sacrificial material in a layer of the first substrate (10), a second phase carried out after the transfer and including the substitution of the electronic component for the pattern.
Type:
Grant
Filed:
April 11, 2012
Date of Patent:
March 31, 2015
Assignee:
Commissariat a l'Energie Atomique et aux Energies Alternatives
Abstract: An infrared sensor array with interconnection type, comprises a substrate, a plurality of circuit units, and a plurality of infrared sensing modules. The substrate defines several sensing segments. Each sensing segment has a base portion, a connecting portion, and a testing portion. The connecting portion is arranged between the base portion and the testing portion. The circuit units are respectively formed on the sensing segments. Each circuit unit has a base circuit, a connecting circuit, and a testing circuit. The connecting circuit electrically connects to the base circuit and the testing circuit. Each base circuit is formed on each base portion, each connecting circuit is formed on each connecting portion, and each testing circuit is formed on each testing portion. The infrared sensing modules are respectively disposed on the base portions and electrically connected to the base circuits.
Abstract: A method for fabricating an organic photovoltaic cell includes providing a first electrode; depositing a series of at least seven layers onto the first electrode, each layer consisting essentially of a different organic semiconductor material, the organic semiconductor material of at least an intermediate layer of the sequence being a photoconductive material; and depositing a second electrode onto the sequence of at least seven layers. One of the first electrode and the second electrode is an anode and the other is a cathode. The organic semiconductor materials of the series of at least seven layers are arranged to provide a sequence of decreasing lowest unoccupied molecular orbitals (LUMOs) and a sequence of decreasing highest occupied molecular orbitals (HOMOs) across the series from the anode to the cathode.
Type:
Grant
Filed:
August 13, 2013
Date of Patent:
March 31, 2015
Assignees:
The Trustees of Princeton University, The Regents of the University of Michigan
Inventors:
Barry Rand, Stephen R. Forrest, Diane Pendergrast Burk
Abstract: Exemplary embodiments of a method for producing a semiconductor component having a polycrystalline semiconductor body region are disclosed, wherein the polycrystalline semiconductor body region is produced between the first and second surfaces of the semiconductor body in a semiconductor component section, wherein an electromagnetic radiation having a wavelength of at least 1064 nm is introduced into the semiconductor body in a manner focused onto a position in the semiconductor component section of the semiconductor body and wherein the power density of the radiation at the position is less than 1×108 W/cm2.
Type:
Grant
Filed:
February 28, 2012
Date of Patent:
March 31, 2015
Assignee:
Infineon Technologies Austria AG
Inventors:
Manfred Schneegans, Carsten Ahrens, Adolf Koller, Gerald Lackner, Anton Mauder, Hans-Joachim Schulze
Abstract: A method comprises implanting ions in a substrate to form a plurality of photo diodes, forming an interconnect layer over a first side of the substrate and applying a first halogen treatment process to a second side of the substrate and forming a first silicon-halogen compound layer over the second side of the substrate as a result of applying the first halogen treatment process.
Type:
Application
Filed:
November 19, 2014
Publication date:
March 26, 2015
Inventors:
Shiu-Ko JangJian, Chin-Nan Wu, Chun Che Lin
Abstract: Methods of forming emitters for back-contact solar cells are described. In one embodiment, a method includes forming a first solid-state dopant source above a substrate. The first solid-state dopant source includes a plurality of regions separated by gaps. Regions of a second solid-state dopant source are formed above the substrate by printing.
Type:
Application
Filed:
November 26, 2014
Publication date:
March 26, 2015
Inventors:
Bo Li, Peter J. Cousins, David D. Smith
Abstract: A method includes forming a blocking layer over a substrate, and etching the blocking layer to form a trench in the blocking layer. A dielectric layer is formed, wherein the dielectric layer comprises a first portion over the blocking layer, and a second portion in the trench. After the step of forming the dielectric layer, an implantation is performed to implant an impurity into the substrate to form a deep well region. After the implantation, the dielectric layer and the blocking layer are removed.
Abstract: A method for making a solar cell is disclosed. In accordance with the method of the present invention a composite wafer is formed. The composite layer includes a single crystal silicon wafer, a silicon-based device layer and sacrificial porous silicon sandwiched therebetween. The composite wafer is treated to an aqueous etchant maintained below ambient temperatures to selectively etch the sacrificial porous silicon and release or undercut the silicon-based layer from the single crystal silicon wafer. The released silicon device layer is attached to a substrate to make a solar cell and the released single crystal silicon wafer is reused to make additional silicon device layer.
Abstract: An organic photovoltaic cell includes an anode and a cathode, and a plurality of organic semiconductor layers between the anode and the cathode. At least one of the anode and the cathode is transparent. Each two adjacent layers of the plurality of organic semiconductor layers are in direct contact. The plurality of organic semiconductor layers includes an intermediate layer consisting essentially of a photoconductive material, and two sets of at least three layers. A first set of at least three layers is between the intermediate layer and the anode. Each layer of the first set consists essentially of a different organic semiconductor material having a higher LUMO and a higher HOMO, relative to the material of an adjacent layer of the plurality of organic semiconductor layers closer to the cathode. A second set of at least three layers is between the intermediate layer and the cathode.
Type:
Grant
Filed:
July 14, 2006
Date of Patent:
March 24, 2015
Assignees:
The Regents of the University of Michigan, The Trustees of Princeton University
Inventors:
Barry Rand, Stephen R. Forrest, Diana Pendergrast Burk
Abstract: A photoelectric conversion device with improved electric characteristics is provided. The photoelectric conversion device has a structure in which a window layer is formed by a stack of a first silicon semiconductor layer and a second silicon semiconductor layer, and the second silicon semiconductor layer has high carrier concentration than the first silicon semiconductor layer and has an opening. Light irradiation is performed on the first silicon semiconductor layer through the opening without passing through the second silicon semiconductor layer; thus, light absorption loss in the window layer can be reduced.
Type:
Grant
Filed:
September 27, 2012
Date of Patent:
March 24, 2015
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
Abstract: A method for fabricating a solar cell generally comprises delivering a solar cell substructure to a chamber. Electromagnetic radiation is generated using a wave generating device that is coupled to the chamber such that the wave generating device is positioned proximate to the solar cell substructure. The electromagnetic radiation is applied onto at least a portion of the solar cell substructure to facilitate the diffusion of at least one metal element through at least a portion of the solar cell substructure such that a semiconductor interface is formed between at least two different types of semiconductor materials of the solar cell substructure.
Abstract: Disclosed is a dye-sensitized solar cell which includes a conductive substrate, a counter substrate facing the conductive substrate, an electrolyte disposed between the conductive substrate and the counter substrate, and an annular sealing portion surrounding the electrolyte together with the conductive substrate and the counter substrate and connecting the conductive substrate and the counter substrate. The sealing portion has an inorganic sealing portion fixed to the conductive substrate and a resin sealing portion fixed to the counter substrate. The inorganic sealing portion has a main body portion provided on the conductive substrate and a protruding portion extending from the main body portion toward a side opposite to the conductive substrate, and the resin sealing portion has an adhesive portion adhering the main body portion to the counter substrate and adhered to a side surface along an extending direction of the protruding portion.
Abstract: Provided are a solar cell and a method of manufacturing the same. The method includes: preparing a bottom substrate including sequentially stacked first and second portions, each of the first and second portions including a plurality of grains, wherein the maximum grain size of the second portion is less than the minimum grains size of the first portion; exposing the first portion of the bottom substrate by removing the second portion of the bottom substrate; and forming a photovoltaic conversion layer on the first portion of the bottom substrate.
Type:
Grant
Filed:
May 16, 2014
Date of Patent:
March 17, 2015
Assignee:
Electronics and Telecommunications Research Institute
Abstract: An electrical circuit includes a solar cell that has a photovoltaically active front side and a back side. An electronic or micromechanical component is arranged on the back side of the solar cell and is electrically connected to the photovoltaically active front side of the solar cell by a contact-making structure. The electrical circuit also includes a transparent first protective layer that is arranged on the photovoltaically active front side of the solar cell. The contact-making structure has a first contact-making section that is arranged on a front side of the first protective layer facing away from the solar cell.
Type:
Grant
Filed:
December 26, 2013
Date of Patent:
March 17, 2015
Assignee:
Robert Bosch GmbH
Inventors:
Ricardo Ehrenpfordt, Mathias Bruendel, Daniel Pantel, Frederik Ante, Johannes Kenntner
Abstract: Provided is a method for manufacturing a light emitting device comprising a light emitting element and an optical part, the method comprising the steps of (i) forming a hydroxyl film on a bonding surface of each of the light emitting element and the optical part by an atomic layer deposition, and (ii) bonding the bonding surfaces of the light emitting element and the optical part with each other, each of the bonding surfaces having the hydroxyl film formed thereon, wherein a substep is repeated at least one time in the step (i), in which substep a first raw material gas and a second raw material gas are sequentially supplied onto the bonding surfaces of the light emitting element and the optical part, and wherein the bonding of the bonding surfaces in the step (ii) is performed without a heating treatment.
Abstract: A manufacturing method of a semiconductor device according to embodiments includes forming a photodiode layer, which is an active region including a photodiode, on a main surface of a first substrate, forming a wiring layer, which includes a wire and a dielectric layer covering the wire, on the photodiode layer, and forming a dielectric film on the wiring layer. The manufacturing method of the semiconductor device according to the embodiments further includes bonding a second substrate to the dielectric film of the first substrate so that a crystal orientation of the photodiode layer matches a crystal orientation of the second substrate.
Abstract: A method for forming a sensor includes forming a base-region barrier in contact with a base substrate. The base-region barrier includes a monocrystalline semiconductor having a same dopant conductivity as the base substrate. An emitter and a collector are formed in contact with and on opposite sides of the base-region barrier to form a bipolar junction transistor. The collector, the emitter and the base-region barrier are planarized to form a level surface opposite the base substrate such that when the level surface is exposed to charge, the charge is measured during operation of the bipolar junction transistor.
Type:
Grant
Filed:
August 3, 2012
Date of Patent:
March 17, 2015
Assignee:
International Business Machines Corporation
Inventors:
Jin Cai, Tak H. Ning, Jeng-Bang Yau, Sufi Zafar
Abstract: According to one embodiment, there is provided a method for manufacturing a photovoltaic cell. The method includes forming a structure including a pair of electrodes which are arranged apart from each other, and a hetero-junction type photoelectric conversion layer interposed between the electrodes and containing a p-type semiconductor and a n-type semiconductor, and annealing the photoelectric conversion layer thermally while applying an AC voltage having a frequency of 0.01 kHz or more and less than 1 kHz to control a mixed state of the p-type semiconductor and n-type semiconductor in the photoelectric conversion layer.
Abstract: The invention relates to a device for depositing a layer made of at least two components on an object, with a deposition chamber for disposing the object, at least one source with material to be deposited, as well as at least one device for controlling the deposition process, implemented such that the concentration of at least one component of the material to be deposited can be modified in its gas phase prior to deposition on the substrate by selective binding of a specified quantity of the at least one component, wherein the selectively bound quantity of the at least one component can be controlled by modifying at least one control parameter that is actively coupled to a binding rate or the component. It further relates to a device for depositing a layer made of at least two components on an object, wherein a device for controlling the deposition process has at least one gettering element made of a reactive material, wherein the reactive material includes copper and/or molybdenum.
Type:
Application
Filed:
September 16, 2014
Publication date:
March 12, 2015
Applicant:
SAINT-GOBAIN GLASS FRANCE
Inventors:
Joerg PALM, Stephan POHLNER, Stefan JOST, Thomas HAPP
Abstract: A solar cell includes polysilicon P-type and N-type doped regions on a backside of a substrate, such as a silicon wafer. A trench structure separates the P-type doped region from the N-type doped region. Each of the P-type and N-type doped regions may be formed over a thin dielectric layer. The trench structure may include a textured surface for increased solar radiation collection. Among other advantages, the resulting structure increases efficiency by providing isolation between adjacent P-type and N-type doped regions, thereby preventing recombination in a space charge region where the doped regions would have touched.
Abstract: A photovoltaic device includes a substrate, a first electrode, a second electrode, and an active layer between the first electrode and the second electrode. The active layer comprises a polyarylamine biscarbonate ester of Formula (I): wherein Ar1, Ar2, Ar3, Ar4, R, m, y, and n are as described herein. The photovoltaic device can be fabricated in an ambient environment and does not need significant processing.
Type:
Grant
Filed:
February 15, 2011
Date of Patent:
March 10, 2015
Assignee:
Xerox Corporation
Inventors:
Liang-Bih Lin, George Cunha Cardoso, Amanda Elizabeth Preske, Krishna Balantrapu
Abstract: A method of forming of a semiconductor structure has isolation structures. A substrate having a first region and a second region is provided. The first region and the second region are implanted with neutral dopants to form a first etching stop feature and a second stop feature in the first region and the second region, respectively. The first etching stop feature has a depth D1 and the second etching stop feature has a depth D2. D1 is less than D2. The substrate in the first region and the second region are etched to form a first trench and a second trench respectively. The first trench and the second trench land on the first etching stop feature and the second etching stop feature, respectively.
Abstract: Processes for suppressing minority carrier lifetime degradation in silicon wafers are disclosed. The processes involve quench cooling the wafers to increase the density of nano-precipitates in the silicon wafers and the rate at which interstitial atoms are consumed by the nano-precipitates.
Abstract: A tape capable of laser ablation may be used in the formation of microelectronic interconnects, wherein the tape may be attached to bond pads on a microelectronic device and vias may be formed by laser ablation through the tape to expose at least a portion of corresponding bond pads. The microelectronic interconnects may be formed on the bond pads within the vias, such as by solder paste printing and solder reflow. The laser ablation tape can be removed after the formation of the microelectronic interconnects.
Type:
Grant
Filed:
May 10, 2013
Date of Patent:
March 3, 2015
Assignee:
Intel Corporation
Inventors:
Xavier F. Brun, Takashi Kumamoto, Sufi Ahmed
Abstract: In an apparatus for manufacturing a dye-sensitized solar cell, a photosensitization dye solution makes contact with an electrode material layer that functions as a working electrode of a dye-sensitized solar cell so that the photosensitizing dye is adsorbed on the layer. Such an apparatus for manufacturing a dye-sensitized solar cell has a substrate housing section to house a substrate with the electrode material layer formed on its surface, and a circulation mechanism to circulate the photosensitization dye solution in such a way that the solution passes a surface of the substrate housed in the substrate housing section. In such an apparatus, a cross-sectional area of a flow path for the photosensitization dye solution in a portion facing the substrate in the substrate housing section is set smaller than a cross-sectional area of a flow path for the photosensitization dye solution in other portions.
Type:
Grant
Filed:
February 24, 2011
Date of Patent:
March 3, 2015
Assignees:
Tokyo Electron Limited, Kyushu Institute of Technolgy
Abstract: A back side illumination photodiode includes a light-receiving back side surface of a semiconductor material substrate. An area of the light-receiving back side surface includes a recess. The recess is filled with a material having an optical index that is lower than an optical index of the semiconductor material substrate. Both the substrate and the filling material are transparent to an operating wavelength of the photodiode. The recess may be formed to have a ring shape.
Type:
Application
Filed:
August 21, 2014
Publication date:
February 26, 2015
Applicants:
Commissariat A L'Energie Atomique et aux Energies Alternatives, STMICROELECTRONICS SA
Abstract: A Method for making a separation between an active zone of a substrate located on its front face from a given portion of the substrate located on its back face, wherein trenches and cavities wider than the trenches are formed to extend said trenches, such that at least one given cavity formed to extend a given trench is adjacent to another cavity, and when the cavities have been filled with a given material, they form a separation zone between said active zone and a given portion of the substrate that will be removed later.
Type:
Application
Filed:
July 29, 2014
Publication date:
February 26, 2015
Applicant:
COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT
Abstract: A method for introducing species into a strained semiconductor layer comprising: providing a substrate comprising a first region comprising an exposed strained semiconductor layer, loading the substrate in a reaction chamber, then forming a conformal first species containing-layer by vapor phase deposition (VPD) at least on the exposed strained semiconductor layer, and thereafter performing a thermal treatment, thereby diffusing at least part of the first species from the first species-containing layer into the strained semiconductor layer and activating at least part of the diffused first species in the strained semiconductor layer.
Abstract: A stack of a first anti-reflective coating (ARC) layer and a titanium layer is formed on a front surface of a semiconductor substrate including a p-n junction, and is subsequently patterned so that a semiconductor surface is physically exposed in metal contact regions of the front surface of the semiconductor substrate. The remaining portion of the titanium layer is converted into a titania layer by oxidation. A metal layer is plated on the metal contact regions, and a copper line is subsequently plated on the metal layer or a metal semiconductor alloy derived from the metal layer. A second ARC layer is deposited over the titania layer and the copper line, and is subsequently patterned to provide electrical contact to the copper line.
Type:
Grant
Filed:
June 27, 2012
Date of Patent:
February 24, 2015
Assignee:
International Business Machines Corporation
Inventors:
Satyavolu S. Papa Rao, Kathryn C. Fisher, Harold J. Hovel, Qiang Huang, Susan Huang, Young-Hee Kim
Abstract: A method for forming a back-side illuminated image sensor, including the steps of: a) forming, from the front surface, doped polysilicon regions, of a conductivity type opposite to that of the substrate, extending in depth orthogonally to the front surface and emerging into the first layer; b) thinning the substrate from its rear surface to reach the polysilicon regions, while keeping a strip of the first layer; c) depositing, on the rear surface of the thinned substrate, a doped amorphous silicon layer, of a conductivity type opposite to that of the substrate; and d) annealing at a temperature capable of transforming the amorphous silicon layer into a crystallized layer.
Type:
Grant
Filed:
April 7, 2014
Date of Patent:
February 24, 2015
Assignees:
STMicroelectronics S.A., STMicroelectronics (Crolles 2) SAS
Abstract: The present invention provides an image sensor and a fabricating method of the image sensor. The image sensor comprises: a first type epitaxial layer, a photodiode region, a first type well region, a gate region of a source follower transistor, and a first type implant isolation region. The first type well region is formed within the first type epitaxial layer with a first horizontal distance to the photodiode region and a vertical distance to a surface of the first type epitaxial layer. The gate region of a source follower transistor is formed on the surface of the first type epitaxial layer and above the first type well region, and has a second horizontal distance to the photodiode region. There is a distance between the first type implant isolation region and the first type well region as an anti-blooming path.
Type:
Application
Filed:
March 12, 2014
Publication date:
February 19, 2015
Applicant:
Himax Imaging, Inc.
Inventors:
Yang Wu, Feixia Yu, Inna Patrick, Yu Hin Desmond Cheung
Abstract: Disclosed is a solar cell including a support substrate, a barrier layer on the support substrate, and a photo-electro conversion part on the barrier layer.
Abstract: An optical sensor, according to an embodiment of the present invention, includes a photodetector region and a plurality of slats over the photodetector region. In an embodiment, the slats are made up of a plurality of metal layers connected in a stacked configuration with a plurality of metal columns. The metal columns can be made of metal vias, metal contacts and/or metal plugs. In an embodiment, the slats are angled relative to a surface of the photodetector region, wherein the angling of the slats is achieved by the metal layers being laterally offset relative to one another and/or metal columns being laterally offset relative to one another. In an alternative embodiment, the slats are made of an opaque polymer material, such as an opaque photoresist.
Abstract: A method for depositing particles on a substrate, or a running substrate, including: (a) producing at least one first compact film of particles floating on a carrier liquid provided in a transfer area having an outlet of particles arranged facing the substrate; (b) producing at least one pattern by depositing a substance on the first film in the transfer area, along a contour of the pattern, the substance maintaining the particles of the film together in contact with the substance; (c) removing at least one portion of the particles of the first film located interiorly relatively to the contour, or exteriorly relatively to the contour; and then (d) transferring patterns onto the substrate through the outlet of particles.
Type:
Application
Filed:
February 8, 2013
Publication date:
February 12, 2015
Applicant:
Commissariat a l'energie atomique et aux ene alt
Inventors:
Olivier Dellea, Philippe Coronel, Simon Frederic Desage, Pascal Fugier
Abstract: A method for solar cell fabrication is provided. The method includes etching a doped surface of a silicon wafer solar cell using a solution including potassium hydroxide (KOH) and sodium hypochlorite (NaOCl). Alternatively the solution could include sodium hydroxide (NaOH) and NaOCl. In one aspect, the step of back-etching an emitter of the solar cell using the KOH:NaOCl solution is simultaneously performed with porous silicon removal. In another aspect, the step of back-etching the emitter of the solar cell using the KOH:NaOCl solution also includes PSG removal. And in yet another aspect, the step of back-etching the emitter of the solar cell using the KOH:NaOCl solution is performed simultaneously with polishing.
Type:
Application
Filed:
May 9, 2013
Publication date:
February 12, 2015
Applicant:
NATIONAL UNIVERSITY OF SINGAPORE
Inventors:
Prabir Kanti Basu, Matthew Benjamin Boreland, Debajyoti Sarangi, Vinodh Shanmugam
Abstract: High efficiency silicon solar cells, including IBC cells, may be formed from lightly doped p-n sandwich structures fabricated in-situ by epitaxial growth. For example, the solar cell may comprise: an n-type silicon layer greater than or equal to 20 microns thick, with a dopant concentration between 1E15/cm3 and 5E16/cm3 and a bulk silicon carrier lifetime greater than 50 microseconds; a p-type silicon layer greater than 10 microns thick, with a dopant concentration between 1E16/cm3 and 5E18/cm3, and a bulk silicon carrier lifetime greater than 10 microseconds; wherein the n-type and p-type silicon layers were fabricated by epitaxial deposition, one after the other, on a reusable single crystal silicon substrate. The ideality factor of the silicon solar cell may be approximately 1.0. The epitaxial deposition may be in a reactor with low auto-doping and low oxygen incorporation.