Having Diverse Electrical Device Patents (Class 438/59)
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Patent number: 8461590Abstract: An adverse effect of parasitic capacitance on optical data output from a photodetector circuit is suppressed. A photodetector circuit includes a photoelectric conversion element; a first field-effect transistor; a second field-effect transistor; a first conductive layer functioning as a gate of the first field-effect transistor; an insulating layer provided over the first conductive layer; a semiconductor layer overlapping with the first conductive layer with the insulating layer interposed therebetween; a second conductive layer electrically connected to the semiconductor layer; and a third conductive layer electrically connected to the semiconductor layer, whose pair of side surfaces facing each other overlaps with at least one conductive layer including the first conductive layer with the insulating layer interposed therebetween, and which functions as the other of the source and the drain of the first field-effect transistor.Type: GrantFiled: December 7, 2011Date of Patent: June 11, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hikaru Tamura, Yoshiyuki Kurokawa, Takayuki Ikeda
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Patent number: 8450780Abstract: Disclosed is a solid-state image sensor including a photoelectric converter, a charge detector, and a transfer transistor. The photoelectric converter stores a signal charge that is subjected to photoelectric conversion. The charge detector detects the signal charge. The transfer transistor transfers the signal charge from the photoelectric converter to the charge detector. In the solid-state image sensor, the transfer transistor includes a gate insulating film, a gate electrode formed on the gate insulating film, a first spacer formed on a sidewall of the gate electrode on a side of the photoelectric converter, and a second spacer formed on another sidewall of the gate electrode on a side of the charge detector. The first spacer is longer than the second spacer.Type: GrantFiled: January 13, 2010Date of Patent: May 28, 2013Assignee: Sony CorporationInventor: Tetsuya Oishi
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Patent number: 8445314Abstract: A structure and method operable to create a reusable template for detachable thin semiconductor substrates is provided. The template has a shape such that the 3-D shape is substantially retained after each substrate release. Prior art reusable templates may have a tendency to change shape after each subsequent reuse; the present disclosure aims to address this and other deficiencies from the prior art, therefore increasing the reuse life of the template.Type: GrantFiled: May 24, 2010Date of Patent: May 21, 2013Assignee: Solexel, Inc.Inventors: Suketu Parikh, David Dutton, Pawan Kapur, Somnath Nag, Mehrdad Moslehi, Joe Kramer, Nevran Ozguven, Asli Buccu Ucok
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Patent number: 8445981Abstract: Magnetic memory devices, electronic systems and memory cards including the same, methods of manufacturing the same, and methods of forming perpendicular magnetic films are provided. The magnetic memory device may include a seed pattern on a substrate having a first crystal structure, a perpendicular magnetic pattern on the seed pattern having a second crystal structure, and an interlayer pattern between the seed pattern and the perpendicular magnetic pattern. The interlayer pattern may reduce a stress caused by a difference between horizontal lattice constants of the first and the second crystal structures.Type: GrantFiled: July 6, 2011Date of Patent: May 21, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Woo Chang Lim, Jangeun Lee, SeChung Oh, Woojin Kim
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Patent number: 8435823Abstract: According to one embodiment, a method of manufacturing a back-illuminated solid-state imaging device including forming a mask with apertures corresponding to a pixel pattern on the surface of a semiconductor layer, implanting second-conductivity-type impurity ions into the semiconductor layer from the front side of the layer to form second-conductivity-type photoelectric conversion parts and forming a part where no ion has been implanted into a pixel separation region, forming at the surface of the semiconductor layer a signal scanning circuit for reading light signals obtained at the photoelectric conversion parts after removing the mask, and removing the semiconductor substrate and a buried insulating layer from the semiconductor layer after causing a support substrate to adhere to the front side of the semiconductor layer.Type: GrantFiled: August 2, 2010Date of Patent: May 7, 2013Assignee: Kabushiki Kaisha ToshibaInventor: Hirofumi Yamashita
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Patent number: 8426238Abstract: A method for manufacturing a solid-state image pickup device is provided. A first pixel isolation member is formed in a semiconductor substrate including pixels by implanting impurity ions in a first region of the substrate to separate pixels in the first region from each other when viewed from a surface of the substrate. A second pixel isolation member is also formed in the substrate by forming a trench in a second region of the substrate different from the first region to separate pixels in the second region from each other, and filling the trench with an electroconductive material harder to polish by CMP than the substrate. The thickness of the substrate is reduced by CMP on a rear surface of the substrate using the second pixel isolation member as a stopper.Type: GrantFiled: September 28, 2010Date of Patent: April 23, 2013Assignee: Sony CorporationInventors: Kenichi Nishizawa, Hiroshi Takahashi
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Patent number: 8420432Abstract: Provided is a method of forming a semiconductor device. The method includes forming an insulating film on a semiconductor substrate, a conductive film on the insulating film, and a first structure and a second structure on the conductive film. The semiconductor substrate has first and second regions. The first and second structures are formed on the first and second regions, respectively. An impurity diffused region is formed in the semiconductor substrate using the first structure as a mask. The impurity diffused region overlaps the first structure. A portion of the first structure, and the conductive film are etched to respectively form a gate structure and a capacitor structure on the first and second regions.Type: GrantFiled: September 8, 2011Date of Patent: April 16, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Jong-Won Choi, Jun-Seok Yang, Keon-Yong Cheon, Sung-Hyun Yoon
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Patent number: 8415194Abstract: A photovoltaic device including a rear electrode which may also function as a rear reflector. In certain example embodiments of this invention, the rear electrode includes a metallic based reflective film that is oxidation graded, so as to be more oxided closer to a rear substrate (e.g., glass substrate) supporting the electrode than at a location further from the rear substrate. In other words, the rear electrode is oxidation graded so as to be less oxided closer to a semiconductor absorber of the photovoltaic device than at a location further from the semiconductor absorber in certain example embodiments. In certain example embodiments, the interior surface of the rear substrate may optionally be textured so that the rear electrode deposited thereon is also textured so as to provide desirable electrical and reflective characteristics. In certain example embodiments, the rear electrode may be of or include Mo and/or MoOx, and may be sputter-deposited using a combination of MoOx and Mo sputtering targets.Type: GrantFiled: December 20, 2010Date of Patent: April 9, 2013Assignee: Guardian Industries Corp.Inventors: Alexey Krasnov, Willem den Boer, Scott V. Thomsen, Leonard L. Boyer, Jr.
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Patent number: 8409903Abstract: An image sensor comprises a substrate of a first conductivity type. First and second pixels are arrayed over the substrate. A potential barrier is formed in a region of the substrate corresponding to the first pixel but not in a region of the substrate corresponding to the second pixel. The second pixel is responsive to a color having a wavelength longer than the color to which the first pixel is responsive. The potential barrier is doped with dopants by a high energy ion implantation dopants or by an ion implantation or diffusion during epitaxial growth of the P-type epitaxial layer.Type: GrantFiled: March 31, 2011Date of Patent: April 2, 2013Assignee: Intellectual Ventures II L.L.C.Inventor: Jaroslav Hynecek
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Patent number: 8410352Abstract: The invention relates to a method of fabricating photovoltaic cells in which at least one layer of semiconductor material is deposited continuously on a carbon ribbon (10) to form a composite ribbon (20), said layer having a free face (22, 24) opposite from its face in contact with the carbon ribbon. According to the invention, at least one treatment (28) is applied to the layer of semiconductor material, from said free face (22, 24), in order to implement photovoltaic functions of the cells on said layer, prior to eliminating the carbon ribbon (10). The invention makes it possible to increase productivity in the fabrication of photovoltaic cells, which cells can be of very small thicknesses.Type: GrantFiled: December 8, 2005Date of Patent: April 2, 2013Assignee: SolarforceInventors: Christian Belouet, Claude Remy
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Patent number: 8410493Abstract: A semiconductor device sends and receives electrical signals. The semiconductor device includes a first substrate provided with a first circuit region containing a first circuit; a multi-level interconnect structure provided on the first substrate; a first inductor provided in the multi-level interconnect structure so as to include the first circuit region; and a second inductor provided in the multi-level interconnect structure so as to include the first circuit region, wherein one of the first inductor and the second inductor is connected to the first circuit and the other of the first inductor and the second inductor is connected to a second circuit.Type: GrantFiled: March 11, 2010Date of Patent: April 2, 2013Assignee: Renesas Electronics CorporationInventor: Yasutaka Nakashiba
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Patent number: 8410533Abstract: A semiconductor device includes a semiconductor substrate having at least one surface provided with a semiconductor element, wherein the semiconductor substrate includes a region of a first conductivity type, the region being formed in a surface layer portion of the semiconductor substrate; a first diffusion region of a second conductivity type, the first diffusion region having a first impurity concentration and being formed in the surface layer portion, and a pn junction being formed between the first diffusion region and the region of the first conductivity type; and a first metal silicide film formed on part of a portion of the surface corresponding to the first diffusion region.Type: GrantFiled: July 9, 2010Date of Patent: April 2, 2013Assignee: Fujitsu Semiconductor LimitedInventor: Masaya Katayama
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Patent number: 8404513Abstract: A method for generating electric power including the steps of: (a) preparing a solar cell having a condensing lens and a solar cell element, wherein the solar cell element includes an n-type GaAs layer, a p-type GaAs layer, a quantum tunneling layer, an n-type InGaP layer, a p-type InGaP layer, a p-type window layer, an n-side electrode, and a p-side electrode, and satisfies the following equation (I): d2<d1, d3<d1, nanometer?d2?4 nanometers, 1 nanometer?d3?4 nanometers, d5<d4, d6<d4, 1 nanometer?d5?5 nanometers, 1 nanometer?d6?5 nanometers, 100 nanometers?w2, 100 nanometers?w3, 100 nanometers?w4, and 100 nanometers?w5. . . (I); and (b) irradiating a region S which is included in the surface of the p-type window layer through the condensing lens with light to satisfy the following equation (II) in order to generate a potential difference between the n-side electrode and the p-side electrode: w6?w1. . . (II).Type: GrantFiled: June 1, 2012Date of Patent: March 26, 2013Assignee: Panasonic CorporationInventors: Akio Matsushita, Akihiro Itoh, Tohru Nakagawa, Hidetoshi Ishida
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Patent number: 8404510Abstract: A method for forming a CMOS image sensing pixel, which is configured to determine a color, includes providing an n-type substrate that includes a first thickness and a first width. The method also includes forming a p-type layer, the p-type layer overlaying the n-type substrate. The p-type layer includes a second thickness and a second width. The second thickness and the second width are associated with a light characteristic. The method additionally includes forming an n-type layer, the n-type layer overlaying the p-type layer. The n-type layer includes a third thickness and a third width. In addition, the method includes forming a pn junction between the p-type layer and the n-type layer. The pn junction includes a fourth width. The method also includes providing a control circuit. The control circuit is electrically coupled to the n-type substrate.Type: GrantFiled: November 23, 2010Date of Patent: March 26, 2013Assignee: Semiconductor Manufacturing International (Shanghai) CorporationInventors: Hong Zhu, Jim Yang
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Patent number: 8389319Abstract: A method of manufacturing a CMOS image sensor is disclosed. A silicon-on-insulator substrate is provided, which includes providing a silicon-on-insulator substrate including a mechanical substrate, an insulator layer substantially overlying the mechanical substrate, and a seed layer substantially overlying the insulator layer. A semiconductor substrate is epitaxially grown substantially overlying the seed layer. The mechanical substrate and at least a portion of the insulator layer are removed. An ultrathin oxide layer is formed substantially underlying the semiconductor substrate. A mono layer of metal is formed substantially underlying the ultrathin oxide layer.Type: GrantFiled: July 27, 2010Date of Patent: March 5, 2013Assignee: SRI InternationalInventor: James Robert Janesick
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Patent number: 8390093Abstract: A galvanic isolation system provides galvanic isolation in digital transfer integrated circuits by using conductivity modulation of the semiconductor substrate. Modulation of the conductivity of the substrate affects eddy current losses of a (differential) RF inductor that is isolated from the substrate by a sufficient amount of dielectric material, which provides a basis for signal transfer from the modulated substrate to the inductor across the isolation barrier.Type: GrantFiled: September 12, 2011Date of Patent: March 5, 2013Assignee: National Semiconductor CorporationInventors: Peter J. Hopper, Peter Smeys, William French, Andrei Papou, Aditi Dutt Chaudhuri
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Patent number: 8390043Abstract: A solid-state imaging device is provided. The solid-state imaging device includes a pixel section, a peripheral circuit section, a silicide blocking layer formed in the pixel section except for part or whole of an area above an isolation portion in the pixel section, and a metal-silicided transistor formed in the peripheral circuit section.Type: GrantFiled: August 9, 2010Date of Patent: March 5, 2013Assignee: Sony CorporationInventor: Keji Tatani
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Patent number: 8390025Abstract: A photodetector detects the absence or presence of light by detecting a change in the inductance of a coil. The magnetic field generated when a current flows through the coil passes through an electron-hole generation region. Charged particles in the electron-hole generation region come under the influence of the magnetic field, and generate eddy currents whose magnitudes depend on whether light is absent or present. The eddy currents generate a magnetic field that opposes the magnetic field generated by current flowing through the coil.Type: GrantFiled: January 11, 2011Date of Patent: March 5, 2013Assignee: National Semiconductor CorporationInventors: Ann Gabrys, Peter J. Hopper, William French, Kyuwoon Hwang
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Publication number: 20130049016Abstract: Discontinuous bonds for semiconductor devices are disclosed herein. A device in accordance with a particular embodiment includes a first substrate and a second substrate, with at least one of the first substrate and the second substrate having a plurality of solid-state transducers. The second substrate can include a plurality of projections and a plurality of intermediate regions and can be bonded to the first substrate with a discontinuous bond. Individual solid-state transducers can be disposed at least partially within corresponding intermediate regions and the discontinuous bond can include bonding material bonding the individual solid-state transducers to blind ends of corresponding intermediate regions. Associated methods and systems of discontinuous bonds for semiconductor devices are disclosed herein.Type: ApplicationFiled: August 29, 2011Publication date: February 28, 2013Applicant: MICRON TECHNOLOGY, INC.Inventors: Scott D. Schellhammer, Vladimir Odnoblyudov, Jeremy S. Frei
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Patent number: 8383447Abstract: A reverse image sensor module includes first and second semiconductor chips, and first and second insulation layers. The first semiconductor chip includes a first semiconductor chip body having a first surface and a second surface facing away from the first surface, photodiodes disposed on the first surface, and a wiring layer disposed on the second surface and having wiring lines electrically connected to the photodiodes and bonding pads electrically connected to the wiring lines. The second semiconductor chip includes a second semiconductor chip body having a third surface facing the wiring layer, and through-electrodes electrically connected to the bonding pads and passing through the second semiconductor chip body. The first insulation layer is disposed on the wiring layer, and the second insulation layer is disposed on the third surface of the second semiconductor chip body facing the first insulation layer and is joined to the first insulation layer.Type: GrantFiled: March 6, 2012Date of Patent: February 26, 2013Assignee: Hynix Semiconductor Inc.Inventor: Seung Taek Yang
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Patent number: 8383444Abstract: A method is provided for determining a color using a CMOS image sensor. The CMOS image sensor includes an n-type substrate and a p-type epitaxy layer overlying the n-type substrate. The method includes applying a first voltage on the n-type substrate and obtaining a first output, which is associated with the first voltage. The method further includes applying a second voltage on the n-type substrate and obtaining a second output, which is associated with the second voltage. The method additionally includes applying a third voltage on the n-type substrate and obtaining a third output, which is associated with the third voltage. The method also includes providing a plurality of weighting factors and determining the color based on the plurality of weighting factors, the first output, the second output, and the third output.Type: GrantFiled: November 23, 2010Date of Patent: February 26, 2013Assignee: Semiconductor Manufacturing International (Shanghai) CorporationInventors: Hong Zhu, Jim Yang
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Patent number: 8383446Abstract: A solid-state imaging device includes: a photoelectric conversion portion that receives an incident light from a back surface side of a silicon layer to perform photoelectric conversion on the incident light; and a pixel transistor portion that outputs signal charges generated in the photoelectric conversion portion towards a front surface side of the silicon layer, wherein a gettering layer having internal stress is provided on the front surface side of the silicon layer at a position to overlap the photoelectric conversion portion on a plan view layout thereof.Type: GrantFiled: August 15, 2012Date of Patent: February 26, 2013Assignee: Sony CorporationInventor: Chiaki Sakai
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Patent number: 8383445Abstract: A method and device for image sensing. The method includes forming a first well and a second well in a substrate, forming a gate oxide layer with at least a first part and a second part on the substrate, and depositing a first gate region and a second gate region on the gate oxide layer. The first part of the gate oxide layer is associated with a first thickness, and the second part of the gate oxide layer is associated with a second thickness. The first thickness and the second thickness are different. The first gate region is located on the first part of the gate oxide layer associated with the first thickness, while the second gate region is located on both the first part of the gate oxide layer associated with the first thickness and the second part of the gate oxide layer associated with the second thickness. The first gate region is associated with the first well, and the second gate region is associated with the second well.Type: GrantFiled: December 27, 2010Date of Patent: February 26, 2013Assignee: Semiconductor Manufacturing International (Shanghai) CorporationInventors: Roger Lee, Jianping Yang
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Patent number: 8368130Abstract: A method to fabricate an image sensor includes providing a semiconductor substrate having a pixel area and a logic area, forming a light sensing element in the pixel area, and forming a first transistor in the pixel area and a second transistor in the logic area. The step of forming the first transistor in the pixel area and the second transistor in the logic area includes performing a first implant process in the pixel area and the logic area, performing a second implant process in the pixel area and the logic area, and performing a third implant process only in the logic area.Type: GrantFiled: December 14, 2010Date of Patent: February 5, 2013Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Yao Ko, Chung-Wei Chang, Han-Chi Liu, Shou-Gwo Wuu
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Patent number: 8368162Abstract: The present disclosure provides a high-speed laser power converter (LPC). The LPC is able to be cascaded. The LPC has a high-speed photodiode (PD) performance even operated under a forward bias operational voltage. Thus, the present disclosure can generate power (instead of consume power) during high-speed data transmission in an optical interconnect (OI) system using 850 nano-meters (nm) wavelength vertical cavity surface-emitting laser (VCSEL).Type: GrantFiled: February 25, 2011Date of Patent: February 5, 2013Assignee: National Central UniversityInventors: Jin-Wei Shi, Feng-Ming Kuo
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Publication number: 20130029449Abstract: Non-silicon based semiconductor devices are integrated into silicon fabrication processes by using aspect-ratio-trapping materials. Non-silicon light-sensing devices in a least a portion of a crystalline material can output electrons generated by light absorption therein. Exemplary light-sensing devices can have relatively large micron dimensions. As an exemplary application, complementary-metal-oxide-semiconductor photodetectors are formed on a silicon substrate by incorporating an aspect-ratio-trapping technique.Type: ApplicationFiled: August 24, 2012Publication date: January 31, 2013Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Zhiyuan Cheng, James G. Fiorenza, Calvin Sheen, Anthony Lochtefeld
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Patent number: 8361818Abstract: A method of forming an optical sensor includes the following steps. A substrate is provided, and a read-out device is formed on the substrate. a first electrode electrically connected to the read-out device is formed on the substrate. a photosensitive silicon-rich dielectric layer is formed on the first electrode, wherein the photosensitive silicon-rich dielectric layer comprises a plurality of nanocrystalline silicon crystals. A second electrode is formed on the photosensitive silicon-rich dielectric layer.Type: GrantFiled: September 1, 2010Date of Patent: January 29, 2013Assignee: AU Optronics Corp.Inventors: An-Thung Cho, Chia-Tien Peng, Kun-Chih Lin
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Publication number: 20130023083Abstract: A method and device is disclosed for reducing noise in CMOS image sensors. An improved CMOS image sensor includes a light sensing structure surrounded by a support feature section. An active section of the light sensing structure is covered by no more than optically transparent materials. A light blocking portion includes an opaque layer or a black light filter layer in conjunction with an opaque layer, covering the support feature section. The light blocking portion may also cover a peripheral portion of the light sensing structure. The method for forming the CMOS image sensors includes using film patterning and etching processes to selectively form the opaque layer and the black light filter layer where the light blocking portion is desired, but not over the active section. The method also provides for forming microlenses over the photosensors in the active section.Type: ApplicationFiled: September 21, 2012Publication date: January 24, 2013Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventor: Taiwan Semiconductor Manufacturing Co., Ltd.
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Patent number: 8349638Abstract: To provide a solid-state imaging device able to improve light transmittance of a transparent insulation film in a light incident side of a substrate, suppress the dark current, and prevent a quantum efficiently loss, wherein a pixel circuit is formed in a first surface of the substrate and light is received from a second surface, and having: a light receiving unit formed in the substrate and for generating a signal charge corresponding to an amount of incidence light and storing it; a transparent first insulation film formed on the second surface; and a transparent second insulation film formed on the first insulation film and for retaining a charge having the same polarity as the signal charge in an interface of the first insulation film or in inside, thicknesses of the first and second insulation film being determined to obtain a transmittance higher than when using only the first insulation film.Type: GrantFiled: July 28, 2011Date of Patent: January 8, 2013Assignee: Sony CorporationInventors: Hideo Kanbe, Takayuki Ezaki
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Publication number: 20120319225Abstract: Embodiments of the present invention relate to photovoltaic cells. Specifically, the present invention relates to photovoltaic (PV) cells configurable for energy conversion and imaging. In a typical embodiment, each photovoltaic cell (PV) in the photovoltaic array is divided into a pixel-based array. Each photovoltaic cell is coupled to a set of switches and the photovoltaic cell is dynamically configured for energy conversion or imaging based on the settings of at least one of the switches.Type: ApplicationFiled: June 14, 2011Publication date: December 20, 2012Inventor: Moon J. Kim
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Publication number: 20120322193Abstract: A solid-state imaging device includes: a photoelectric conversion portion that receives an incident light from a back surface side of a silicon layer to perform photoelectric conversion on the incident light; and a pixel transistor portion that outputs signal charges generated in the photoelectric conversion portion towards a front surface side of the silicon layer, wherein a gettering layer having internal stress is provided on the front surface side of the silicon layer at a position to overlap the photoelectric conversion portion on a plan view layout thereof.Type: ApplicationFiled: August 15, 2012Publication date: December 20, 2012Applicant: SONY CORPORATIONInventor: Chiaki Sakai
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Patent number: 8319262Abstract: A CMOS image sensor is disclosed. The CMOS imager includes a lightly doped semiconductor substrate of a first conductivity type. At least one CMOS pixel of a second conductivity type is formed in the semiconductor substrate. The semiconductor substrate is configured to receive a bias voltage applied for substantially depleting the semiconductor substrate and for forming a depletion edge within the semiconductor substrate. A well of the second conductivity type substantially surrounds the at least one CMOS pixel to form a depletion region about the at least one CMOS pixel operable to form a minimum predetermined barrier to the depletion edge within the semiconductor substrate to pinch off substrate bias in proximity to the return contact.Type: GrantFiled: July 27, 2010Date of Patent: November 27, 2012Assignee: SRI InternationalInventor: James Robert Janesick
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Publication number: 20120295387Abstract: A method for producing a thin-film solar cell with a cell level integrated bypass diode includes forming at least first, second and third series-connected cells on a support, each cell being a laminated structure comprising a junction layer including semiconducting material of a first and second type, a front electrode formed of a transparent conductive oxide resistant to an etchant disposed in electrical contact with the semiconducting material of the first type, and a back electrode in electrical contact with the semiconducting material of the second type. A portion of both the back electrode and the junction layer are separated from a selected parent solar cell. Using the separated portion of the back electrode the semiconducting material of the second type of the separated portion of the junction layer is connected to the semiconducting material of the first type of any one chosen solar cell in the array.Type: ApplicationFiled: November 16, 2011Publication date: November 22, 2012Applicant: E. I. DU PONT DE NEMOURS AND COMPANYInventors: MEIJUN LU, Lap-Tak Andrew Cheng
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Publication number: 20120280345Abstract: According to embodiments of the present invention, a photodetector is provided. The photodetector includes a substrate, a waveguide formed on a surface of the substrate, a first metal layer formed on a first side of the waveguide, wherein a first interface is defined between the waveguide and the first metal layer, and a silicide layer formed on a second side of the waveguide, wherein a second interface is defined between the waveguide and the silicide layer, and wherein the second side is opposite to the first side, and wherein at least one of the first interface and the second interface is at least substantially perpendicular to the surface of the substrate. Various embodiments further provide a method of forming the photodetector.Type: ApplicationFiled: May 4, 2012Publication date: November 8, 2012Inventors: Shiyang Zhu, Guo-Qiang Patrick Lo
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Patent number: 8304278Abstract: A photoelectric conversion apparatus includes: a first interlayer insulation film disposed on a semiconductor substrate; a first plug disposed in a first hole in the first interlayer insulation film, and serving to electrically connect between a plurality of active regions disposed in the semiconductor substrate, between gate electrodes of a plurality of MOS transistors, or between the active region and the gate electrode of the MOS transistor, not through the wiring of the wiring layer; and a second plug disposed in a second hole in the first interlayer insulation film, the second plug being electrically connected to the active region, wherein a wiring arranged over the second plug and closest to the second plug is electrically connected to the second plug, and the wiring electrically connected to the second plug forms a portion of dual damascene structure. By such a structure, incidence efficiency of light onto a photoelectric conversion element can be improved.Type: GrantFiled: October 14, 2010Date of Patent: November 6, 2012Assignee: Canon Kabushiki KaishaInventors: Hiroaki Naruse, Takashi Okagawa, Ryuichi Mishima, Nobuhiko Sato, Hiroshi Yuzurihara
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Patent number: 8298851Abstract: A solid-state imaging device is provided. The solid-state imaging device includes a pixel section, a peripheral circuit section, a silicide blocking layer formed in the pixel section except for part or whole of an area above an isolation portion in the pixel section, and a metal-silicided transistor formed in the peripheral circuit section.Type: GrantFiled: April 17, 2009Date of Patent: October 30, 2012Assignee: Sony CorporationInventor: Keiji Tatani
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Patent number: 8298857Abstract: A single-photon avalanche detector is disclosed that is operable at wavelengths greater than 1000 nm and at operating speeds greater than 10 MHz. The single-photon avalanche detector comprises a thin-film resistor and avalanche photodiode that are monolithically integrated such that little or no additional capacitance is associated with the addition of the resistor.Type: GrantFiled: March 24, 2010Date of Patent: October 30, 2012Assignee: Princeton Lightwave, Inc.Inventor: Mark Allen Itzler
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Patent number: 8293558Abstract: The present disclosure relates to methods for selectively etching a porous semiconductor layer to separate a thin-film semiconductor substrate (TFSS) having planar or three-dimensional features from a corresponding semiconductor template. The method involves forming a conformal sacrificial porous semiconductor layer on a template. Next, a conformal thin film silicon substrate is formed on top of the porous silicon layer. The middle porous silicon layer is then selectively etched to separate the TFSS and semiconductor template. The disclosed advanced etching chemistries and etching methods achieve selective etching with minimal damage to the TFSS and template.Type: GrantFiled: March 8, 2010Date of Patent: October 23, 2012Assignee: Solexel, Inc.Inventors: David Xuan-Qi Wang, Mehrdad M. Moslehi, Rafael Ricolcol, Joe Kramer
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Patent number: 8293559Abstract: In a method of manufacturing a photoelectric conversion device having a pixel region and a peripheral circuit region, a semiconductor compound layer is formed by causing a surface of a diffusion layer or gate electrode of a MOS transistor in the peripheral circuit region to react with a high melting point metal, then an insulating layer is formed in the pixel region and the peripheral circuit region after the step of forming a semiconductor compound layer. A contact hole is formed in the insulating layer to expose a diffusion layer in the pixel region, and a contact hole is formed in the insulating layer to expose the semiconductor compound layer formed in the peripheral circuit region. These holes are formed at different timings. Prior to forming the hole which is formed later, a contact plug is formed in the contact hole which is formed earlier.Type: GrantFiled: June 16, 2011Date of Patent: October 23, 2012Assignee: Canon Kabushiki KaishaInventors: Takehito Okabe, Hiroaki Naruse, Ryuichi Mishima, Kouhei Hashimoto
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Publication number: 20120261784Abstract: A method for forming a back-side illuminated image sensor from a semiconductor substrate, including the steps of: a) forming, from the front surface of the substrate, areas of same conductivity type as the substrate but of higher doping level, extending deep under the front surface, these areas being bordered with insulating regions orthogonal to the front surface; b) thinning the substrate from the rear surface to the vicinity of these areas and all the way to the insulating regions; c) partially hollowing out the insulating regions on the rear to surface side; and d) performing a laser surface anneal of the rear surface of the substrate.Type: ApplicationFiled: April 12, 2012Publication date: October 18, 2012Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics S.A.Inventors: François Roy, Michel Marty
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Publication number: 20120256319Abstract: A method of manufacturing a semiconductor device, includes: forming a first circuit substrate having a first interconnection; forming a second circuit substrate having a second interconnection; bonding the first circuit substrate to the top surface of the second circuit substrate so as to be stacked facing each other; and performing an etching process of simultaneously removing parts formed on the first interconnection and the second interconnection in a stacked body of the first circuit substrate and the second circuit substrate so as to form a first opening in the top surface of the first interconnection and to form a second opening in the top surface of the second interconnection. The forming of the first circuit substrate includes forming an etching stopper layer on the surface of the first interconnection out of a material having an etching rate lower than that of the first interconnection in the etching process.Type: ApplicationFiled: April 4, 2012Publication date: October 11, 2012Applicant: SONY CORPORATIONInventor: Ikue Mitsuhashi
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Publication number: 20120256181Abstract: The invention discloses a power-generating module with solar cell and method for fabricating the same. The power-generating module includes a flexible substrate, a circuit and a solar cell. Both of the circuit and the solar cell are formed on the flexible substrate and are connected with each other, such that the solar cell is capable of providing the power needed by the circuit for operation.Type: ApplicationFiled: June 10, 2011Publication date: October 11, 2012Inventors: Jia-Min SHIEH, Chang-Hong Shen, Wen-Hsien Huang, Bau-Tong Dai, Jung Y. Huang, Hao-Chung Kuo
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Patent number: 8278130Abstract: A back side illumination image sensor according to an embodiment includes: a device isolation region and a pixel region that are on a front side of a first substrate; a light sensor and a readout circuit that are on the pixel region; an interlayer dielectric layer and a metal line that are on the front side of the first substrate; a second substrate that is bonded to the front side of the first substrate on which the metal line is formed; a pixel isolating dielectric layer that is on the device isolation region at a back side of the first substrate; and a microlens that is on the light sensor at the back side of the first substrate.Type: GrantFiled: December 17, 2009Date of Patent: October 2, 2012Assignee: Dongbu Hitek Co., Ltd.Inventor: Mun Hwan Kim
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Publication number: 20120242624Abstract: An object of the present invention is to provide a thin film transistor fabricating method including a simplified step of forming contact holes. This method involves previously removing a gate insulating film (115) on a gate electrode (110) which is not covered with a channel layer (120) in a TFT (100). Hence, an insulating film formed on the gate electrode (110) which is not covered with the channel layer (120) becomes equal in thickness to an insulating film formed on a source region (120a) and a drain region (120b). Therefore, a contact hole (155) reaching a surface of the gate electrode (110) can be formed simultaneously with a contact hole (135a) reaching a surface of the source region (120a) and a contact hole (135b) reaching a surface of the drain region (120b).Type: ApplicationFiled: July 21, 2010Publication date: September 27, 2012Applicant: SHARP KABUSHIKI KAISHAInventors: Kazuhide Tomiyasu, Hidehito Kitakado, Tadayoshi Miyamoto
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Publication number: 20120234922Abstract: An embodiment of the present invention provides an apparatus, comprising a radio frequency identification (RFID) tag, wherein the RFID tag includes an antenna, and wherein at least one amorphous silicon or organic photovoltaic solar cell is integrated with the antenna.Type: ApplicationFiled: March 14, 2011Publication date: September 20, 2012Inventors: Alanson P. Sample, Yuri A. Sylvester
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Patent number: 8247306Abstract: A solid-state image pickup device includes: a silicon layer; a pixel portion formed in the silicon layer for processing and outputting signal charges obtained by carrying out photoelectric conversion for incident lights; an alignment mark formed in a periphery of the pixel portion and in the silicon layer; and a contact portion through which a first electrode within a wiring layer formed on a first surface of the silicon layer, and a second electrode formed on a second surface opposite to the first surface of the silicon layer through an insulating film are connected, wherein the alignment mark and the contact portion are formed from conductive layers made of the same conductive material and formed within respective holes each extending completely through the silicon layer through respective insulating layers made of the same material.Type: GrantFiled: February 5, 2010Date of Patent: August 21, 2012Assignee: Sony CorporationInventors: Keiichi Nakazawa, Takayuki Enomoto
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Patent number: 8247258Abstract: A method for fabricating CMOS image sensor device includes providing a P-type semiconductor substrate. The semiconductor substrate includes a surface region. The method includes forming a first dielectric layer having a first thickness overlying a first region of the semiconductor substrate. The method includes providing an N type impurity region in a portion of the semiconductor substrate underneath the first dielectric layer to cause formation of a photodiode device region characterized by at least the N type impurity region and the P type substrate. A second dielectric layer having a second thickness is formed in a second region of the surface region. The second dielectric layer is formed within a portion of the first region within the first thickness of the first dielectric layer. The method includes forming a polysilicon gate layer overlying at least the second region to form a contact member coupled to the second region.Type: GrantFiled: October 27, 2008Date of Patent: August 21, 2012Assignee: Semiconductor Manufacturing International (Shanghai) CorporationInventors: Jianping Yang, Hong Zhu, Jieguang Huo
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Patent number: 8232133Abstract: An image sensor includes a semiconductor layer that filters light of different wavelengths. For example, the semiconductor layer absorbs photons of shorter wavelengths and passes more photons of longer wavelengths such that the longer wavelength photons often pass through without being absorbed. An imaging pixel having a photodiode is formed near a front side of the semiconductor layer. A dopant layer is formed below the photodiode near a back side of the semiconductor layer. A mirror that primarily reflects photons of longer visible wavelengths is disposed on the back side of the semiconductor layer.Type: GrantFiled: July 26, 2011Date of Patent: July 31, 2012Assignee: OmniVision Technologies, Inc.Inventors: Howard E. Rhodes, Hidetoshi Nozaki
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Publication number: 20120171799Abstract: Methods of fabricating bypass diodes for solar cells are described. In one embodiment, a method includes forming a first conductive region of a first conductivity type above a substrate of a solar cell. A second conductive region of a second conductivity type is formed on the first conductive region. In another embodiment, a method includes forming a first conductive region of a first conductivity type above a substrate of a solar cell. A second conductive region of a second conductivity type is formed within, and surrounded by, an uppermost portion of the first conductive region but is not formed in a lowermost portion of the first conductive region.Type: ApplicationFiled: February 10, 2012Publication date: July 5, 2012Inventors: Seung Bum Rim, Taeseok Kim, David D. Smith, Peter J. Cousins
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Patent number: 8211732Abstract: An image sensor having a pixel array comprises periphery elements formed over a substrate, an oxide layer formed over the periphery elements, an epitaxial layer formed in an opening in the oxide layer in a pixel array area, and a plurality of photosensitive elements of the pixel array formed in the epitaxial layer. Formation of an initial metallization layer occurs after the formation of the photosensitive elements in the epitaxial layer. The photosensitive elements can thus be formed in the epitaxial layer at a higher level within an image sensor stack than that of the initial metallization layer. This advantageously allows stack height and pixel size to be reduced, and fill factor to be increased. The image sensor may be implemented in a digital camera or other type of digital imaging device.Type: GrantFiled: September 11, 2008Date of Patent: July 3, 2012Assignee: OmniVision Technologies, Inc.Inventor: Shenlin Chen