Abstract: The present invention is generally directed to various methods of controlling wet chemical processes in forming metal silicide regions, and a system for performing same. In one illustrative embodiment, the method comprises providing a substrate having a layer of unreacted refractory metal and at least one metal silicide region formed thereabove, performing a wet chemical process to remove at least a portion of the layer of unreacted refractory metal, measuring at least one characteristic of the portion of the layer of unreacted refractory metal while the wet chemical process is being performed, and controlling at least one parameter of the wet chemical process based upon the measured at least one characteristic of the portion of the layer of unreacted refractory metal.

Abstract: In a semiconductor processing apparatus including a process chamber, a sample stand for holding a sample in the process chamber, and a process gas supply unit for supplying a process gas to the process chamber, a plurality of samples of a lot are successively supplied to a process chamber to be successively processed in an intra-lot successive process. The apparatus includes a state sensor for detecting a state in the process chamber and an intra-lot variation pattern prediction unit for predicting, according to sensor data detected by the state sensor, intra-lot variation patterns of results of the intra-lot successive process. According to a result of the prediction by the intra-lot variation pattern prediction unit, the apparatus changes a process condition applied to a sample of the lot.

Abstract: Process exhaust gas is sampled, and the components of the process exhaust gas are analyzed by a Fourier-transform infrared spectroscope (FT-IR) (26). The analysis result is compared with a reference analysis result obtained from an analysis of process exhaust gas generated in an operation performed under reference process conditions. If the amount of a gas component changes to an amount that is outside a predetermined range set around a reference value obtained from the reference analysis result, a signal indicating a process error is outputted. Instead of the output of the signal indicating a process error, the process conditions can be automatically adjusted.

Abstract: Improved endpoint detection and/or thickness measurements may be obtained by correcting sensor data using calibration parameters and/or drift compensation parameters. Calibration parameters may include an offset and a slope, or other parameters. Drift compensation parameters may include off-wafer measurements.

Abstract: The present invention presents an improved apparatus and method for monitoring a material processing system, wherein the material processing system includes a processing tool, a number of RF-responsive electrical sensors coupled to the processing tool to generate and transmit electrical data, and a sensor interface assembly (SIA) configured to receive the electrical data from the plurality of RF-responsive electrical sensors.

Abstract: A semiconductor wafer is etched to create an array of MEMS devices and at the same time, test sites having geometry which represent critical geometry of the MEMS devices. Probe contacts are provided in the test sites to permit measurement of resistance and capacitance between test site geometry as a way of determining the effectiveness of the etch. One test site comprises a ladder of semiconductor structures separated by gaps of graded width. Another test site comprises finger structures formed over a cavity and the probe contacts are located so as to detect inter-finger capacitance and resistance (or continuity) as well as intra-finger resistance.

Abstract: The present invention is directed to a method of controlling chemical mechanical polishing operations to control the duration of an endpoint polishing process. The method comprises providing a wafer having a layer of copper formed thereabove, performing a first timed polishing operation for a duration (t1) on the layer of copper at a first platen to remove a majority of the layer of copper, performing an endpoint polishing operation on the layer of copper at a second platen to remove substantially all of the layer of copper, determining a duration (t2ept) of the endpoint polishing operation performed on the layer of copper at the second platen, and determining, based upon a comparison between the determined duration (t2ept) of the endpoint polishing operation and a target value for the duration of the endpoint polishing operations, a duration (t1) of the timed polishing operation to be performed on a subsequently processed layer of copper at the first platen.

Abstract: An invention is provided for detecting an endpoint during a chemical mechanical polishing (CMP) process. A reflected spectrum data sample is received that comprises a plurality of values corresponding to a plurality of spectrums of light reflected from an illuminated portion of a surface of a wafer. The reflected spectrum data sample is decomposed into noise sub-space values and signal sub-space values, and the noise sub-space values are truncated. In addition, outside spectrum data is extrapolated using a linear combination of the values of the reflected spectrum data sample. In this manner, an endpoint can be determined based on optical interference occurring in the reflected spectrum data.

Abstract: A method of inspecting a process for manufacturing a semiconductor device, used to determine the status of a processing operation during the manufacturing process, according to the embodiment of the present invention, comprises: detecting an image of a desired area of a surface of a semiconductor workpiece after it has been subjected to the processing operation, using an image signal detector; detecting image signal intensity at each pixel of a plurality of pixels of the image signal detector; and determining the status of the processing operation based on the relationship between the image signal intensity and the number of pixels at each of certain levels of the image signal intensity. A method of manufacturing a semiconductor device is made by utilizing the above-described inspection method.

Abstract: The present invention is a film forming method of forming a film of a treatment solution on the front face of a substrate in a treatment chamber including the steps of: supplying the treatment solution to the substrate mounted on a holding member in the treatment chamber in states of gas being supplied into the treatment chamber and of an atmosphere in the treatment chamber being exhausted; and measuring the temperature of the front face of the substrate before the supply of the treatment solution. The measurement of the temperature of the front face of the substrate before the supply of the treatment solution enables the check of the temperature of the front face of the substrate and the temperature distribution. Then, the measured result is compared with a previously obtained ideal temperature distribution for the formation of a film with a uniform thickness, thereby predicting the film thickness of the film which will be formed in the following processing.

Abstract: A method of testing the processing of a wafer on a CMP apparatus includes processing a control wafer with the CMP apparatus with a predetermined control consumable combination under a predetermined set of control conditions and generating a control data set which describes the processing of the control wafer with the CMP apparatus, the control data set being based upon the control conditions and a removable rate of the control wafer. The method further includes processing a test wafer with a CMP apparatus with a test consumable combination substantially the same as the control consumable combination under a set of test conditions substantially the same as the set of control conditions. The method further includes generating a test data set which describes the processing of the test wafer with the CMP apparatus.

Abstract: Polishing slurry is transported via piping to flow into the closed loop control system. First, the polishing slurry flows into the ultrasonic concentration detector. Original data of the polishing slurry that is determined by means of ultrasonic concentration detector is a fluid velocity at that time. This determined value can be converted into weight percent concentration at that time by memory data table. The converted data of weight percent concentration will be transmitted into program logic controller (PLC), and the data of liquid level volume in the distribution tank will be transmitted into program logic controller at present. The program logic controller will then analyze whether the quantity of oxidant is sufficient. If the quantity of oxidant does not reach the required criterion, the program logic controller will control the analog valve to transmit a supplementary quantity of oxidant into the distribution tank via the analog valve and piping.

Abstract: A method of etching a substrate, includes measuring a reflectance signal from a reflective material deposited on the substrate as the substrate is being etched, correlating the substrate etch rate to the reflectance signal from the reflective material, and using the etch relation between the substrate and the reflective material to determine the etch target.

Abstract: The chemical composition of thin films is modulated during their growth. A computer code has been developed to design specific processes for producing a desired chemical composition for various deposition geometries. Good agreement between theoretical and experimental results was achieved.

Abstract: A method for producing printed circuits utilizing direct printing methods to apply a pattern mask to a substrate. The direct printing methods include correcting positional errors in a printing apparatus by ascertaining the errors in the printer through comparison of a printed pattern and a known standard pattern. Printer inputs are manipulated to compensate for the ascertained errors of the printer. The pattern mask applied by the corrected printer may be an etch resist mask for forming conductive pathways by an etching process, or the pattern mask may be a plating mask with conductive pathways being formed by a plating operation. The process of the present invention is applicable to forming both single-sided and double-sided printed circuit boards.

Abstract: In a method for removing an organic material from semiconductor devices, at least one semiconductor device is inserted into a so-called piranha bath. Measurement data are processed to get a data curve for measuring a concentration of at least one reaction product. The measurement data is queried for at least one of a turning point, a local maximum point or a local minimum point of the curve each being significantly different from signal noise after removing the semiconductor device from the fluid. With the information it is decided whether further processing of the semiconductor device is needed. The method is suitable for detecting an incomplete removal of organic material, i.e. photoresist deposited on the processed semiconductor device.

Abstract: The present invention discloses a method of fabricating and repairing a mask without damage and an apparatus including a holder to mount a substrate; a stage to position the holder in a chamber; a pumping system to evacuate the chamber; an imaging system to locate an opaque defect in the substrate; a gas delivery system to dispense a reactant gas towards the defect; and an electron delivery system to direct electrons towards the opaque defect.

Abstract: A method for automated monitoring and controlling of a semiconductor wafer plasma etching process including collecting data versus time during a plasma etching process the data including information representative of a concentration of at least one pair of reactant and product species present during the course of the plasma etching process; calculating a selected ratio of at least one reactant species and one product species at selected time intervals in the plasma etching process to create real-time concentration ratio data; retrieving model concentration ratio data for the at least one reactant species and one product species for comparison with the real-time concentration ratio data; comparing the model concentration ratio data with the real-time concentration ratio data to determine a difference; and, adjusting at least one plasma process operating parameter to minimize the difference.

Abstract: A method and apparatus for processing a semiconductor wafer is provided for reducing CD microloading variation. OCD metrology is used to inspect a wafer to determine pre-etch CD microloading, by measuring the CD of dense and isolated photoresist lines. Other parameters can also be measured or otherwise determined, such as sidewall profile, photoresist layer thickness, underlying layer thickness, photoresist pattern density, open area, etc. The inspection results are fed forward to the etcher to determine process parameters, such as resist trim time and/or etch conditions, thereby achieving the desired post-etch CD microloading. In certain embodiments, the CD and profile measurements, trim, etch processing and post-etch cleaning are performed at a single module in a controlled environment. All of the transfer and processing steps performed by the module are performed in a clean environment, thereby increasing yield by avoiding exposing the wafer to the atmosphere and possible contamination between steps.

Abstract: A method and apparatus for controlling lateral etching during an etching process. The method and apparatus includes laterally etching a lower layer of a stack of layers in a processing chamber, where an endpoint detection system radiates a spectrum of light over the lower layer being etched and an area over the stack of layers proximate to the lower layer being etched. The intensity of light reflected from at least one of the stacked layers positioned lateral to the lower layer being etched is then measured. An endpoint detection system terminates the etching process upon measuring a predetermined metric associated with the intensity of reflected light from the at least one of the stacked layers.

Abstract: In the manufacture of a multi-layer integrated circuit, a reference target is etched into a test wafer along with circuit features of a reference layer. As successive dependent layers are printed, successive dependent targets overlaying the same reference target are formed in photoresist. As each successive dependent target is printed, the degree to which it is registered with the reference target is used to determine the overlay error. After determination of overlay error for a layer, the layer's dependent target is removed, allowing the reference target to be matched with the dependent target of another layer.

Abstract: Methods are presented for fabrication of alignment features of a desired depth, and shallow trench isolation (STI) features in Silicon-On-Insulator (SOI) material. Specific embodiments require no more than two lithography and etch processes, which represents an improvement over current methodology requiring three lithography and etch processes in order to produce the desired features during manufacture of a semiconductor device.

Abstract: A method and system are described to reduce process variation as a result of the electrochemical deposition (ECD), also referred to as electrochemical plating (ECP), and chemical mechanical polishing (CMP) processing of films in integrated circuit manufacturing processes. The described methods use process variation and electrical impact to direct the insertion of dummy fill into an integrated circuit.

Abstract: Chalcopyrite semiconductors, such as thin films of copper-indium-diselenide (CuInSe2), copper-gallium-diselenide (CuGaSe2), and Cu(Inx,Ga1-x)Se2, all of which are sometimes generically referred to as CIGS, have become the subject of considerable interest and study for semiconductor devices in recent years. They are of particular interest for photovoltaic device or solar cell absorber applications. The quality of Cu(In,Ga)Se2 thin films, as an example of chalcopyrite films, is controlled by making spectrophotometric measurements of light reflected from the film surface. This permits the result of non-contacting measurements of films in a continuous production environment to be fed back to adjust the production conditions in order to improve or maintain the quality of subsequently produced film.

Abstract: A measurement method for the thinned thickness of the silicon wafer, wherein thickness inspection patterns are fabricated onto the silicon wafer substrate by anisotropic etching, and then the wafer is polished with a polisher; thus a wafer with desired thickness can be obtained after the polish is proceeded; the thickness of the upper wafer is determined by the said inspection patterns, then the wafer is sorted by thickness; thus it can be applied to the MEMS micromachined devices that in need of the wafer with such precise thickness.

Abstract: A wiring forming system comprises: maskless exposure unit which directly exposes an unexposed board by using exposure data generated based on design data relating to an wiring board; post-development inspect unit which tests the board after development, by using the exposure data and the image data of the board exposed and developed by the maskless exposure unit; etching unit which etches the developed board; and post-etching inspect unit which tests an etching pattern formed on the etched board, by using etching inspect data generated based on the design data and the image data of the board etched by the etching unit.

Abstract: Apparatus and method for post etching inspection of electrical circuits including an optical inspection assembly viewing an electrical circuit at various regions thereon and providing output indications of etching characteristics of the electrical circuit at the various regions and output circuitry receiving the output indications of etching characteristics of the electrical circuit at the various regions and providing an output indication of variations in the etching characteristics between at least some of the various regions.

Abstract: A method fabricates an integrated semiconductor product. The first step is providing a semiconductor wafer that has preformed semiconductor components. The next step is forming at least one connection, in particular a polysilicon connection. The next step is exposing the at least one connection from the wafer front surface. The next step is applying a protective layer, in particular a silicon nitride protective layer, to the wafer front surface. The next step is treating the wafer front surface by a chemical mechanical polishing (CMP) step, with the result that the at least one connection is made accessible again.

Abstract: A new method for detecting blind holes in the contact layer of a multi-chip semiconductor test wafer makes use of the fact that if the hole is not a blind hole, a subsequent etch step extends the hole a predetermined distance into the layer immediately underlying the contact layer. After a predetermined number of holes have been etched through the contact layer and for a predetermined distance into the layer underlying the contact layer, the contact layer is stripped to expose the holes in the underlying layer. These holes are scanned optically by a commercial apparatus that ordinarily detects wafer defects that resemble the holes. The missing holes are detected by comparing the holes of different chips on the test wafer. The test is particularly useful with a high density plasma etch because these holes typically have a very small diameter in relation to the thickness of the contact layer.

Abstract: Apparatus characterizes the quality of microelectronic features using broadband white light. A highly collimated light source illuminates an area of a first wafer using broadband multi-spectral light. The angular distribution of the light scattered from the first wafer is then measured. Generally, the angle of the light source, detector, or both is altered and an angular distribution measurement taken at each angle, producing a scatter signature for the first wafer. Finally, the scatter signature of the first wafer is compared with a known scatter signature of a second wafer of good quality to determine the quality of the first wafer.

Abstract: A method for reducing preferential chemical mechanical polishing (CMP) of a silicon oxide filled shallow trench isolation (STI) feature during an STI formation process including providing a semiconductor wafer having a process surface including active areas for forming semiconductor devices thereon; forming a silicon oxynitride layer over the process surface for photolithographically patterning STI trenches around the active areas; photolithographically patterning STI trenches around the active areas for anisotropic etching; anisotropically etching the STI trenches extending through the silicon oxynitride layer into the semiconductor wafer; depositing a silicon oxide layer over the silicon oxynitride layer to include filling the STI trenches; and, performing a CMP process to remove the silicon oxide layer overlying the silicon oxynitride layer to reveal an upper surface of the silicon oxynitride layer.

Abstract: A method for revealing agglomerated intrinsic point defect. The method comprising coating a sample with a metal capable of decorating agglomerated intrinsic point defects, heat-treating the coated sample to decorate any agglomerated intrinsic point defects, cooling the sample, etching the surface of the cooled sample without delineating the decorated agglomerated intrinsic point defects and etching the etched surface with a delineating etchant to reveal the decorated intrinsic point defects.

Abstract: A method is provided that comprises forming a copper seed layer on a workpiece and measuring the uniformity of the copper seed layer on the workpiece. The method further comprises applying the uniformity measurement to modify processing to form a copper layer having a desired uniformity profile for increased planarization in subsequent planarizing.

Abstract: The invention relates to a process for treating semiconductor substrates in which metal layers are exposed by removing one or more layers of the surface of a semiconductor substrate which have been applied to the metal layer, in which exposure takes place in a time sequence to a first part of the layer by a dry etching step and to a second part of the layer by a wet etching step.

Abstract: Methods and systems for monitoring a parameter of a measurement device during polishing, damage to a specimen during polishing, a characteristic of a polishing pad, or a characteristic of a polishing tool are provided. One method includes scanning a specimen with a measurement device during polishing of a specimen to generate output signals at measurement spots on the specimen. The method also includes determining if the output signals are outside of a range of output signals. Output signals outside of the range may indicate that a parameter of the measurement device is out of control limits. In a different embodiment, output signals outside of the range may indicate damage to the specimen. Another method includes scanning a polishing pad with a measurement device to generate output signals at measurement spots on the polishing pad. The method also includes determining a characteristic of the polishing pad from the output signals.

Abstract: The invention relates to a method for the preparation of different molecularly imprinted polzmers for recognition of a target molecule by providing particles, frits or monoliths having initiator confined to the surface thereof in separate compartments, adding different monomer mixtures that may contain a template molecule to each compartment, polymerising said mixtures and finally removing the template and excess monomer(S) from the compartments. The invention also relates to a device containing different molecularly imprinted polymers for recognition of a target molecule.

Abstract: semiconductor chip. The method comprises etching a backside of the semiconductor chip, the frontside including a first well with a first type of doping and a second well with a second type of doping; monitoring a backside of the semiconductor chip during etching; and determining when a first portion of the backside over one of the first and second wells differs from a second portion of the backside over the other of the first and second wells. A method for etch endpoint detection includes etching a backside of a semiconductor chip, the semiconductor chip having at least one doped well formed proximate a frontside of the semiconductor chip; monitoring the backside of the semiconductor chip during etching until at least one doped well becomes visible; and stopping etching after the doped well becoming visible.

Abstract: A method of chemical mechanical polishing a metal layer on a substrate in which the substrate is polished at a first polishing rate. Polishing is monitored with an eddy current monitoring system, and the polishing rate is reduced to a second polishing rate when the eddy current monitoring system indicates that a predetermined thickness of the metal layer remains on the substrate. Then polishing is monitored with an optical monitoring system, and polishing is halted when the optical monitoring system indicates that an underlying layer is at least partially exposed.

Abstract: An improved pre-clean chamber of a semiconductor processing system minimizes the generation of particulates during processing, thereby decreasing contamination levels that can adversely affect plasma vapor deposition film properties while also decreasing operational costs. The pre-clean chamber comprises an insulator collar that insulates the outside diameter surface of a wafer pedestal, thereby mitigating the etching of the wafer pedestal during etching. The pre-clean chamber further comprises a gas trench cover that directs a suitable etching gas from a gas inlet trench into streams that are focused up and towards the center of the chamber to reduce the extent to which gas bombards the chamber cover. The pre-clean chamber also comprises a bellows cover which protects the bellows of a wafer lift during etching, further reducing the dislodgment of particulates during etching.

Abstract: An apparatus for use in processing a workpiece to fabricate a microelectronic component is set forth. The apparatus comprises a process container having a process fluid therein for processing the workpiece and a workpiece holder configured to hold the workpiece. A position sensor is employed to provide position information indicative of the spacing between a surface of the workpiece and a surface of the process fluid. A drive system provides relative movement between the surface of the workpiece and the surface of the process fluid in response to the position information. Preferably, the relative movement provided by the drive system comprises a first motion that causes the surface of the workpiece to contact the surface of the process fluid, and a second motion opposite the direction all of and following the first to generate and maintain a column of process fluid between the surface of the process fluid and the surface of the workpiece.

Abstract: A method and apparatus for providing a substantially constant environment in the cavity surrounding the optical pathway during the chemical mechanical planarization (CMP) operation is provided. In one embodiment, a system for planarizing the surface of a substrate is provided. The system includes a platen configured to rotate about its center axis. The platen supports an optical view-port assembly for assisting in determining a thickness of a layer of the substrate. A polishing pad disposed over the platen is included. The polishing pad has an aperture overlying a window of the optical view-port assembly. A carrier for holding the substrate over the polishing pad is also included. A cavity defined between the surface of the substrate and the window is included. A fluid delivery system adapted to provide a stable environment in the cavity during a chemical mechanical planarization (CMP) operation is included.

Abstract: The invention teaches a new method of applying slurry during the process of chemical mechanical polishing of copper surfaces. By varying the rate of slurry deposition, starting out with a low rate of slurry flow that is increased as the polishing process proceeds, the invention obtains good planarity for copper surfaces while saving on the amount of slurry that is being used for the copper surface polishing process.

Abstract: A method is provided for determining an etch endpoint. The method includes collecting intensity data representative of optical emission spectral wavelengths during a plasma etch process. The method further includes calculating Scores from at least a portion of the collected intensity data using at most first, second, third and fourth Principal Components derived from a model. The method also includes determining the etch endpoint using Scores corresponding to at least one of the first, second, third and fourth Principal Components as an indicator for the etch endpoint.

Abstract: A fluid product distribution device (1) comprises a body (10) defining an entry passage (11), an actuating rod (13) displaceable in the body, an actuating element (15) coupled to the actuating rod, and a fixation element (17) for fixing the body (10) in an opening (20) of the recipient (2) containing fluid product. One of the components is provided with an identification unit (3) suitable for delivering information relating to the distribution device.

Abstract: This disclosure is directed to a method of inspecting how contact holes or via holes are formed in a sample, such as a wafer. An electron beam is directed to the contact holes in succession. An absorbed current flowing through the sample is detected by a current amplifier. Data about the obtained absorbed current is stored in a memory. The electric current flowing through a reference sample and ground is measured, and the relation of the current to the etch depths of contact holes into the substrate is previously found. A control unit compares data about the measured current with the previously found relation and determines the depths of holes of interest into the substrate (i.e., inspects how they are etched).

Abstract: Method for fabricating a structure. According to an exemplary embodiment, a structure is made by forming a layer of removable material with a first surface spaced a part from a second surface. The first surface is formed along a first region from which the material is removable. The first surface is altered by removal of material from the layer. Removed material from the first surface is monitored to detect fluctuations in a variable of composition in the layer, and removal of material from the first surface is terminated when the composition of monitored material meets a predetermined criterion. In an alternate embodiment a variable characteristic is imparted to a layer of material as a function of layer thickness and an operation is performed on the layer resulting in removal of material. Samples of removed material are monitored for variation in the characteristic and the operation is modified when a variation conforms with a criterion.

Abstract: A system and method for determining endpoint detection in semiconductor wafer planarization is provided. The system and method provide a flexible solution that can compensate for baseline variability induced errors that may otherwise occur in endpoint detection. The system uses an endpoint detection signal that monitors the optical characteristics of the wafer being planarized. The system and method continue to monitor the detection signal during planarization until it meets endpoint criterion that indicates endpoint completion. When the endpoint criterion is reached, a new snapshot is taken from a previous time period and a new baseline is calculated. The endpoint detection signal is then recalculated based upon the new baseline and the recalculated detection signal is again compared to the endpoint criterion. If the recalculated endpoint detection signal again substantially meets the endpoint criterion then the detection of endpoint is confirmed.

Abstract: A resist mark for measuring the accuracy of overlay of a photomask disposed on a semiconductor wafer, includes a first measurement mark having a first opening, formed on the substrate, an intermediate layer formed on the first measurement mark and in the first opening, a frame-shaped second measurement mark formed on the intermediate layer, and a third measurement mark that is spaced from the second measurement mark toward the outside, formed on the intermediate layer. The second measurement mark has a width which is short enough not to be influenced by a deformation caused by the thermal flow phenomenon.

Abstract: A method is provided to enhance endpoint detection during via etching in the processing of a semiconductor wafer. The method includes forming a first process layer and a second process layer above the first process layer. A first masking layer is formed above at least a portion of the second process layer, leaving an outer edge portion of at least the second process layer exposed. Thereafter, an etching process is used to remove the outer edge portion of the first and second layers. Once the etching is complete, the first masking layer is removed, and a second masking layer is formed above the second process layer. The second masking layer is patterned to expose portions of the first process layer, and then an etching process substantially removes the exposed portions of the first process layer to form the vias.

Abstract: A method of using a finishing element having an abrasive finishing surface including organic lubricant for finishing semiconductor wafers is described. The organic lubricants with preferred in situ control can improve control of the coefficient of friction and help reduce unwanted defects. The method uses finishing control subsystem having a multiplicity of operative process sensors along with tracked information to improve in situ control of finishing. Differential lubricating film methods are described to differentially finish semiconductor wafers. Planarization and localized finishing can be improved using differential lubricating boundary layer methods of finishing with improved real time control.