Electrical Digital Calculating Computer Patents (Class 708/100)
  • Publication number: 20080320064
    Abstract: A method and apparatus for controlling a reading level of a memory cell are provided. The method of controlling a reading level of a memory cell may include: receiving metric values calculated based on given voltage levels and reference levels; generating summed values for each of the reference levels by summing metric values corresponding to levels of a received signal from among the received metric values; selecting the reference level having the greatest value of the generated summed values from the reference levels; and controlling the reading level of the memory cell based on the selected reference level.
    Type: Application
    Filed: December 28, 2007
    Publication date: December 25, 2008
    Inventors: Sung Chung Park, Jun Jin Kong, Seung-Hwan Song, Dong Ku Kang
  • Publication number: 20080183780
    Abstract: A method, computer program product and apparatus are provided for capturing inexact date information. In particular, a sophisticated date entry mechanism is provided that is capable of receiving, as input, date information associated with not only exact dates, but also “fuzzy” (i.e., partial or approximate) dates including, for example, “August of 2006,” or “about the first of June in the year 1996.” This date information may be input via any combination of a mouse, a keyboard, a microphone, or other input element, and in a plurality of different formats, including, for example, a plain language description of the exact or fuzzy date, and/or a relative description of the date. Once the date information has been received, the date entry mechanism is capable of determining in which format the date information was provided, and determining a date corresponding with the date information based on this format.
    Type: Application
    Filed: January 30, 2007
    Publication date: July 31, 2008
    Inventors: Mimi Amabile, Jeannine Aloe Strope, Larry Constantine
  • Publication number: 20080160177
    Abstract: Methods for forming traces/lines and interconnects on substrates and devices and systems thereof of herein disclosed. In some embodiments, an activator layer is deposited on a surface of a substrate. Pick-up lithography using a pre-patterned lithographic stamp, ultraviolet lithography or like methods are used to selectively remove portions of the activator layer to form a pattern on the surface of the substrate. Electroless metal deposition is then applied to the surface of the substrate to form a metal pattern selectively on the remaining activator layer. Electroless plating can then be used to form traces/lines and interconnects in dimensions of less than 10 micrometers.
    Type: Application
    Filed: December 29, 2006
    Publication date: July 3, 2008
    Inventors: J. C. Mataybas, Lakshmi Supriya, Omar Bchir
  • Patent number: 7389416
    Abstract: In accordance with the present invention, there is provided a method for sharing a secret value x among n participating network devices via an asynchronous network. The n participating network devices comprises t faulty devices and k sub-devices capable of reconstructing the secret value x, wherein t<n/3 and k<n. The secret value x being provided by a distributor.
    Type: Grant
    Filed: February 15, 2002
    Date of Patent: June 17, 2008
    Assignee: International Business Machines Corporation
    Inventors: Christian Cachin, Klaus Kursawe, Anna Lysyanskaya, Reto Strobl
  • Publication number: 20080133635
    Abstract: A circuit element includes a plurality of computation blocks connected at least partially in series for processing multi-bit numbers. Each of the computation blocks includes a plurality of transistors having characteristic threshold voltages. The circuit element is configured so that the transistors will each operate at a voltage below its threshold voltage. The circuit element includes a plurality of circuit sub-elements each having an output. The circuit sub-element outputs are connected together.
    Type: Application
    Filed: April 30, 2007
    Publication date: June 5, 2008
    Inventor: Snorre Aunet
  • Publication number: 20080120251
    Abstract: A method of operating a computer system includes storing, in the computer system, a database containing performance measure data regarding performance measures of a plurality of items. The method further includes inputting into the computer system a plurality of performance measure constraints. The method also includes modeling the performance measure constraints with a set of equations. The equations include a plurality of variables. Each of the variables corresponds to a respective one of the items. Each variable is, for example, to be assigned either the value “1” or the value “0”. The value “1” may represent a recommendation to take an action relative to the corresponding item in the portfolio and the value “0” may represent a recommendation to take another action. The computer system is used to solve the set of equations to generate one or more solutions that satisfy the performance measure constraints.
    Type: Application
    Filed: March 27, 2007
    Publication date: May 22, 2008
    Inventors: Rajesh Tyagi, Kete Chalermkraivuth, Marc Anthony Garbiras, John Andrew Ellis, Matthew Allen, James G. Russo
  • Patent number: 7366287
    Abstract: A current time and a current Gregorian date are converted into an epoch time stamp. A number of seconds that have elapsed since a predetermined date up until the current year is determined. A number of seconds that have elapsed since the beginning of the current year up until the current month is determined based on whether the current year is a leap year. In addition, a number of seconds that have elapsed since the beginning of the current month up until the current day is calculated, as is a number of seconds that have elapsed during the current day. All of these values are summed to obtain a converted time. Finally, it is determined whether Daylight Savings Time is in effect, and when Daylight Savings Time is not in effect, 3600 seconds are added to the converted time.
    Type: Grant
    Filed: September 25, 2003
    Date of Patent: April 29, 2008
    Assignee: AT&T Knowledge Ventures, L.P.
    Inventors: Kenneth Robert Stroud, Jeffrey Lewis Brandt, Rick Anthony Cherye
  • Patent number: 7346593
    Abstract: For sequentially input data string, the outliner and the change point are detected through calculation of the outlier score and the change point score by combining a time-series model learning device to learn the generation mechanism of the read data series as the time-series statistic model, a score calculator to calculate the outlier score of each data based on the time-series model parameter and the input data, a moving average calculator to calculate the moving average of the outlier score, a time-series model learning device to learn the generation mechanism of the moving average series as the time-series statistic model and the above score calculator that further calculates the outlier score of the moving average based on the moving average of the outlier score and outputs the result as the change point score of the original data.
    Type: Grant
    Filed: July 16, 2003
    Date of Patent: March 18, 2008
    Assignee: NEC Corporation
    Inventors: Junichi Takeuchi, Kenji Yamanishi
  • Publication number: 20070203963
    Abstract: A portable computer includes a base unit, a cover unit, a main keyboard, and an input device. The cover unit is pivotably connected to the base unit. The main keyboard is mounted to the base unit. The main keyboard includes a plurality of keys. The input device is replaceably mounted to the base unit, for inputting one type of single special singal.
    Type: Application
    Filed: November 3, 2006
    Publication date: August 30, 2007
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: HSUAN-CHEN CHEN, JIE ZHANG, CHIEN-LI TSAI
  • Patent number: 7251127
    Abstract: According to one embodiment of the present invention, a method of converting a computer from a folded position into an alternate position is disclosed. The method includes: providing a display; providing a base coupled to the display; providing a base flap pivotally attached to the display and the base, the base flap being attached to the display at a distance sufficiently away from edges of the display to provide a reduced volumetric size of the computer in a laptop position.
    Type: Grant
    Filed: March 2, 2004
    Date of Patent: July 31, 2007
    Assignee: Intel Corporation
    Inventors: Prosenjit Ghosh, Shreekant Suryakant Thakkar, Truong V. Phan
  • Patent number: 7191254
    Abstract: A microcomputer which outputs address data to an external device for evaluating the address data comprising an address counter specifying an address of a program memory, an address data output section for outputting the address data in the address counter to the external device by use of a clock having a higher frequency provided from the external device than a clock for operating the microcomputer while applying a unit based on a bit number smaller than a bit number of the address data in the address counter.
    Type: Grant
    Filed: December 18, 2003
    Date of Patent: March 13, 2007
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Susumu Yamada, Tadao Nakamura, Susumu Kubota
  • Patent number: 7185117
    Abstract: Address data in an address counter is evaluated correctly. A microcomputer which outputs address data to an external device for evaluating the address data comprising an address counter specifying an address in a program memory, an address data output section which outputs, to the external device, discrimination data for discriminating whether or not the address data in the address counter is one which is branched in order for the external device to store only branched address data, the discrimination data being outputted together with the address data.
    Type: Grant
    Filed: December 18, 2003
    Date of Patent: February 27, 2007
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Susumu Yamada, Tadao Nakamura, Susumu Kubota
  • Patent number: 7035831
    Abstract: The process consists of carrying out the first phase of generating the transaction signature (9), with prior authentication by the cardholder, in the issuing centre (3) through its authentication server (5), a second phase of decimalising (10) the signature (9) to obtain a valid permutation number and a third phase of permuting (11) the intermediary positions or digits of the card, the processor fixing a BIN and maintaining the check digit. In this way, the digits forming the expiry date are permuted. The card and expiry date are sent in the data flow (12) of the transaction to the acquiring server (7), from where they are sent back to the issuing centre (3), to its processing centre (6) to be specific, where three other operative phases are carried out: the new generation of the signature (13), its decimalisation (14) and lastly the inverse process (15) to reestablish the card's real data and expiry date.
    Type: Grant
    Filed: January 31, 2002
    Date of Patent: April 25, 2006
    Assignee: Servicios Para Medios de Pago, S.A.
    Inventors: Ana Nunez Benito, Jose Antonio Gallego Gonzalez
  • Patent number: 7023692
    Abstract: A multifunctional electronic palmtop computer comprising, in a single box-like body, a keyboard (14), a display (15), a CPU, working storage and mass storage, a printer and a PCMCIA card interface (23), further comprising a protective cover (25) for the interface (23) which is provided with locking means adapted to prevent direct accessibility to the interface.
    Type: Grant
    Filed: December 18, 2000
    Date of Patent: April 4, 2006
    Assignee: 4P S.R.L.
    Inventors: Silvano Mansutti, Roberto Cardin
  • Patent number: 6990422
    Abstract: A time varying electrical excitation(s) is applied to a system containing biologic and/or non-biologic elements, whereupon the time-varying electrochemical or electrical response is detected and analyzed. For biologic specimens, the presence, activity, concentration or relative quantity, and certain inherent characteristics of certain target substances (hereinafter referred to as “target analytes”) within, or comprising, the specimen of interest may be determined by measuring either the current response induced by a voltage-mode excitation, or the voltage response induced by a current-mode excitation. Labeling or marker techniques may be employed, whereby electrochemically active auxiliary molecules are attached to the substance to be analyzed, in order to facilitate or enhance the electrochemical or electrical response.
    Type: Grant
    Filed: September 19, 2003
    Date of Patent: January 24, 2006
    Assignee: World Energy Labs (2), Inc.
    Inventors: William H. Laletin, Kurt Salloux
  • Patent number: 6938172
    Abstract: A data transformation algorithm is selectively applied to each data vector as it enters the pipelined structure. In a selection step, the algorithm compares the bit value of the new data vector with the corresponding bit values of the preceding data vector, and sums the number of logic transitions. The transformation algorithm is applied to the new data vector only if it would reduce the resulting number of transitions, otherwise the data vector is propagated unmodified. Bit inversion is a data transformation algorithm according to the present invention that provides up to a 50% reduction in the number of logic transitions.
    Type: Grant
    Filed: January 18, 2002
    Date of Patent: August 30, 2005
    Assignee: Tektronix, Inc.
    Inventor: Michael S. Hagen
  • Patent number: 6886022
    Abstract: A calculator with liquid ornament includes a base, on a predetermined position of which a downward cavity is formed for detachably or fixedly receiving a hollow enclosure therein. The cavity has dimensions and shape matching with an appearance of the base, and the hollow enclosure has dimensions and shape matching with appearances of the calculator and the cavity to create an integral beauty for the calculator. The hollow enclosure is adapted to contain different types of decorative liquids and floating ornaments therein, giving the calculator a unique appearance and added value.
    Type: Grant
    Filed: March 15, 2002
    Date of Patent: April 26, 2005
    Inventor: Vincent K. Lee
  • Publication number: 20040186864
    Abstract: A delay interval is calculated for a processor that attempts to reserve a reserved shared resource in a multiprocessing system. The delay interval is based on the relationship of a requesting processor and a reservation holding processor. Each delay interval is unique without consistent bias against a processor. The requesting processor queries the reservation status of a shared resource without invalidating an existing reservation. If a shared resource is reserved, the requesting processor waits for an amount of time corresponding to the delay interval before again attempting to reserve the shared resource. The present invention substantially reduces arbitration conflicts within multiprocessor systems.
    Type: Application
    Filed: March 20, 2003
    Publication date: September 23, 2004
    Inventors: Yu-Cheng Hsu, John Norbert McCauley
  • Patent number: 6775129
    Abstract: According to one embodiment of the present invention, a method of converting a computer from a folded position into an alternate position is disclosed. The method includes: providing a display; providing a base coupled to the display; providing a base flap pivotally attached to the display and the base, the base flap being attached to the display at a distance sufficiently away from edges of the display to provide a reduced volumetric size of the computer in a laptop position.
    Type: Grant
    Filed: February 14, 2003
    Date of Patent: August 10, 2004
    Assignee: Intel Corporation
    Inventors: Prosenjit Ghosh, Shreekant Suryakant Thakkar, Truong V. Phan
  • Patent number: 6741956
    Abstract: The present invention is directed to an analog, oligomer-based method for determining a mathematical result of carrying out an operation of matrix algebra on input data. The method comprises representing at least one m-component vector V=&Sgr;iViei by a set of single-stranded oligomers Ei and Ei which are in 1:1 correspondence with the basis vectors ei, i=1, 2, . . . , m in an abstract m-dimensional vector space. A composition comprising at least one set of oligomers Ei and Ei representing the components of a vector is obtained as input date and is subjected to at least one physical or chemical treatment having an effect on the oligomers that is an analog representation of an operation of matrix algebra. The method can be used to represent the operations of a neural network; for example, to produce a content-addressable memory, or a multilayer perceptron.
    Type: Grant
    Filed: August 6, 1998
    Date of Patent: May 25, 2004
    Assignee: Lucent Technologies Inc.
    Inventors: Allen P. Mills, Jr., Bernard Yurke, Philip M. Platzman
  • Publication number: 20040088341
    Abstract: A method for converting an n-dimensional vector to a two-dimensional vector to enable visualization of the n-dimensional vector. The method includes obtaining an n-dimensional reference vector and determining a difference in length and angle between the n-dimensional vector and the reference vector; and determining two-dimensional coordinates of the two-dimensional vector based on the difference in length and angle.
    Type: Application
    Filed: June 4, 2003
    Publication date: May 6, 2004
    Inventor: Susan C Lee
  • Publication number: 20040059760
    Abstract: The present invention provides a waveform detection system featuring a signal-processing function that characterizes and detects non-cyclic transient variations and performs 1/f fluctuation conversion for input waveforms to derive output waveforms, and a state-monitoring system that uses the waveform detection system.
    Type: Application
    Filed: August 11, 2003
    Publication date: March 25, 2004
    Inventors: Youichi Ageishi, Tetsuyuki Wada
  • Publication number: 20040039760
    Abstract: A system and method for assessing and potentially correcting for non-translational motion in a resonance measurement apparatus is provided. The design measures the response of an article, such as an HGA assembly including a read/write head, as well as the excitation of a shaking device, such as a head resonance tester, and computes a correction factor using either two or three point measurement. The correction factor may be evaluated by subjecting the arrangement to further vibration at varying frequencies. Measurement of the shaking device may be accomplished using an accelerometer or by optical measurement using a light beam.
    Type: Application
    Filed: June 4, 2002
    Publication date: February 26, 2004
    Inventors: Harald F. Hess, Patrick Rodney Lee
  • Publication number: 20040030782
    Abstract: A computer system configuration having a minimum cost is decided automatically in a short time from the computer system configurations having necessary processing performance. The system configuration is expressed by four parameters (performance of CPU, number of CPUs, main memory capacity and I/O processing speed) and the four parameters with which the cost can be minimized are derived by utilizing the numerical analysis method using the method of undetermined multipliers of Lagrange or the like under predetermined constraints concerning a response time of transaction processing. On the other hand, the number of jobs which one CPU provided in the system can execute simultaneously is optimized. The system configuration in which the probability having the response time equal to or longer than A is equal to or lower than B and the cost is minimum is derived.
    Type: Application
    Filed: June 26, 2003
    Publication date: February 12, 2004
    Inventor: Yasuhiro Nakahara
  • Patent number: 6650317
    Abstract: A variable function calculator utilizes a fixed program memory array such as a programmed read only memory in which a number of programs are stored depending upon the desired functions of the calculator. The calculator also includes a program counter, an instruction register, control decoders, jump-condition circuits, a clock generator, a timing generator, digit and FLAG mask decoders, key input logic, a register and FLAG data storage array, a decimal and FLAG arithmetic logic unit, an output decoder, and a digit scanner which scans both the keyboard and display outputs. Aside from providing basic desk top calculator functions, the read only memory may be programmed so that the system provides metering functions, arithmetic teaching functions, control functions, etc.. A preferred embodiment of the invention is capable of being fabricated as a monolithic integrated semiconductor system utilizing contemporary metal-insulator-semiconductor techniques.
    Type: Grant
    Filed: January 5, 1995
    Date of Patent: November 18, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Gary W Boone, Michael J Cochran
  • Patent number: 6640235
    Abstract: Modular disk storage modules are combined to form an expandable disk drive base data storage system. Additional modules containing disk drives can be added to the system as memory requirements increases. Data and parity information is distributed amongst three or more disk drives in order to enable data recovery if one of the disk drives ceases to function properly.
    Type: Grant
    Filed: September 7, 1995
    Date of Patent: October 28, 2003
    Assignee: Intel Corporation
    Inventor: Michael H. Anderson
  • Publication number: 20030105784
    Abstract: A method for shared estimation of parameters (&egr;, &phgr;, |C1|, C0, &agr;, &Dgr;&ohgr;) is described, which together with an error vector e(k), describe the connection between a digitally modulated reference signal inputted to a transmission channel and a received receiver signal z(k) which is at an end of the transmission channel. The method includes the following steps: forming the error vector e(k) in dependence of the parameters (&egr;, &phgr;, |C1|, C0, &agr;, &Dgr;&ohgr;), a reference signal s(k), and the receiver signal z(k); linearizing the error vector e(k); substituting a real parameter of the linearized error vector through components of a estimation vector, wherein a substituted error vector is produced; inserting the substituted error vector into the cost function; and determining the estimation vector through gradient development of the cost function and subsequently setting the gradient to zero.
    Type: Application
    Filed: November 22, 2002
    Publication date: June 5, 2003
    Inventor: Kurt Schmidt
  • Publication number: 20030065690
    Abstract: An on-line accessible information management system for management of environmental, safety and regulatory compliance issues provides smart links to major information centers for any industry to provide easy access to relevant information. The system of the subject invention is designed to assist the user in determining the regulatory requirements of a relevant industry, provide the resources for complying with the requirements, prepare reports, and electronically submit the reports to agencies having on-line reporting capability. The system is secure for each user, but will permit the sharing of public data in order to increase each user's data base. The system of the invention also includes a digital library providing each user with a full complement of regulatory information and research services. The system provides data collection, calculation, and reporting capabilities for environmental and regulatory compliance.
    Type: Application
    Filed: May 4, 2001
    Publication date: April 3, 2003
    Inventor: J. Roger Kelley
  • Patent number: 6542841
    Abstract: A method is provided for managing test measurements for an optical entity. The method can include determining if testing is needed, and building an object that includes a test variable and a plurality of independent variables. If testing is needed, the method can include measuring a test variable value, and revising the object to include the test variable value.
    Type: Grant
    Filed: August 10, 1999
    Date of Patent: April 1, 2003
    Assignee: Tyco Telecommunications (US) Inc.
    Inventor: Timothy C. Snyder
  • Publication number: 20030055949
    Abstract: A method and apparatus are provided for measuring a bit rate between a client and a server. In an embodiment of the invention, a number of bits included only within one or more transaction units are measured over a time period. The time period is a sum of time durations of each of the transaction units. In an embodiment of the invention, bit rate measurements are performed on a server and in another embodiment of the invention bit rate measurements are performed on a client. Embodiments of the invention include adapting, by the server, of content to be sent to the client based on the bit rate measurements. Embodiments of the invention further include reporting the measured bit rate to the server when the bit rate measurements are performed on the client. Other aspects of the invention include sending an indication of the measured bit rate and a desired bit rate to the server when bit rate measurements are performed in the client.
    Type: Application
    Filed: June 19, 2001
    Publication date: March 20, 2003
    Inventors: Stephane Coulombe, Guido Grassel, Fred Ware, Suresh Chitturi
  • Publication number: 20020174151
    Abstract: A method of calculating a formula on a collection of series of data values, the method comprising the steps of: (a) for each data value member of a first one of the collection, determining a window around a current data value member of data values required to calculate the formula; (b) utlizing the window to determine the memory location of the stored location of corresponding data values in the calculation of the forumula when applied to other series of data values in the collection.
    Type: Application
    Filed: March 28, 2001
    Publication date: November 21, 2002
    Inventors: Mark Damon Schneider, Henricus Raath, Colin Arthur Lipworth
  • Patent number: 6473307
    Abstract: The present invention provides a method and apparatus for efficient electronics positioning and connection systems. In one embodiment of the present invention, electronic components are inserted into a connection rack from the front such that connections face the front side of the connection rack. In another embodiment of the present invention, electronic components are inserted into a connection rack from a side such that connections face the front side of the connection rack. In one embodiment, a connection rack is positioned with the back side against a wall. In another embodiment two connection racks are positioned such that the back side of a first connection rack is against the back side of a second connection rack. In one embodiment, a power supply is positioned near the top of the connection rack. A common power line couples the power supply to the electronic components. Thus, the need for heat-producing power supplies in each component is eliminated.
    Type: Grant
    Filed: February 15, 2001
    Date of Patent: October 29, 2002
    Assignee: Sun Microsystems, Inc.
    Inventor: Michael J. Mallette
  • Publication number: 20020138882
    Abstract: The invention provides isolated pyruvate dehydrogenase kinase nucleic acids and their encoded polypeptides. The present invention provides methods and compositions relating to altering pyruvate dehydrogenase kinase levels in plants. The invention further provides recombinant expression cassettes, host cells, transgenic plants, and antibody compositions.
    Type: Application
    Filed: February 1, 2002
    Publication date: September 26, 2002
    Inventors: Rebecca E. Cahoon, Hajime Sakai, Xiping Niu
  • Patent number: 6430511
    Abstract: A molecular computer is formed by establishing arrays of spaced-apart input and output pins on opposing sides of a containment, injecting moleware in solution into the containment and then allowing the moleware to bridge the input and output pins. Moleware includes molecular alligator clip-bearing 2-, 3-, and molecular 4-, or multi-terminal wires, carbon nanotube wires, molecular resonant tunneling diodes, molecular switches, molecular controllers that can be modulated via external electrical or magnetic fields, massive interconnect stations based on single nanometer-sized particles, and dynamic and static random access memory (DRAM and SRAM) components composed of molecular controller/nanoparticle or fullerene hybrids. The current-voltage characteristics that result from the bridging between input and output arrays can be ascertained using another computer to identify the bundles of inputs and corresponding outputs that provide a truth table for the specific functions of the computer.
    Type: Grant
    Filed: January 20, 2000
    Date of Patent: August 6, 2002
    Assignee: University of South Carolina
    Inventors: James M Tour, Mark A Reed, Jorge M Seminario, David L Allara, Paul S Weiss
  • Patent number: 6415256
    Abstract: A computer system with speech recognition system and handwriting recognition system are disclosed that work closely together to improve the total recognition accuracy of each alone. The handwriting recognition system may include a pen/stylus input device and associated program functions. The system or programs may be combined with computer telephony functions to provide intergrated applications having voice output programs, Internet access, e-mail/v-mail and personal information manager functions. The computer system can recognize speaker-dependent and speaker-independent speech, converting this information to computer recognizable text, which may be displayed onto a display device in near realtime. Speech recognition errors may be corrected via a pen input device, and the pen information may be recognized, converted to text and graphics. This data may then be displayed at near realtime or displayed later at a user specified time.
    Type: Grant
    Filed: November 27, 2000
    Date of Patent: July 2, 2002
    Inventor: Richard Joseph Ditzik
  • Publication number: 20020068604
    Abstract: A wearable data network is disclosed. The wearable data network a universal data warehouse (UDW) and at least one purpose optimized device (POD). The UDW is carried by the user and is, essentially, a personal data warehouse to store data having a variety of different types and uses (e.g., personal financial data, audio and video files, and presentation files). The UDW, however, is incapable of processing the user's data. Instead, one PODs are used in conjunction with one or more UDWs to process the user's data. As is suggested by its name, a POD is a device that has been optimized to carry out a specific purpose. One example, is a POD that is designed to play the user's audio files, another example is a POD that is designed to render the user's video files, and yet another example is a POD that is designed to render the user's presentation files.
    Type: Application
    Filed: December 4, 2000
    Publication date: June 6, 2002
    Inventors: Samuel Muthiah Prabhakar, Bryan Lester Striemer, Luis Valdez, George Willard Van Leeuwen
  • Publication number: 20020055961
    Abstract: A multiprocessor system (10) includes a plurality of processing modules, such as MPUs (12), DSPs (14), and coprocessors/DMA channels (16). Power management software (38) in conjunction with profiles (36) for the various processing modules and the tasks to executed are used to build scenarios which meet predetermined power objectives, such as providing maximum operation within package thermal constraints or using minimum energy. Actual activities associated with the tasks are monitored during operation to ensure compatibility with the objectives. The allocation of tasks may be changed dynamically to accommodate changes in environmental conditions and changes in the task list. As each task in a scenario is executed, a control word associated with the task can be used to enable/ disable circuitry, or to set circuits to an optimum configuration.
    Type: Application
    Filed: August 17, 2001
    Publication date: May 9, 2002
    Inventors: Gerard Chauvel, Dominique D'Inverno
  • Patent number: 6366935
    Abstract: A portable lightweight combination laptop and pad computer has a display mounted on a main housing for movement between a closed position and an open position. In the closed position, a keyboard is covered by the undersurface of the display and the display viewing surface remains visible so that the computer may be used in the pad mode with a conductive stylus for data and command entry. In the open position, the keyboard is exposed so that the computer may be used in a laptop or desk top mode, or in a combined mode including the pad mode. The display is mounted to the housing by a four bar hinge mechanism, and a pair of latches are provided approximately mid-way between the front and rear portions of the housing along the side margins to securely latch the display in the closed position for storage, transit or use in the pad mode.
    Type: Grant
    Filed: January 18, 2001
    Date of Patent: April 2, 2002
    Assignee: AST Research, Inc.
    Inventors: Jeff C. Hawkins, John J. Daly
  • Patent number: 6351752
    Abstract: A method of detecting a change to a collection of objects is disclosed. One step of the method includes generating a first collection value that is based upon object values associated with the objects of the collection. Another step of the method includes storing the first collection value. The method also includes the step of generating a second collection value that is based upon the object values after the storing step. Moreover, the method includes the step of determining whether the collection has changed based upon the second collection value and the stored first collection value. A computer readable medium which configures a processor to detect a change to a collection of objects is also disclosed.
    Type: Grant
    Filed: July 8, 1998
    Date of Patent: February 26, 2002
    Assignee: NCR Corporation
    Inventors: William R. Cousins, Franz Badias, William S. Means
  • Publication number: 20010052798
    Abstract: A data carrier (1) includes a chip (10) having a supply voltage circuit point (12), from which a supply voltage (V) can be taken, and having at least one supply voltage output (21, 22) for supplying a supply voltage (V1, V2), and having potential control means (35, 49) to which a control signal (S) can be applied and with the aid of which the supply voltage output (21, 22) can be set to different potential values in accordance with the control signal (S), and also includes at least one component (24, 29) which is spatially separated from the chip (10), which component (24, 29) has a supply voltage input (25, 30) for receiving the supply voltage (V1, V2), which the supply voltage input (25, 30) is connected to the supply voltage output (21, 22) of the chip (10) via a connection lead (27, 32).
    Type: Application
    Filed: April 3, 2001
    Publication date: December 20, 2001
    Inventors: Klaus Ully, Peter Thueringer, Peter Kompan, Wolfgang Meindl, Andreas Muehlberger
  • Patent number: 6243727
    Abstract: The described embodiments of the present invention provide a docking station having connection means for coupling to an external monitor, an external keyboard, and means for connecting the portable computer to the docking station. The docking station further includes means for determining whether or not the external monitor is coupled to the docking station, automatically displaying on the external monitor when the external monitor is coupled to the docking station and displaying on the display of the portable computer when said external monitor is not coupled to said docking station. The docking system defaults to a default setting configured in a setup program of the portable computer if no external monitor is coupled to said docking station. In a preferred embodiment, at least a portion of a top housing cover of the docking station is moveable to facilitate opening of the portable computer to permit user access to the internal display and keyboard of the portable computer.
    Type: Grant
    Filed: November 8, 1994
    Date of Patent: June 5, 2001
    Assignee: Texas Instruments Incorporated
    Inventor: LaVaughn F. Watts, Jr.
  • Publication number: 20010001859
    Abstract: A portable lightweight combination laptop and pad computer has a display mounted on a main housing for movement between a closed position and an open position. In the closed position, a keyboard is covered by the undersurface of the display and the display viewing surface remains visible so that the computer may be used in the pad mode with a conductive stylus for data and command entry. In the open position, the keyboard is exposed so that the computer may be used in a laptop or desk top mode, or in a combined mode including the pad mode. The display is mounted to the housing by a four bar hinge mechanism, and a pair of latches are provided approximately mid-way between the front and rear portions of the housing along the side margins to securely latch the display in the closed position for storage, transit or use in the pad mode.
    Type: Application
    Filed: January 18, 2001
    Publication date: May 24, 2001
    Inventors: Jeff C. Hawkins, John J. Daly
  • Patent number: 6219681
    Abstract: A portable lightweight combination laptop and pad computer has a display mounted on a main housing for movement between a closed position and an open position. In the closed position, a keyboard is covered by the undersurface of the display and the display viewing surface remains visible so that the computer may be used in the pad mode with a conductive stylus for data and command entry. In the open position, the keyboard is exposed so that the computer may be used in a laptop or desk top mode, or in a combined mode including the pad mode. The display is mounted to the housing by a four bar hinge mechanism, and a pair of latches are provided approximately mid-way between the front and rear portions of the housing along the side margins to securely latch the display in the closed position for storage, transit or use in the pad mode.
    Type: Grant
    Filed: August 29, 1995
    Date of Patent: April 17, 2001
    Assignee: AST Research, Inc.
    Inventors: Jeff C. Hawkins, John J. Daly
  • Patent number: 6195670
    Abstract: The present invention relates generally to an apparatus for converting an open architecture computer into both an open and a closed architecture computer. The open architecture computer includes a housing defining a housing space and a computer processor disposed in the housing space of the housing. In one embodiment the apparatus comprises a modular computer peripheral physically connectable to only one open architecture computer, and a communication means electrically connectable to the open architecture computer and the modular computer peripheral for permitting communication between the computer processor of the open architecture computer and the controller of the modular computer peripheral. The modular computer peripheral comprises a housing defining a plurality of module bays. At least one module is disposed in one of the module bays and at least one of the modules comprising a closed architecture computer which is capable of operating independently of the open architecture computer.
    Type: Grant
    Filed: July 23, 1999
    Date of Patent: February 27, 2001
    Assignee: Automated Business Companies
    Inventor: Charles C. Freeny
  • Patent number: 6144976
    Abstract: A portable data collection terminal has an elongate housing with a hand grip conforming rear surface. A front surface features a numerical keyboard adjacent a lower end of the housing and an LCD screen adjacent the keyboard toward an upper end of the housing. The display screen is of elongate rectangular shape, its length extending longitudinally of the housing of the data terminal. The active area of the display screen is covered by a touch sensitive overlay screen which is configured in one mode of operation of the data terminal into an alphabetical keyboard. The orientation of the display is switchable between orientations in which the line direction of the displayed data extends across or longitudinally of the data terminal. The keys of the numerical keyboard are identified by indicia disposed on a template. The orientation of the template may be sensed to switch the orientation of the displayed data and touch sensitive key identifiers to correspond to the orientation of the indicia on the template.
    Type: Grant
    Filed: September 27, 1996
    Date of Patent: November 7, 2000
    Assignee: Norand Corporation
    Inventors: Dennis Silva, Paul Beard, Steven Darren Friend, Arvin D. Danielson, Darrell L. Boatwright, Rickey G. Austin, Daniel E. Alt, Darald R. Schultz
  • Patent number: 6141667
    Abstract: A portable computer is provided with a clam shell case design, sealed with a sealant, form-fitted sealing units, a detachable handle, a detachable shoulder strap, and a detachable rear housing combination which increase the portability of the computer. The portability of the computer is increased because the clam shell case with sealant, and port sealing units, along with the detachable rear unit, combine for protection of the inside of the computer, including the internal circuitry, the display, keyboard, pointing device (or mouse), power cord, battery pack, extra batteries, and extra diskettes from the weather, increasing portability. The sealant waterproofs the portable computer by being placed between the top housing and the bottom portion of the portable computer, eliminating the need for a separate carrying case to hold the portable computer and to protect the portable computer from the elements. The form-fitted port sealing units protect the ports and the internal circuitry from the elements.
    Type: Grant
    Filed: July 12, 1994
    Date of Patent: October 31, 2000
    Inventor: Mark Blaise Duff
  • Patent number: 6119048
    Abstract: A digital signal process of a plurality of functions is enabled by a common hardware constructed on one chip having input terminals t1, t2 and t2'; output terminals t3 and t4; and a control signal input terminal t5. The chip is constructed to include class sorting circuits 111a and 111b; delay and selecting circuits 112a and 112b; switching circuits 113a and 113b; switching circuits 114a and 114b; coefficient memories 115a and 115b; filter operating circuits 116a and 116b; a line delay circuit 117; a product sum operating circuit 118; and a switching circuit 119. Signal flow and circuit functions are selectively controlled by control signals. The functions of the chip can be consequently switched and a plurality of signal processes are realized by one chip.
    Type: Grant
    Filed: January 12, 1999
    Date of Patent: September 12, 2000
    Assignee: Sony Corporation
    Inventors: Tetsujiro Kondo, Takashi Horishi
  • Patent number: 6085218
    Abstract: Hard, real-time, multi-tasking system is monitored by combined hardware and software and logic to detect overrun of any task beyond a declared maximum processor cycle limit for the task. Processor execution cycles utilized by DMA or interrupt processing and not related to the task being executed are not counted. Counter hardware and control logic reduces software overhead for monitoring execution cycle utilization by a task and provides capability not only of overrun detection, but programmed cycle usage alarm, consumed cycle count and overall processor loading or utilization measurements to be made.
    Type: Grant
    Filed: July 13, 1994
    Date of Patent: July 4, 2000
    Assignee: International Business Machines Corporation
    Inventor: Donald Edward Carmon
  • Patent number: D514152
    Type: Grant
    Filed: June 18, 2004
    Date of Patent: January 31, 2006
    Inventor: Vincent K. Lee
  • Patent number: RE39429
    Abstract: A portable lightweight combination laptop and pad computer has a display mounted on a main housing for movement between a closed position and an open position. In the closed position, a keyboard is covered by the undersurface of the display and the display viewing surface remains visible so that the computer may be used in the pad mode with a conductive stylus for data and command entry. In the open position, the keyboard is exposed so that the computer may be used in a laptop or desk top mode, or in a combined mode including the pad mode. The display is mounted to the housing by a four bar hinge mechanism, and a pair of latches are provided approximately mid-way between the front and rear portions of the housing along the side margins to securely latch the display in the closed position for storage, transit or use in the pad mode.
    Type: Grant
    Filed: April 2, 2004
    Date of Patent: December 12, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeff C. Hawkins, John J. Daly