Abstract: An apparatus for discharging pressurized liquids at elevated positions includes a holding adapter, an actuating assembly, and an extension pole. The holding adapter includes first body member for holding a canister of pressurized liquid. The canister has an actuating stem extending from its top end thereof. An actuator nozzle is formed of an annular flange and a cap-like head portion. The head portion is disposed over the actuating stem. A handle portion is formed integrally with the first body member and extending downwardly from the holding adapter. The actuating assembly is telescoped over the canister and the holding adapter and includes a second body member for applying a downward force on the annular flange of the actuating nozzle to activate the actuating for discharging the pressurized liquid therefrom. The extension pole is operatively connected to a distal end of the handle portion and is adjustable to desired elevated positions.

Abstract: A method and apparatus for electrical stimulation of the lower esophageal sphincter (LES) is provided. Electrode sets are placed in the esophagus in an arrangement that induce contractions of the LES by electrical stimulation of the surrounding tissue and nerves. The electrical stimulus is applied by a pulse generator for periods of varying duration and varying frequency so as to produce the desired contractions. The treatment may be short-term or may continue throughout the life of the patient in order to achieve the desired therapeutic effect. The stimulating electrode sets can be used either alone or in conjunction with electrodes that sense esophageal peristalsis. The electrode sets can be placed endoscopically, surgically or radiologically.

Abstract: A bucket tackle system for organizing, transporting and storing of fishing rods and reels is provided which includes a bucket, a fishing rod and reel holder insert assembly, and a cover. The bucket has a closed bottom base and a cylindrical side wall extending upwardly from the closed bottom base and terminating in an open end. The holder insert assembly includes a flat disc portion, a plurality of end cap members fixedly secured to the disc portion, and a plurality of hollow tubular members having a first end and a second end. The first end of each of the plurality of tubular members is fixedly secured to a corresponding one of the plurality of end cap members so as to be vertically extending therefrom. The second end of each of the plurality of tubular members is formed with opposed first and second slots adapted for holding handle portions of the fishing rods and reels.

Abstract: An improved apparatus used in press brakes having a lower press member and an upper press member which are movable relative toward and away from each other for bending and forming sheet materials is provided. The apparatus includes a die base, first and second mobile carrier shoes, a plurality of spacer bars, and a pair of anvils. Each one of the pair of anvils is formed with four corners each having a separate and distinct radius of curvature so as to define four alternative forming surfaces. Each one of the anvils are selectively rotatable so that one of the four corners having the same radius of curvatures are on top and facing inwardly toward the other corresponding to first through fourth ones of the four alternative forming surfaces and forming first through fourth die-size openings therebetween used for bending and forming a material of different predetermined gauges.

Abstract: A garage door reinforcement arrangement for supporting and anchoring a garage door to a garage door opening includes an I-post beam assembly, a top mounting bracket, a floor plate, and a plurality of cable assemblies. The top mounting bracket is used to secure the top end of the I-post beam against vertical movement. The floor plate is used for securing the bottom end of the I-post against vertical movement. The plurality of cable assemblies are disposed at different vertical positions of the I-post beam for securing the beam immediately adjacent to the garage door so that the garage door is allowed to flex slightly as wind loads are transferred to the beam.

Abstract: A method of eliminating contamination of tunnel oxide in stacked gates due to SAS photoresist process and preventing of n+ implantation caused by resist residue from the SAS photoresist process in fabricating of semiconductor memory devices is disclosed. The process provides for providing stacked gates separated by trenches on the semiconductor memory device. Source and drain implants are performed on the semiconductor memory device before the SAS etch is accomplished. The trenches between the stacked gates are filled with oxide so as to cover the entire surface of the semiconductor memory device prior to applying a SAS photoresist mask. Then, a SAS photoresist mask is applied to a flat top surface of the semiconductor memory device. A SAS etch is performed on the semiconductor memory device so as to remove the oxide.

Abstract: There is provided an improve BIST frontend state machine and a method for micro-architectural implementation of the same which is achieved with a minimal amount of test logic circuitry. The state frontend machine includes a state controller responsive to clock signals, control signals, and output register signals for generating output state signals based upon a fixed number of states utilizing death logic so as to sequence through one of a plurality of sets of tests until completed or failed. A substantial savings of approximately 40% in the I.C. chip area was realized in comparison to the implementation by a conventional state machine.

Abstract: There is provided a communication network and method for enhancing server availability to client PCS which includes two Ethernet switches. Each one of the two Ethernet switches is connected to a corresponding one of the primary and secondary network interface cards in the file server PC. The two Ethernet switches are interconnected together through an uplink port. As a result, redundancy has been effectively and efficiently provided against the failure of either one of the two switches in order to enable link fail-over across two network segments.

Abstract: There is provided a tester interface circuit for use with a BIST state machine and a method for micro-architectural implementation of the same so as to enable cycling through a BIST test. The tester interface circuit includes a storage device, a logic decoder, a set/clear mechanism, and a polling logic device. The tester interface circuit is implemented with a minimum amount of chip area on a semiconductor IC.

Abstract: A method for forming a high voltage gate oxide having a high quality and reliability for use with non-volatile memory devices is provided. Field oxide isolation regions are formed in the top surface of a semiconductor substrate so as to define a first active region, a second active region, and a third active region. A sacrificial oxide layer is formed on the top surface of the semiconductor layer and overlying the first through third active regions. The sacrificial oxide layer is removed from only the first active region. A tunnel oxide layer is formed over the first active region and over the sacrificial oxide layer overlying the second active region and the third active region. A floating gate structure is formed in the first active region. The tunnel oxide layer and the sacrificial oxide layer over the respective second active region and third active region are removed subsequent to forming the floating gate structure.

Abstract: A telephone micro-tester and transport system for testing smaller remote SLC customer's lines and terminal equipment is provided. A micro-tester is located at a remote terminal for measuring and storing signatures of test performed on the SLC customer's lines and terminal equipment to determine faults. A first modem is located at the remote terminal and is coupled to the micro-tester for transferring the measured and stored signatures of the test performed to a second modem. The second modem is located at the telephone company's central office for receiving the measured and stored signatures of the tests performed which are being transferred by the first modem. A synthesizer is located at the telephone company's central office and is coupled to the second modem for re-creating virtual signatures of the test performed by the micro-tester at the remote terminal and for transporting the them to a test system at the telephone company's central office.

Abstract: There is provided a reading circuit and method for performing program verify, erase verify, and over-erase-correction verify modes of operations on a selected memory core cell in an array of Flash EEPROM memory core cells. A fixed control gate bias voltage is applied to the control gate of a core cell transistor whose state is to be verified for generating a core cell drain current. Varied control gate bias voltages are applied to the control gate of a single reference cell transistor for generating different reference currents corresponding to predetermined modes of operations. In a second embodiment, the different reference currents are generated from a current source.

Abstract: An alarm filter circuit used in telecommunication systems for interconnecting between incoming telephone lines and alarm unit located at a subscriber's premises so as to block DSL data signals to and from the alarm unit for preventing interference is provided. In one preferred embodiment, the alarm filter circuit includes a second-order low-pass filter section for blocking the DSL data signals to and from the alarm unit, a first-order high-pass filter section for bypassing the DSL data signals on the incoming telephone lines to the house wiring, and a first-order low-pass filter section for blocking high-frequency signals between the house wiring and the alarm unit. In a second embodiment, a fourth-order elliptical low-pass filter section replaces the second-order low-pass filter section. In a third embodiment, a third-order high-pass filter section replaces also the first-order high-pass filter section.

Abstract: A protection circuit structure for use with silicon-on-insulator integrated circuits is provided so as to improve electrostatic discharge protection capability. The protection circuit structure includes a P/N junction defining a protection diode. The protection diode is formed underneath an electrically conductive input pad associated with a conventional SOI semiconductor device.

Abstract: An improved EEPROM cell with a self-aligned tunneling window is provided which is fabricated by a standard STI process so as to produce a smaller layout size and a reduced cell height. The EEPROM cell includes a floating gate, a programmable junction region, and a tunneling oxide layer separating the programmable junction region and the floating gate. The length dimension of the floating gate is less than the length dimension of the tunneling window so that the tunneling window is overlapping the floating gate. The tunneling window is self-aligned by edges forming the length dimension of the floating gate so as to form a self-aligned tunneling window.

Abstract: An improved method of forming circuit structures having linewidths which are smaller than what is achievable by conventional UV lithographic techniques on ultra-thin resist layers is provided. The method includes a hardmask which is patterned using an ultra-thin resist layer and is then trimmed to reduce the width of the hardmask before etching the underlying gate conductive layer.

Abstract: A Silicon-Chip-Display (SCD) cell structure operable in a field sequential mode for use in liquid crystal display (LCD) devices and a method for operating the same provided. The SCD cell structure is formed of first through third write-enable transistors, first through third storage capacitors, and first through third display-enable transistors. In one preferred embodiment, each of the write-enable transistors is sequentially turned on so to pre-load video data into the corresponding storage capacitors during one color-field time prior to when each of the corresponding display-enable transistors is sequentially turned on for displaying an associated color-field. As a consequence, there is rendered a higher quality video image by allowing the LC response time and/or the light strobing time to be increased.

Abstract: There is provided a ground check system used with an input module and/or sort module of a test handler for checking automatically grounding wires associated with moving parts thereof. The ground check system includes a sensing circuit which is responsive to ESD voltages associated with the grounding wires and to a reference voltage for generating an output voltage. A visual indicator device is mounted on the input module and/or sort module of the test handler and is responsive to the output voltage for alerting an operator of a malfunction in the grounding wires. An output buffer section is also responsive to the output voltage for shutting down the input module and/or sort module when there is a malfunction in the grounding wires.

Abstract: There is provided an on-wafer apparatus and method for calibrating the sensitivity of a patterned wafer defect inspection tool during set-up which is used to detect defects on the surface of a semiconductor wafer during the stages of a fabrication process. A semiconductor wafer which is to be inspected for defects is provided. A calibration structure having known defects is introduced on a selected area of the semiconductor wafer which is to be inspected prior to, the inspection. The calibration structure includes a plurality of intentionally-introduced defects each being of a progressively smaller size dimension. Calibration of the sensitivity of the defect inspection tool is accomplished by scanning the semiconductor wafer with the calibration structure in order to determine the defects which are known to exist.

Abstract: An alarm filter circuit used in telecommunication systems for interconnecting between incoming telephone lines and alarm unit located at a subscriber=s premises so as to block DSL data signals to and from the alarm unit for preventing interference is provided. In one preferred embodiment, the alarm filter circuit includes a first inductor, a second inductor and a third capacitor functioning as a second-order low-pass filter section so as to block the DSL data signals to and from the alarm unit. Second and third capacitors functioning as a first-order high-pass filter section is provided so as to bypass the DSL data signals on the incoming telephone lines to the house wiring. A third inductor and a fourth inductor functioning as a first-order low-pass filter is provided so as to block high-frequency signals between the house wiring and the alarm unit. In a second embodiment, a fourth-order elliptical low-pass filter section replaces the second-order low-pass filter section.