Abstract: An imaging array of the charge transfer type having improved sensitivity is disclosed. The array includes a plurality of substantially parallel charge transfer channels with channel stops therebetween which extend a distance into a semiconductor body. At least some of the channel stops have blooming drains therein for the removal of excess photogenerated charge. The improvement comprises potential barrier means which constrain electrical charge generated by absorption of light in the body to flow into the channels while preventing the loss of such charge by direct flow to the blooming drains. Potential barrier means include buried barrier regions extending a further distance into the body from those channel stops having blooming drain regions therein.The invention also includes an improved method of forming this array wherein the improvement comprises forming buried barrier regions containing a greater concentration of conductivity modifiers than the channel stops after the blooming drains are formed.

Abstract: The present invention relates to a frame transfer charge-coupled device imager which includes along a major surface of a substrate of semiconductor material a photosensing array A-register, a temporary storage B-register and an output C-register. The C-register includes a channel region in the substrate and extending along the substrate surface across the ends of and substantially perpendicular to spaced, parallel channel regions of the B-register. The C-register also includes a plurality of parallel, conductive gates extending transversely across the C-register channel region substantially parallel to the B-register channel regions. The gates include a plurality of sets with a plurality of gates per set. One gate of each set extends to a conductive termination which extends along one side of the C-register channel region over the B-register and the gates of the other sets extend to conductive terminations which are along the side of the C-register channel region opposite the B-register.

Abstract: A hydrogen-oxygen fuel cell is provided which includes as the fuel a mixture comprised of about 40 to 60% by volume of formaldehyde and about 60 to 40% by volume of propionaldehyde. The operation of hydrogen-oxygen fuel cells is improved with regard to the amount of electrical power produced, the length of time of operation between discharges of the hydrogen-oxygen fuel cell and the number of times the hydrogen-oxygen fuel cell can be rejuvenated before replacement of electrolyte.

Abstract: A three part edge seal for an integrated circuit semiconductor chip is disclosed. The edge seal includes two separate layers of metal one of which overlays the other in electrical contact. One of the metal layers is in ohmic contact with a highly doped region formed in the planar surface of the semiconductor body. The two metal layers serve as an electrical conductor to distribute power to various portions of the integrated circuit contained in the chip and electrically charge the highly doped region to prevent migration of ions into the active areas of the integrated circuits.

Abstract: The yield of field transfer CCD imagers made in a wafer of single crystalline silicon is improved by making the imagers in groups of at least two imagers, and preferably four imagers, with the A-registers of all the imagers in a group being adjacent each other. The groups of imagers are formed in columns on the surface of the wafer with one group being at the center of the wafer and the other group being around the center group and positioned radially outwardly form the center group toward the edge of the wafer.

Abstract: A zener diode structure for integrated circuits is disclosed. The device includes a pair of opposing zener diodes separated by a parasitic resistance. The zener breakdown junctions of the two diodes are well below the surface of the device thereby reducing any adverse effect of stray surface charges and ultraviolet radiation. Further, the doping levels of the opposing diodes are selected to reduce drift in the breakdown voltage due to variations in operating temperature of the device.

Abstract: A high power thick film resistor having improved power handling capability is obtained with a resistor having two overlying thick film layers wherein the first thick film layer has a relatively low resistivity and the second thick film layer has a relatively high resistivity.

Abstract: A vertical MOSFET in a silicon wafer having opposing major surfaces includes a source electrode on one surface, a drain electrode on the second surface, and an internally disposed insulated gate. The silicon between the insulated gate and each of the major surfaces is of first conductivity type and the silicon that is laterally adjacent to the insulated gate is of second conductivity type, such that a predetermined voltage on the insulated gate creates an inversion channel extending a predetermined distance into the laterally adjacent silicon. That portion of the laterally adjacent silicon where the inversion channel is formed is of relatively lightly doped material, whereas other areas of the laterally adjacent silicon is relatively heavily doped.

Abstract: An IGFET device includes a semiconductor wafer having a first conductivity type drain region contiguous with a wafer surface. A second conductivity type body region extends into the wafer from the wafer surface so as to form a body/drain PN junction having an intercept at the surface; the body region further including a body-contact portion of relatively high conductivity disposed at the surface. A first conductivity type source region extends into the wafer so as to form a source/body PN junction which has first and second intercepts at the surface. The first intercept is spaced from the body/drain intercept so as to define a channel region in the body region at the surface, and the second intercept is contiguous with the body contact portion. The second intercept is relatively narrowly spaced from the first intercept along most of the length of the first intercept and is relatively widely spaced from the first intercept at one or more predetermined portions.

Abstract: A MOSFET device comprises a semiconductor wafer which includes a drain region of first conductivity type contiguous with a wafer surface. A diffused body region of second conductivity type extends into the wafer from the wafer surface so as to form a body/drain PN junction which has a polygonally-shaped intercept at the wafer surface. A plurality of source regions of first conductivity type extends into the wafer from the wafer surface within the boundary of the body region. The source regions define a plurality of channel regions, a contact area, and at least one shunt region at the surface of the body region. Each shunt region extends from the contact area to one of the corners of the body/drain PN junction polygonal intercept. A source electrode contacts the body region contact area and each of the source regions adjacent thereto.

Abstract: An array of infra-red (IR) detectors for a CCD image sensor includes a plurality of spaced areas of a conductive material at the surface of a substrate of semiconductor material of one conductivity type with each conductive area forming a Schottky-barrier diode with the substrate to form the IR detectors. Each detector includes a high conductivity contact region within the substrate. Between the detector area is a guard band which consists of a region of a conductivity type opposite to that of the substrate within the substrate and around said detector area. The guard band is spaced from the contact regions and each conductive area overlaps a portion of its adjacent guard band.

Abstract: A protection circuit comprises first and second circuit to respectively protect an IC against negative and positive going transients in an input signal. If the input includes a repetitive signal greater than a threshold for firing the negative going protection circuit, substrate current injection and signal clamping will result. To prevent this, the first circuit includes an emitter-base shunt resistor and a Zener diode coupled to a pair of opposite conductivity type transistors to lower the threshold thereof. Each of the circuits comprises a pair of opposite conductivity type transistors formed in a single isolated region, which in turn is formed in an opposite conductivity type substrate.

Abstract: A zener diode structure for integrated circuits is disclosed. The device includes a pair of parallel zener diodes connected back to back with a third zener diode. The anode of one of the parallel diodes is connected to the anodes of the other two diodes through a parasitic resistance. The zener breakdown junctions of two of the diodes are well below the surface of the device thereby reducing any adverse affect of stray surface charges and ultraviolet radiation. Further, the doping levels of the opposing diodes are selected to reduce drift in the breakdown voltage due to variations in operating temperature of the device.

Abstract: A VDMOS device comprises a semiconductor wafer having a major surface with a first conductivity type drain region thereat. An array of second conductivity type body regions, spaced from each other by distance D, is diffused into the drain region from the first surface. The body regions each include a relatively high conductivity supplementary body region and a first conductivity type source region diffused therein from within the first surface boundary thereof. The spacing between each source region and the drain region defines a channel region at the first surface. A source electrode contacts the source and body regions and an insulated gate electrode overlies each channel region. A gate bond pad, in direct contact with the gate electrode, overlies a second conductivity type gate shield region and is insulated therefrom. The gate shield region is contiguous with the drain region and is spaced from the neighboring channel regions by distance D.

Abstract: An LCD pixel in accordance with the invention has disposed on a substrate a segmented back-to-back diode, an address line, and an electrode adjacent to the address line. The electrode has an additional portion, with one diode segment disposed on the additional portion and the other diode segment disposed on the address line. A free area of the substrate is adjacent to the additional portion so that the diode area is accurately defined.

Abstract: Apparatus for irradiating deep ultraviolet (DUV) photoresist-sensitive material on a single substrate, such as a wafer, from a xenon lamp source providing pulsed radiation in the DUV range. A spherical reflector reinforces direct radiation to provide a radiation beam with predetermined divergence confined by a cylindrical baffle. The walls of the baffle are either reflective or absorptive to provide either a curing function or mask exposure imaging function as desired.A wafer having single layer or multi-layer photoresist material sensitive to DUV is either exposed for imaging for pattern development with high resolution and uniformity even with thin photoresist layers or for curing the patterned layers.

Abstract: An apparatus is disclosed for in-process storage of a stack of molded discs which is comprised of a rigid base member and inflatable tubular member attached to the base member which can be inflated so as to hold the stack of discs placed on the base member securely in position and protected from physical damage during storage.

Abstract: A solid-state detector assembly for a television camera includes a beam-splitting prism having an inlet port and three outlet ports. A pair of mounting plates each having opposed major surfaces extend across the top and bottom of the prism and have a major surface secured to the prism. Each of the mounting plates has a separate pair of spaced slots in its edge adjacent each of the outlet ports. Each of the slots in one of the mounting plates is aligned with a separate slot in the other mounting plate. A separate pair detector support rods extends between the mounting plates adjacent each outlet port. Each of the detector support rods extends through the slots in the mounting plates and projects beyond the major surfaces of the mounting plates. A separate detector is mounted on each of the pair support rods and extends across an outlet port.

Abstract: Selected areas of the surface of a substrate, such as the surface of a substrate of single crystalline silicon having at least one CCD image sensor along an opposed surface of the substrate, is coated with a metal by coating the surface to be coated with a layer of a photoresist. The substrate is then supported, such as by a vacuum chuck, with the photoresist layer being exposed. A mask, which is supported above the substrate, is moved close to but spaced from the photoresist layer. The substrate is then moved, such as by means of an x-y-.theta. aligner table on which the chuck is mounted, until a pattern on the mask is aligned with areas of the substrate surface. A light directed through the substrate and the mask from below the substrate and viewed by a microscope above the mask assists in achieving the alignment. The mask is then lowered onto the photoresist layer and lies thereon under only its own weight. Radiation is then directed onto the photoresist layer through the mask.

Abstract: The semiconductor device includes a layer of silicon nitride (Si.sub.3 N.sub.4) beneath a phosphosilicate glass (PSG) layer. A silicon nitride impervious layer prevents the oxidation of underlying, exposed silicon regions during a "flow" step and any "reflow" step. Accordingly, the flow of the PSG layer can be conducted in an atmosphere containing steam, which means that the PSG layer can contain less than about 7% phosphorus by weight. The reduction of the phosphorus content of the PSG layer provides increased reliability for the semiconductor device. The method of manufacturing such a device is also disclosed.