Patents Represented by Attorney Hayes Soloway P.C.
  • Patent number: 7060588
    Abstract: A semiconductor device adopting shallow trench isolation for reducing an internal stress of a semiconductor substrate. The semiconductor device is composed of a semiconductor substrate provided with a trench for isolation, and an insulating film formed to cover the trench for relaxing an internal stress of the semiconductor substrate. The insulating film includes a first portion disposed to be opposed to a bottom of the trench, and a second portion disposed to be opposed to a side of the trench. A first thickness of the first portion is different from a second thickness of the second portion.
    Type: Grant
    Filed: December 9, 2003
    Date of Patent: June 13, 2006
    Assignee: Elpida Memory, Inc.
    Inventor: Kazuhiro Tamura
  • Patent number: 7057033
    Abstract: The present invention concerns a new fractionated polydisperse carbohydrate composition having the following definition: an av. DP which is significantly higher than the av. DP of a native polydisperse carbohydrate composition, significantly free of low molecular monomers, dimmers, and oligomers, significantly free of impurities chosen among the group consisting of colourings, salts, proteins and organic acids, significantly free of technological aids such as solubility affecting products. The present invention concerns also the preparation process of the composition according to the invention.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: June 6, 2006
    Assignee: Tiense Suikerrafinaderij N.V.
    Inventors: Georges Smits, Luc Daenekindt, Karl Booten
  • Patent number: 7057678
    Abstract: In a liquid crystal display device there are provided a liquid crystal panel, a chassis, a side reflector, an optical sheet, a diffuser, and a bottom reflector. In the side reflector are provided plural lamp support bases in a row in a direction parallel to the surface of the liquid crystal panel. The lamp support bases are arranged so as to hold low pressure-side end portions of lamps respectively. A return substrate extending in the arranged direction of the lamps is mounted to the lamp support bases on the side opposed to the liquid crystal panel. Further, lead wires are drawn out toward the return substrate from low pressure-side end portions of the lamps, then are allowed to pass through the lamp support bases and are connected to the return substrate. With this arrangement, it is possible to narrow a picture frame area.
    Type: Grant
    Filed: April 16, 2002
    Date of Patent: June 6, 2006
    Assignee: NEC LCD Technologies, Ltd.
    Inventors: Hiroshi Ishida, Tsutomu Kanatsu
  • Patent number: 7058923
    Abstract: An optical proximity effect correcting method in a semiconductor manufacturing process includes adding, detecting, judging, and deleting. The adding includes adding a first correcting region around a portion of a first design pattern. The portion faces a second design pattern. A first corrected design pattern includes the first correcting region and the first design pattern. The detecting includes detecting a space between the first corrected design pattern and the second design pattern. The judging includes judging whether the space is smaller than or equal to a predetermined value. The deleting includes deleting at least a portion of the first correcting region such that the space is larger than the predetermined value, when the space is smaller than or equal to the predetermined value.
    Type: Grant
    Filed: December 4, 2001
    Date of Patent: June 6, 2006
    Assignee: NEC Electronics Corporation
    Inventors: Keiichiro Tounai, Takeshi Hamamoto
  • Patent number: 7057286
    Abstract: A method for manufacturing a multi-level interconnection structure in a semiconductor device includes the steps of consecutively forming an anti-diffusion film and an interlevel dielectric film on a first level Cu layer, forming first through third hard mask films on the interlevel dielectric film, etching the interlevel dielectric film by using the first hard mask to form first through-holes, etching the first and second hard mask films and a top portion of the interlevel dielectric film by using the third hard mask film to form trenches, and etching the anti-diffusion film to form through-holes. The first hard mask film protects the interlevel dielectric film during removal of the second and third hard mask films.
    Type: Grant
    Filed: September 30, 2002
    Date of Patent: June 6, 2006
    Assignee: NEC Electronics Corporation
    Inventor: Tatsuya Usami
  • Patent number: 7057443
    Abstract: A current circuit includes a first group and a second group of transistors whose emitters are connected via respective resistors to a voltage source. The collectors of the first-group of transistors (50, 51) are connected together to an output terminal (43) and those of the second group of transistors (70, 71) are connected together to a current source (74) that produces a constant current (I). The bases of the first and second groups of transistors are connected together to form a current mirror, so that the same constant current is drawn by the first group of transistors to the output terminal. From the output terminal, a current inversely variable with uniform resistance variations is drawn, so that a current supplied from the output terminal is a difference between the constant current and the inversely variable current. The current from the output terminal drives an active filter (10) which includes switching circuits and resistor-capacitor circuitry.
    Type: Grant
    Filed: September 17, 2003
    Date of Patent: June 6, 2006
    Assignee: NEC Electronics Corporation
    Inventor: Yoshiaki Nakamura
  • Patent number: 7056549
    Abstract: Iso-?-acids and reduced iso-?-acids in their free acids states are converted into mobile resins by the addition of concentrated solutions of alkali metal hydroxides. The products may be used in brewing for the bittering of beer and are most effectively used in an apparatus that automatically blends the product with water and injects the resultant, aqueous solution into beer.
    Type: Grant
    Filed: September 19, 2002
    Date of Patent: June 6, 2006
    Assignee: S.S. Steiner, Inc.
    Inventors: Richard J. H. Wilson, Robert J. Smith
  • Patent number: 7055281
    Abstract: A clip and rope combination is disclosed for holding a fish. The clip is shaped to securely hold the fish by gripping the lip of the fish. The rope is coupled to the clip such that any force exerted on the rope increases the gripping power of the clip.
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: June 6, 2006
    Assignee: Plasti-Clip Corporation
    Inventor: Daniel Faneuf
  • Patent number: 7051534
    Abstract: Arrangement at a gas turbine installation for the generating of electricity, where inlet air filter housing, bleed air outlet and inlet for the vent air to the turbine housing are integrated into two units, an upper filter housing and a lower intermediate housing connected to the turbine housing. The lower intermediate housing includes a silencer for the inlet air that at the same time connects the filter housing with the turbine inlet. The compressor bleed air system is divided into two parts, one in the intermediate housing and one extending through the filter housing. The vent air for the turbine housing is drawn in through an end wall of the filter housing and down into the turbine housing through separate spaces surrounding the compressor bleed ducting in the filter and intermediate housings.
    Type: Grant
    Filed: October 1, 2001
    Date of Patent: May 30, 2006
    Assignee: Camfil AB
    Inventors: Peter Sandberg, Tord Ekberg, Peter Johansson
  • Patent number: 7054107
    Abstract: To accurately decrease the gap depth between an upper pole layer and a lower pole layer and the front-end portion width of the upper pole layer. A thin-film magnetic head of the present invention is constituted by forming a lower shielding layer, a read gap layer holding an MR magnetosensitive element, a common pole layer, and a write gap layer in order on an insulating substrate, forming a first flattening layer, a coil pattern layer, and a second flattening layer laminated in order on the write gap layer excluding the vicinity of an ABS plane, and forming an upper pole layer on the write gap layer and the second flattening layer nearby an ABS plane. Moreover, a concave portion is formed on the common pole layer at a position separated from the ABS plane, the concave portion is filled with a nonmagnetic body, and the gap depth between the upper pole layer and the common pole layer is determined by the concave portion.
    Type: Grant
    Filed: February 27, 2003
    Date of Patent: May 30, 2006
    Assignee: TDK Corporation
    Inventors: Shinsaku Saitho, Haruo Urai, Nobuyuki Ishiwata, Kiyotaka Shimabayashi, Yoshihiro Nonaka, Tamaki Toba
  • Patent number: 7053783
    Abstract: A pathogen detector has a sample area for containing environmental air, a light source on one side of the sample area for directing a collimated beam of light through the sample air so that part of the light beam will be scattered by any particles present in the air while the remainder remains unscattered, and a beam blocking device on the opposite side of the sample area for blocking at least the unscattered portion of the beam of light and directing at least part of the scattered light onto a detector. The detector produces output pulses in which each pulse has a height proportional to particle size and a pulse height discriminator obtains the size distribution of airborne particles detected in the air sample at a given time from the detector output. An alarm signal is activated if the number of particles within a predetermined pathogen size range of around 1 to 7 ?m exceeds a predetermined normal level.
    Type: Grant
    Filed: December 18, 2002
    Date of Patent: May 30, 2006
    Assignee: Biovigilant Systems, Inc.
    Inventors: Robert N. Hamburger, Jian-Ping Jiang, Richard D. O'Connor
  • Patent number: 7054190
    Abstract: A TMR network 120 using TMR elements as magnetoresistive elements is formed as a variable resistive element network by a series-parallel connection of two kinds of variable resistive elements R with resistance values that change according to an external input X or a memory input Y, as shown in an AND operation network 122 in FIG. 5(b), wherein the total resistance value Rtotal is minimized, that is, the current I is maximized for a particular combination of the inputs. Assuming Rxi and Ryi (i=0, 1 and 2) as the resistance values of the variable resistive elements R according, respectively, to the external input X and memory input Y, the values of x and y determine the current I that flows through the network as shown in FIG. 5(d). Setting a threshold value between I0 and I1 using a threshold detector 160 makes it possible to realize AND operation. The operation result is then output as a voltage value through an IV converter 170.
    Type: Grant
    Filed: August 10, 2004
    Date of Patent: May 30, 2006
    Assignee: Tohoku Techno Arch Co., Ltd.
    Inventors: Takahiro Hanyu, Hiromitsu Kimura
  • Patent number: 7051183
    Abstract: A circuit for recording digital waveform data includes (a) a first counter which counts the number of data constituting a first data sequence including a plurality of data different from one another, (b) a second counter which counts the number by which the same data is repeated to constitute a second data sequence, (c) a memory which stores all of data constituting the first data sequence and one of data constituting the second data sequence in this order together with the number counted by the first counter and the number counted by the second counter, and (d) a controller which transmits an address signal to said memory, and controls operation of the first and second counters.
    Type: Grant
    Filed: August 1, 2002
    Date of Patent: May 23, 2006
    Assignee: NEC Corporation
    Inventor: Hiroyuki Igura
  • Patent number: 7049185
    Abstract: In a semiconductor device including active areas where transistors are formed and a field area for isolating the active areas from each other, the field area has a plurality of dummy areas where dummy gates are formed.
    Type: Grant
    Filed: December 12, 2000
    Date of Patent: May 23, 2006
    Assignee: NEC Electronics Corporation
    Inventor: Kazuyuki Ito
  • Patent number: 7050572
    Abstract: A telephone set is provided that includes a control section that, when detecting an off-hook operation, instructs a tone generator and a codec to stop a transmission of an incoming call and simultaneously instructs, using an awaiting voice generation instructing function section, the tone generator to produce a signal voice informing an awaiting state and the codec to transmit it to a handset. At the same time, the control section generates an off-hook signal and transmits it to a packeting section. The off-hook signal is incorporated in the packet to be transmitted by the packeting section and is transmitted from a packet network interface to a packet network.
    Type: Grant
    Filed: May 17, 2001
    Date of Patent: May 23, 2006
    Assignee: NEC Corporation
    Inventor: Koichiro Kashiwagi
  • Patent number: 7040916
    Abstract: A plug housing (5) includes a first housing part (10) and a second housing part (12) which rest at each other along a parting line (14), and a cable passage (9) for a cable (8) from an interior space of the plug housing (5) towards outside. The parting line (14) extends in the region of the cable passage (9). The plug housing further includes a sealing insert (34) arranged in the cable passage (9). The sealing insert (34) is provided with a slot (44) so that it can be slipped on a preassembled cable (8). The sealing insert (34) is also arranged such that the slot (44) has an offset with respect to the parting line (14).
    Type: Grant
    Filed: October 12, 2004
    Date of Patent: May 9, 2006
    Assignee: Harting Electric GmbH & Co. KG
    Inventors: Martin Schmidt, Nicole Kruke, Frank Quast, Uwe Sundermeier
  • Patent number: 7042534
    Abstract: Light is input into an incident surface portion from a fluorescent lamp, and most of the light propagates in repetition directions. Since a length of an emission portion of the fluorescent lamp is shorter than that of the incident surface portion, there are areas to which no light propagates and dark portions generate in the repetition directions of a string of prisms. Since these dark portion generate out of the display area, a display quality is improved.
    Type: Grant
    Filed: May 7, 2002
    Date of Patent: May 9, 2006
    Assignee: NEC LCD Technologies, Ltd.
    Inventor: Fumihiko Fujishiro
  • Patent number: 7037595
    Abstract: A thin layer of hafnium oxide or stacking of thin layers comprising hafnium oxide layers for producing surface treatments of optical components, or optical components, in which at least one layer of hafnium oxide is in amorphous form and has a density less than 8 gm/cm3. The layer is formed by depositing on a substrate without energy input to the substrate.
    Type: Grant
    Filed: November 15, 1999
    Date of Patent: May 2, 2006
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Bernard Andre, Jean Dijon, Brigitte Rafin
  • Patent number: 7033951
    Abstract: A process for forming a pattern contains steps of: forming a first mask pattern on a film to be etched on a substrate; forming a first pattern of the film to be etched by using the first mask pattern as a mask; forming a second mask pattern having a plane shape different from that of the first mask pattern by deforming the first mask pattern; and forming a second pattern of the film to be etched different from the first pattern by using the second mask pattern. By applying the process for forming a pattern, for example, to the formation of a semiconductor layer and source and drain electrodes of a TFT substrate of a liquid crystal display apparatus, the above-stated formation requiring two photoresist process steps in a conventional manufacturing method of a liquid crystal display apparatus can be carried out by only one process step, thereby reducing manufacturing cost thereof.
    Type: Grant
    Filed: February 15, 2002
    Date of Patent: April 25, 2006
    Assignee: NEC LCD Technologies, Ltd.
    Inventor: Shusaku Kido
  • Patent number: D519740
    Type: Grant
    Filed: January 30, 2004
    Date of Patent: May 2, 2006
    Assignee: Lisa Frank, Inc.
    Inventor: Lisa Frank Green