Abstract: A method for reducing overlay error in a photolithographic process, by providing a substrate having a permanent layer with a first pattern disposed therein, coating the substrate with photoresist, exposing the photoresist to a second pattern, while measuring temperatures at a plurality of different first positions across the substrate, developing the second pattern in the photoresist, measuring overlay errors between the first and second patterns at a plurality of different second positions across the substrate, correlating the overlay errors with temperatures by position on the substrate, determining any relationship indicated between the correlated overlay errors and temperatures, and adjusting at least one temperature controlling aspect of the photolithographic process in response to any relationship determined.

Abstract: An optical locating and tracking system may have two or more optical scanners, one or more optical detectors responsive to radiation from one or more optical sources, and a controller coupled to the detector(s) and the scanner(s). Each scanner has a reflector mounted to a two-dimensional actuator that tilts the reflector about first and second axes. The controller determines whether a given reflector of a given scanner is aligned to provide an optical path between the optical source(s) and the detector(s) from one or more detection signals from the one or more optical detectors. The optical path originates, terminates or is deflected at the object. The controller also determines the object's position in three dimensions from control signals to the two-dimensional actuators of the scanners obtained the reflectors are aligned to provide the optical path. The control signals determine a tilt of each reflector about its first and second axes.

Abstract: In a modulated optical reflectance (MOR) system, a laser noise suppression technique utilizes a reference beam split optically from a probe laser prior to injection of a beam from the probe laser into an MOR signal path. The reference beam and a probe beam reflected from the sample are sent to first and second detectors, which produce first and second signals. A signal combiner receives the second signal at a first input and produces a combiner signal that corresponds to a difference between signals applied to the first and a second input. A level balancer receives the first signal and a signal derived from the combiner signal and produces a balancer output that is coupled to the second input of the signal combiner. The combination of the balancer output and the second signal tends to cancel out an average value of the second signal from the combiner signal.

Abstract: Systems, methods and for analyzing game control input data are disclosed. A machine-readable medium having embodied thereon instructions for analyzing game control input data is also disclosed.

Abstract: Passive optical components may be used to tap the optical power, e.g., from fibers of a wavelength switch system. The passive optical components are realized by a standard photonics light-wave circuit (PLC) integrated to the fiber collimator array of the wavelength switch system. The PLC includes multiple waveguide paths that optically couple optical signals from one or more fiber ports to one or more corresponding free space optical component ports. Optical signals traveling through these waveguide paths are tapped by one or more optical taps and coupled to one or more corresponding tap ports. Each optical tap is located such that an optical signal is tapped after it is coupled into one of the waveguide paths.

Abstract: Network bandwidth detection and distribution and prioritizing network traffic among two or more distinct channels of communication within a single application in a node configured to communicate with one or more other nodes over a network is disclosed. For a particular time quantum, a bandwidth quantum may be distributed amongst two or more communication channels according to priorities associated with those channels.

Abstract: A substrate processing apparatus and method for dynamic tracking of wafer motion and distortion during lithography are disclosed. An energetic beam may be applied to a portion of a substrate according to a predetermined pattern. The relative positions of one or more targets on the substrate may be determined while applying the energetic beam to the portion of the substrate. A dynamic distortion of the substrate may be determined from the relative positions while applying the energetic beam to the portion of the substrate. Application of the energetic beam may be deviated from the predetermined pattern in a manner calculated to compensate for the dynamic distortion of the substrate.

Abstract: A stacked-die package for battery protection is disclosed. The battery protection package includes a power control integrated circuit (IC) stacked on top of integrated dual common-drain metal oxide semiconductor field effect transistors (MOSFETs) or two discrete MOSFETs. The power control IC is either stacked on top of one MOSFET or on top of and overlapping both two MOSFETs.

Abstract: An oscillator includes a reference stage and multiple phase stages. The reference stage has a reference transistor having a gate coupled to a voltage reference and a drain coupled to a reference current source. Each phase stage includes a transistor, two current sources, a capacitor, switch, inverter, and latch. The transistor has a drain coupled to a first current source, a gate coupled to a node and a source coupled to the reference transistor's source. The capacitor and switch couple between the node and ground. The second current source couples to the node. The transistor's drain couples to the inverter's input. The inverter's output couples to the latch's set input. The latch's output couples to the switch. The inverter output also couples to the reset input of a subsequent phase stage's latch. The inverter output for a last stage couples to the reset input of a first stage latch.

Abstract: Ellipsometry using two waveplates of complementary retardation in a dual rotating compensator configuration is disclosed. Two waveplates of complementary retardation may be used to increase the useful spectral range of a rotating compensator ellipsometer, in particular towards the deep Ultraviolet (UV) spectrum. The improved rotating compensating ellipsometer disclosed herein enables a user to select specific and different waveplate retardations for the purpose of increasing the operating wavelength range of the rotating compensating ellipsometer.

Abstract: In embodiments of the present invention a second, different waveplate is introduced into a single rotating compensator normal incidence ellipsometer. The second waveplate provides a quarter wavelength retardation that is different from and complementary to that of the first waveplate in order to increase the spectral range for which useful retardation is available, especially towards the deep UV spectrum. The sensitivity for the system may also be increased in the conventional spectral range, since each of the two waveplates may be optimized for its own, somewhat more narrow spectral range of operation. With the proper choice of two waveplates of different retardation, the useful spectral range may be extended from typically 190-820 nm to 150-1000 nm, and beyond if necessary, while increasing the sensitivity within the conventional wavelength range at the same time.

Abstract: A semiconductor package assembly may include a lead frame having a die bonding pad and plurality of leads coupled to the first die bonding pad. A vertical semiconductor device may be bonded to the die bonding pad. The device may have a conductive pad electrically connected to one lead through a first bond wire. An electrically isolated conductive trace may be formed from a layer of conductive material of the first semiconductor device. The conductive trace provides an electrically conductive path between the first bond wire and a second bond wire. The conductive path may either pass underneath a third bond wire thereby avoiding the third bond wire crossing another bond wire, or the conductive path may result in a reduced length for the first and second bond wires that is less than a predetermined maximum length.

Abstract: Trench gate MOSFET devices may be formed using a single mask to define gate trenches and body contact trenches. A hard mask is formed on a surface of a semiconductor substrate. A trench mask is applied on the hard mask to predefine a body contact trench and a gate trench. These predefined trenches are simultaneously etched into the substrate to a first predetermined depth. A gate trench mask is next applied on top of the hard mask. The gate trench mask covers the body contact trenches and has openings at the gate trenches. The gate trench, but not the body contact trench, is etched to a second predetermined depth. Conductive material of a first kind may fill the gate trench to form a gate. Conductive material of a second kind may fill the body contact trench to form a body contact.

Abstract: A method for correction of the form of dental alveolar arch relates to medicine and can be used in orthodontics for correction of the form of dental alveolar arch in the lingual and vestibular directions. The method intensifies correction of the form of alveolar process and increases convenience of the device usage. The method may be realized through fitting of an orthodontic device in the cavity of the mouth, its periodic removal and activation and influence on teeth by forward and rotary forces. In intervals between periodic activations through repeated removal of forces developed by the device, teeth are influenced by forces of masticatory muscles.

Abstract: Etch selectivity enhancement during electron beam activated chemical etch (EBACE) is disclosed. A target or portion thereof may be exposed to a gas composition of a type that etches the target when the gas composition and/or target are exposed to an electron beam. By directing an electron beam toward the target in the vicinity of the gas composition, an interaction between the electron beam and the gas composition etches a portion of the target exposed to both the gas composition and the electron beam. Selectivity of etching of the target due to interaction between the electron beam and gas composition may be enhanced in a number of ways.

Abstract: A method for detecting direction when interfacing with a computer program is provided. The method includes capturing an image presented in front of an image capture device. The image capture device has a capture location in a coordinate space. When a person is captured in the image, the method includes identifying a human head in the image and assigning the human head a head location in the coordinate space. The method also includes identifying an object held by the person in the image and assigning the object an object location in coordinate space. The method further includes identifying a relative position in coordinate space between the head location and the object location when viewed from the capture location. The relative position includes a dimension of depth. The method may be practiced on a computer system, such as one used in the gaming field.

Abstract: A semiconductor device includes a P-body layer formed in an N-epitaxial layer; a gate electrode formed in a trench in the P-body and N-epitaxial layer; a top source region formed from the P-body layer next to the gate electrode; a gate insulator disposed along a sidewall of the gate electrode between the gate electrode and the source, between the gate electrode and the P-body and between the gate electrode and the N-epitaxial layer; a cap insulator disposed on top of the gate electrode; and an N+ doped spacer disposed along a sidewall of the source and a sidewall of the gate insulator. The source includes N+ dopants diffused from the spacer. A body contact region containing P-type dopants is formed from the N-epitaxial layer. The contact region touches one or more P-doped regions of the P-body layer and the source. Methods for manufacturing such a device are also disclosed. Embodiments of this invention may also be applied to P-channel devices.

Abstract: A MEMS device and fabrication method are disclosed. A bottom substrate having an insulating layer sandwiched between an upper layer and a lower layer may be bonded to a device layer. One or more portions of the upper layer may be selectively removed to form one or more device cavities. Conductive vias may be formed through the lower layer at locations that underlie the one or more device cavities and electrically isolated from the lower layer. Devices may be formed from the device layer. Each device overlies a corresponding device cavity. Each device may be connected to the rest of the device layer by one or more corresponding hinges formed from the device layer. One or more electrical contacts may be formed on a back side of the lower layer. Each contact is electrically connected to a corresponding conductive via.